MAXIM MAX6703TKA-T

19-1952; Rev 2; 8/03
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
Features
♦ Small 8-Pin SOT23 Package
♦ Precision Monitoring of +5.0V, +3.3V, +3.0V, +2.5V
Supply Voltages
♦ 140ms Reset Timeout Delay
♦ Power-Fail Input with Independent Output;
Monitor Inputs Down to 0.62V (MAX6704–MAX6708)
♦ Dual Adjustable Reset Input for Triple-Voltage
Monitoring (MAX6701(A)/MAX6702(A)/MAX6703(A))
♦ 1.6s Watchdog Timeout Period
(MAX6701(A)–MAX6707(A))
♦ Independent Watchdog Output
(MAX6701(A)/MAX6702(A)/MAX6703(A)/
MAX6705(A)/MAX6706(A)/MAX6707(A))
♦ Manual Reset Input
♦ Four Reset Output Stage Options
Active Low Push-Pull (MAX6701(A), MAX6705(A))
Active Low Open Drain (MAX6703(A), MAX6707(A))
Active High Push-Pull (MAX6702(A), MAX6706(A))
Dual Active Low/High Push-Pull (MAX6704,
MAX6708)
♦ Guaranteed Reset Valid to VCC = 1V
♦ Immune to Short Falling VCC Transients
♦ Low Cost, Few External Components
The MAX6701–MAX6708 family offers several pinout
options to accommodate a variety of multivoltage microprocessor supervision applications.
The MAX6701(A)/MAX6702(A)/MAX6703(A) monitor
three supply voltages (one fixed threshold and two
adjustable) to drive a single reset output and include a
manual reset input and a watchdog timer with an independent output. The MAX6704 monitors a single-supply
voltage to drive complementary reset outputs and
includes an independent adjustable power-fail-in/powerfail-out comparator, a manual reset input, and a resetbased watchdog timer. The MAX6705(A)/MAX6706(A)/
MAX6707(A) monitor a single-supply voltage to drive a
single reset output and include an independent
adjustable power-fail-in/power-fail-out comparator, a
manual reset input, and a watchdog timer with an independent output. The MAX6708 is the same as the
MAX6704 but without the watchdog timer function.
See the Detailed Description for differences between
non-A and A versions.
Applications
Computers
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX6701_KA-T
-40°C to +125°C
8 SOT23-8
MAX6701A_KA-T
-40°C to +125°C
8 SOT23-8
Insert the desired suffix letter (from the Threshold Suffix Guide
table) into the blank to complete the part number. All devices
must be ordered in increments of 2500 pieces. Sample stock is
typically held on standard versions only. Contact factory for
availability.
Ordering Information continued at end of data sheet.
Controllers
Pin Configurations
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
TOP VIEW
MR
1
VCC
2
GND
3
8
WDO
7
RESET (RESET)
6
WDI
5
RST_IN2
White Goods
Networking
Telecommunications
MAX6701(A)
MAX6702(A)
MAX6703(A)
RST_IN1 4
Typical Operating Circuit and Selector Guide appear at end
of data sheet.
( ) ARE FOR MAX6702(A) ONLY.
SOT23
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX6701–08/MAX6701A–03A/05A–07A
General Description
The MAX6701–MAX6708 microprocessor (µP) supervisory
circuits reduce the complexity and components required
to monitor power-supply functions in µP systems. These
devices significantly improve system reliability and accuracy compared to separate ICs or discrete components.
The MAX6701–MAX6708 family provides four functions:
a reset output during power-up, power-down, and
brownout conditions; an independent watchdog output
that goes low if the watchdog input has not been toggled
within 1.6s; a 0.62V threshold detector for power-fail
warning; and an active-low manual reset input.
MAX6701–08/MAX6701A–03A/05A–07A
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
ABSOLUTE MAXIMUM RATINGS
VCC ........................................................................-0.3V to +6.0V
Open-Drain RESET, WDO, PFO ...........................-0.3V to +6.0V
Push-Pull RESET, RESET, WDO, PFO ........-0.3V to (VCC + 0.3V)
MR, WDI, PFI, RST_IN1, RST_IN2 ..............-0.3V to (VCC + 0.3V)
Input Current (VCC) .............................................................20mA
Output Current (RESET, RESET, PFO, WDO) .....................20mA
Continuous Power Dissipation (TA = +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +4.25V to +5.5V for L/M versions, VCC = +2.55V to +3.6V for the T/S/R versions, VCC = +2.1V to +2.75V for the Z/Y versions.
TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Operating Voltage Range
VCC
Supply Current
MR Unconnected
CONDITIONS
1.0
5.5
1.2
5.5
9
20
6
20
4.63
4.75
MAX670_S/MAX670_AS
MAX670_R/MAX670_AR
MAX670_Z/MAX670_AZ
MAX670_Y/MAX670_AY
4.50
TA = -40°C to +125°C
4.47
TA = -40°C to +85°C
4.25
TA = -40°C to +125°C
4.22
TA = -40°C to +85°C
3.00
TA = -40°C to +125°C
2.97
TA = -40°C to +85°C
2.85
TA = -40°C to +125°C
2.83
TA = -40°C to +85°C
2.55
TA = -40°C to +125°C
2.53
TA = -40°C to +85°C
2.25
TA = -40°C to +125°C
2.24
TA = -40°C to +85°C
2.12
TA = -40°C to +125°C
2.11
∆VTH
VCC to Reset Output Delay
Reset Timeout Period
TA = -40°C to +85°C
tRP
140
TA = -40°C to +125°C
120
VCC Falling to WDO Delay
MAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A)
PFI, RST_IN1, RST_IN2
Threshold
VCC = 1.8V to 5.5V
PFI Hysteresis
2
4.53
3.08
3.15
3.17
2.93
3.00
3.02
2.63
602
TA = -40°C to +125°C
593
V
2.70
2.72
2.32
2.38
2.40
2.19
2.25
2.27
ppm/°C
200
µs
280
300
5
TA = -40°C to +85°C
µA
4.50
12
TA = -40°C to +85°C
V
4.78
4.38
60
VCC falling at 10mV/µs
UNITS
25
VCC < 3.6V, no load (MAX6708 only)
MAX670_T/MAX670_AT
Reset Threshold
Temperature Coefficient
12
VCC < 3.6V, no load
MAX670_M/MAX670_AM
VTH
MAX
TA = -40°C to +125°C
VCC < 5.5V, no load
ICC
TYP
TA = 0°C to +125°C
MAX670_L/MAX670_AL
VCC Reset Threshold
(VCC falling)
MIN
618
µs
634
642
6
_______________________________________________________________________________________
ms
mV
mV
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
(VCC = +4.25V to +5.5V for L/M versions, VCC = +2.55V to +3.6V for the T/S/R versions, VCC = +2.1V to +2.75V for the Z/Y versions.
TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
PFI, RST_IN1, RST_IN2
Leakage Current
PFI to PFO Delay
CONDITIONS
(Note 2)
TA = -40°C to +85°C
MIN
-50
TA = -40°C to +125°C
-200
tPF
0.3 x VCC
1
MR Glitch Rejection
tMD
MAX6701(A)/MAX6702(A)/MAX6703(A)/
MAX6705(A)/MAX6706(A)/MAX6707(A)
VCC Rising to WDO Delay
MR Pullup Resistance
Watchdog Timeout Period
tWD
WDI Pulse Width
tWDI
WDI Input Voltage
WDI Input Current
IWDI
RESET, WDO Output Low
(Push-Pull or Open Drain)
PFO Output Low
(Push-Pull or Open Drain)
VOL
RESET, WDO, PFO Output
High (Push-Pull Only)
VOH
RESET, WDO, PFO Output
Open-Drain Leakage
Current
ILKG
VOH
VOL
ns
100
ns
50
75
1.6
2.4
TA = -40°C to +125°C
0.96
2.52
50
0.7 x VCC
WDI = 0V or VCC
-1
kΩ
s
ns
0.3 x VCC
VCC ≥ 1.0V, ISINK = 50µA, output asserted
(TA = 0°C to +125°C)
VOL
ns
200
25
VIH
V
100
1.12
(Note 2)
nA
µs
TA = -40°C to +85°C
VIL
UNITS
µs
0.7 x VCC
MR Minimum Input Pulse
RESET Output Low
(Push-Pull Only)
+50
1
VIH
MR to Reset Delay
MAX
+200
VIL
MR Input Voltage
RESET Output High
(Push-Pull Only)
TYP
+1
V
µA
0.3
VCC ≥ 1.2V, ISINK = 100µA, output asserted
0.3
VCC ≥ 2.55V, ISINK = 1.2mA, output asserted
0.3
VCC ≥ 4.25V, ISINK = 3.2mA, output asserted
0.4
VCC ≥ 1.80V, ISINK = 200µA, output asserted
0.3
VCC ≥ 2.55V, ISINK = 1.2mA, output asserted
0.3
VCC ≥ 4.25V, ISINK = 3.2mA, output asserted
0.4
VCC ≥ 2.7V, ISOURCE = 500µA, output not asserted
0.8 x VCC
VCC ≥ 4.75V, ISOURCE = 800µA, output not asserted
0.8 x VCC
VCC > VTH, output not asserted
0.8 x VCC
VCC ≥ 1.2V, ISOURCE = 50µA, reset asserted
0.8 x VCC
VCC ≥ 2.55V, ISOURCE = 500µA, reset asserted
0.8 x VCC
VCC ≥ 4.25V, ISOURCE = 800µA, reset asserted
0.8 x VCC
V
V
1.0
VCC ≥ 1.0V, ISOURCE = 1µA, reset asserted
(TA = 0°C to +125°C)
V
µA
V
VCC ≥ 2.7V, ISINK = 1.2mA, reset not asserted
0.3
VCC ≥ 4.75V, ISINK = 3.2mA, reset not asserted
0.4
V
Note 1: Over-temperature limits are guaranteed by design and not production tested. Devices are tested at TA = +25°C.
Note 2: Guaranteed by design. Not production tested.
_______________________________________________________________________________________
3
MAX6701–08/MAX6701A–03A/05A–07A
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
8
MAX6708
VCC = 3.3V
4
0
195
-15
10
35
60
-40
85
10
5
0
190
-15
10
35
60
-40
85
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
MAXIMUM VCC TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
1.65
1.60
1.55
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
60
MAXIMUM TRANSIENT DURATION (µs)
MAX6701 toc04
1.70
NORMALIZED RESET THRESOLD
-40
MAX6701 toc03
MAX6701 toc02
200
15
MAX670_Y
50
MAX6701 toc06
12
205
20
VCC TO RESET OUTPUT DELAY (µs)
MAX6705(A)
VCC = 5V
MAX6701 toc05
SUPPLY CURRENT (µA)
16
210
RESET TIMEOUT PERIOD (ms)
MAX6701 toc01
20
VCC TO RESET OUTPUT DELAY
vs. TEMPERATURE
RESET TIMEOUT PERIOD
vs. TEMPERATURE
SUPPLY CURRENT vs. TEMPERATURE
WATCHDOG TIMEOUT PERIOD (s)
40
RESET OCCURS
ABOVE LINE
30
20
10
0.96
0
0.95
-40
-15
10
35
60
85
-40
TEMPERATURE (°C)
-15
10
35
60
85
0
OUTPUT VOLTAGE LOW
vs. SINK CURRENT
VCC ≥ 4.25V
80
VCC - VOH vs. SOURCE CURRENT
350
MAX6701 toc07
100
40
VCC ≥ 4.25V
300
75
VCC - VOH (mV)
250
50
200
150
100
25
50
0
0
0
400 800 1200 1600 2000 2400 2800 3200
SINK CURRENT (µA)
4
0
120
RESET THRESHOLD OVERDRIVE (mV)
TEMPERATURE (°C)
MAX6701 toc08
1.50
VOL (mV)
MAX6701–08/MAX6701A–03A/05A–07A
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
400 800 1200 1600 2000 2400 2800 3200
SOURCE CURRENT (µA)
_______________________________________________________________________________________
160
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
PIN
MAX6701(A)
MAX6702(A) MAX6704
MAX6703(A)
MAX6705(A)
MAX6706(A) MAX6708
MAX6707(A)
NAME
FUNCTION
1
1
1
1
MR
Active-Low, Manual Reset Input, Internal 50kΩ Pullup to VCC.
Pull low to force a reset. Reset remains active as long as MR is
low and the reset timeout period after MR goes high. Leave
unconnected or connect to VCC if unused. WDO deasserts
when MR is low (MAX6701(A)/MAX6702(A)/MAX6703(A)/
MAX6705(A)/ MAX6706(A)/MAX6707(A) only).
2
2
2
2
VCC
Supply Voltage for MAX6701–MAX6708 and Input for Primary
Reset Threshold Monitor. Push-pull outputs are powered by VCC.
3
3
3
3
GND
Ground
—
4
4
4
PFI
Power-Fail Voltage Monitor Input. High-impedance input for
internal power-fail comparator. Connect this pin to an external
resistive-divider network to set the reset threshold voltage;
0.62V (typ) threshold. Connect to GND or VCC when not used.
—
5
5
5
PFO
Power-Fail Monitor Output. Open drain or push-pull active low.
PFO goes low when PFI is less than 0.62V.
6
6
6
—
WDI
Watchdog Input. If WDI remains high or low for longer than the
watchdog timeout period, the internal watchdog timer runs out and
WDO is asserted. WDO is asserted low after each watchdog
overflow and remains low until the watchdog timer is cleared (the
reset output is not affected). The internal watchdog timer clears
whenever a VCC/RST_IN1/RST_IN2 reset is asserted, the manual
reset is asserted, or WDI sees a rising or falling edge. The
watchdog timer remains cleared until the reset output is
deasserted. On the MAX6704, RESET pulse asserts for the reset
timeout period after each watchdog timeout overflow. The
watchdog timer cannot be disabled.
—
—
—
6
N.C.
No Connection. Not internally connected.
7
7
7
7
RESET
Active-Low Reset Output (Open Drain or Push-Pull). RESET
changes from high to low when the VCC input drops below the
selected reset threshold (or RST_IN1/ RST_IN2 for the
MAX6701(A)/MAX6702(A)/MAX6703(A), MR is pulled low, or the
watchdog triggers a reset (MAX6704 only). RESET remains low for
the reset timeout period after the reset conditions are terminated.
_______________________________________________________________________________________
5
MAX6701–08/MAX6701A–03A/05A–07A
Pin Description
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
MAX6701–08/MAX6701A–03A/05A–07A
Pin Description (continued)
PIN
MAX6701(A)
MAX6702(A) MAX6704
MAX6703(A)
8
7*
4
5
—
8
—
—
MAX6705(A)
MAX6706(A) MAX6708
MAX6707(A)
8
7*
—
—
—
8
—
—
NAME
FUNCTION
WDO
Active-Low Watchdog Output (Open Drain or Push-Pull). WDO
is asserted whenever the watchdog times out and VCC or the
reset inputs are below their respective thresholds. WDO
deasserts after a valid WDI transition without a reset timeout
period. In the A versions, WDO deasserts without a timeout
delay when VCC, RST_IN1, and RST_IN2 rises above its
threshold. Pull MR low to assert WDO (MAX6701/MAX6702/
MAX6703/MAX6705/MAX6706/MAX6707 only). Pull MR low to
deassert WDO (MAX6701(A)/MAX6702(A)/MAX6703(A)/
MAX6705(A)/MAX6706(A)MAX6707(A) only).
RESET
Active-High Reset Output (Push-Pull). RESET changes from low
to high when the VCC input drops below the selected reset
threshold (or RST_IN1/RST_IN2 for MAX6701(A)/MAX6702(A)/
MAX6703(A), MR is pulled low, or the watchdog triggers a
reset (MAX6704 only). RESET remains high for the reset
timeout period after the reset conditions are terminated.
RST_IN1
Input for User-Adjustable VCC2 Monitor. High-impedance input
for second internal reset comparator. Connect this pin to an
external resistive-divider network to set the reset threshold
voltage; 0.62V (typ) threshold. Connect to VCC when not used.
Reset is asserted when either VCC, RST_IN1, or RST_IN2 are
below threshold.
RST_IN2
Input for User-Adjustable VCC3 Monitor. High-impedance input
for third internal reset comparator. Connect this pin to an
external resistive-divider network to set the reset threshold
voltage; 0.62V (typ) threshold. Connect to VCC when not used.
Reset is asserted when either VCC, RST_IN1, or RST_IN2 are
below threshold.
*RESET active-high for the MAX6702(A)/MAX6706(A).
Detailed Description
Figures 1, 2, and 3 are functional diagrams for the
MAX6705(A)/MAX6706(A)/MAX6707(A), MAX6704/
MAX6708, and MAX6701(A)/ MAX6702(A)/MAX6703(A),
respectively.
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a
known state. The MAX6701–MAX6708 assert reset during power-up and prevent code execution errors during
power-down or brownout conditions.
On power-up, once VCC reaches 1V, RESET is a guaranteed logic low of 0.4V or less. As VCC rises, RESET
6
stays low. After VCC, RST_IN1, or RST_IN2 rise above
the reset threshold, an internal timer holds RESET low
for about 200ms. RESET pulses low whenever VCC dips
below the reset threshold, including brownout conditions. If a brownout occurs in the middle of a previously
initiated reset pulse, the pulse continues for at least
another 140ms. On power-down, once VCC falls below
the reset threshold, RESET stays low and is guaranteed
to be 0.4V or less, until VCC drops below 1V.
The MAX6702(A)/MAX6704/MAX6706(A)/MAX6708
active-high RESET output is the complement of the
RESET output, and is guaranteed to be valid with VCC
down to 1V.
_______________________________________________________________________________________
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
8
WATCHDOG
TIMER
VCC
VCC
WDO
50kΩ
50kΩ
VCC
7
RESET
GENERATOR
4
RESET
GENERATOR
RESET
(RESET)
5
WDO
RST_IN1
GND
0.62V
( ) ARE FOR MAX6702(A) ONLY.
Figure 1. MAX6705(A)/MAX6706(A)/MAX6707(A) Functional
Diagram
Figure 3. MAX6701(A)/MAX6702(A)/MAX6703(A) Functional
Diagram
VTH
VCC
VTH
VCC
50kΩ
VCC
RST_IN2
0.62V
3
WDI
PFO
0.62V
( ) ARE FOR MAX6706(A) ONLY.
RESET (RESET)
WATCHDOG
TIMER
VREF
MAX6705(A)
MAX6706(A)
MAX6707(A)
VREF
MR
MAX6701(A)
MAX6702(A)
MAX6703(A)
MR
MR 1
VCC 2
PFI
MAX6701–08/MAX6701A–03A/05A–07A
6
WDI
MAX6704
MAX6708
tRP
8
1
2
RESET
GENERATOR
7
WATCHDOG
TIMER
6
RESET
RESET
WDI
(MAX6704 ONLY)
tRP
VCC
RESET
0V
VCC
MR
0V
tMD
VREF
PFI
VCC
WDO
4
5
0V
PFO
MR EXTERNALLY DRIVEN LOW
VCC
0.62V
WDI
0V
3
GND
Figure 2. MAX6704/MAX6708 Functional Diagram
NOTE: THE MAX6706 RESET OUTPUT IS THE INVERSE OF THE RESET SHOWN.
Figure 4. MAX6705/MAX6706/MAX6707 RESET, MR, WDO,
and WDI Timing
_______________________________________________________________________________________
7
MAX6701–08/MAX6701A–03A/05A–07A
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
Standard- vs. A-Version Comparison
The MAX6701/MAX6702/MAX6703/MAX6705/MAX6706/
MAX6707s’ WDO latches low when one of the following
events occurs:
•
•
•
•
The watchdog timer times out (1.6s, typ).
VCC, RST_IN1, or RST_IN2 is below its reset threshold.
MR is pulled low.
WDO only deasserts with a valid WDI transition.
TheMAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A)s’ WDO asserts when either
VCC, RST_IN1, or RST_IN2 is below its reset threshold.
WDO deasserts without a timeout delay when the
undervoltage situation has expired. WDO is latched low
when the watchdog timer elapses without seeing a WDI
transition. WDO deasserts with a valid WDI transition
OR by pulling MR low.
See Figures 4 and 5 for standard-version timing. See
Figures 6 and 7 for A-version timing.
Watchdog Timer
The MAX6701–MAX6707 watchdog circuit monitors the
µP’s activity. If the µP does not toggle the WDI within 1.6s,
WDO goes low. When RESET is asserted, the watchdog
timer stays cleared and does not count. As soon as reset
is released, the timer starts counting. WDO deasserts
after a valid transition is detected at WDI. Pulses as short
as 50ns can be detected.
Typically, WDO is connected to the NMI input of a µP.
When VCC, RST_IN1, or RST_IN2 drop below the reset
tWDI
WDI
tWD
threshold, WDO goes low whether or not the watchdog
timer has timed out. Normally this would trigger an NMI,
but RESET goes low simultaneously, and thus overrides
the NMI.
The MAX6704 watchdog circuit does not have an independent watchdog output (WDO). If the µP does not
toggle the watchdog input within 1.6s, the MAX6704
asserts a reset output pulse for the reset timeout period.
Manual Reset
The manual reset input (MR) allows reset to be triggered by a pushbutton switch. The switch is effectively
debounced by the reset pulse width. MR is CMOS logic
compatible, so it can be driven by an external logic
line. MR can be used to force a watchdog timeout to
generate a reset pulse in the MAX6701(A)/MAX6702(A)/
MAX6703(A)/MAX6705(A)/MAX6706(A)/MAX6707(A) by
connecting WDO to MR.
Power-Fail Comparator
The uncommitted power-fail comparator can be used
for various purposes because its noninverting input and
output are externally available. The inverting input is
internally connected to a 0.62V reference. To build an
early warning circuit for power failure, connect the PFI
pin to a voltage-divider (see Typical Operating Circuit).
Choose the voltage-divider ratio so that the voltage at
PFI falls below 0.62V just before the regulator drops
out. Use PFO to interrupt the µP so it can prepare for an
orderly power-down. The low-input current at this pin
allows for large resistor values in the divider.
VTH
tWD
VTH
VCC
+5V
tRP
0V
tRP
+5V
+5V
WDO
RESET
0V
0V
+5V
RESET
+5V
0V
RESET EXTERNALLY
TRIGGERED BY MR
MR
t RP
0V
+5V
(RESET)
0V
+5V
tMD
tMR
+5V
MR
0V
WDO
0V
( ) ARE FOR MAX6702/MAX6706 ONLY.
Figure 5. MAX6701/MAX6702/MAX6703/MAX6705/MAX6706/
MAX6707 Watchdog
8
Figure 6. MAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A) RESET, MR, and WDO Timing with
WDI Three-Stated
_______________________________________________________________________________________
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
WDI
tWD
tWD
+5V
tWD
0V
MAX6701(A)–
MAX6708
VEXTERNAL
+5V
WDO
R1
0V
+5V
RESET
PFI, RST_IN1, OR RST_IN2
R2
0V
0.62V
t RP
+5V
(RESET)
0V
(
MR
)
VEXT-TH = 1 + R1 x 0.62V
R2
+5V
0V
R1 = R2 x
EXT-TH
- 1)
(V0.62
WHERE VEXT-TH IS THE EXTERNAL VOLTAGE TRIP LEVEL.
( ) ARE FOR MAX6702(A)/MAX6706(A) ONLY.
Figure 7. MAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A) Watchdog Timing
Figure 8. Calculating Adjustable Voltage Thresholds
Reset Input
Monitoring Other System Voltages
The MAX6701(A)/MAX6702(A)/MAX6703(A) include two
adjustable reset inputs for monitoring up to a total of
three system voltages (including VCC). The thresholds
for the monitored RST_IN supplies are externally set
with resistor-divider networks (Figure 8). The reset output is asserted if any of the monitored supplies (VCC,
RST_IN1, or RST_IN2) go below its specified threshold
and remains asserted for the reset timeout period after
all supplies are above their thresholds.
Applications Information
Other systems can be monitored by connecting a voltage-divider to PFI and adjusting the ratio appropriately.
In noisy systems, a capacitor between PFI and GND
reduces the power-fail circuit’s sensitivity to high-frequency noise on the line being monitored. Reset can
be asserted on other voltages in addition to the VCC
supply line. Connect PFO to MR to initiate a reset output pulse when PFI drops below 0.62V. Figure 10
shows the MAX6704–MAX6708 configured to assert a
reset output when the secondary supply falls below the
reset threshold.
Ensuring a Valid RESET
Output Down to VCC = 0
Generating a Reset
from Watchdog Overflow
When V CC falls below 1V, the MAX6701–MAX6708
RESET output no longer sinks current—it becomes an
open circuit. High-impedance CMOS logic inputs can
drift to undetermined voltages if left undriven. If a pulldown resistor is added to the RESET pin as shown in
Figure 9, any stray charge or leakage currents are
drained to ground, holding RESET low. A resistor value
(R1) is not critical; 100kΩ is large enough not to load
RESET and small enough to pull RESET to ground. This
application works for push-pull output only (not for
open-drain resets).
Connect WDO to MR to force a watchdog timeout to generate a reset pulse for only the reset timeout period on the
MAX6701(A)/MAX6702(A)/MAX6703(A)/MAX6705(A)/
MAX6706(A)/MAX6707(A). When the MAX6704 watchdog times out, reset outputs are automatically asserted
(no external connections required). For the MAX6701/
MAX6702/MAX6703/MAX6705/MAX6706/MAX6707 non-A
versions, do not connect WDO to MR; this creates a
locked condition.
_______________________________________________________________________________________
9
MAX6701–08/MAX6701A–03A/05A–07A
tWDI
MAX6701–08/MAX6701A–03A/05A–07A
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
0.9V
3.3V
MAX6701(A)
MAX6704
MAX6705(A)
MAX6708
I/O
SUPPLY
RESET
(RESET)
VCC
RESET
PFI
RESET
µP
MAX6704– MR
MAX6708 PFO
R1 (100kΩ)
CORE
SUPPLY
() ARE FOR MAX6704/MAX6706(A)/MAX6708 ONLY.
Figure 9. RESET Valid to Ground Circuit
Figure 10. Monitoring Other System Voltages
Selector Guide
RESET
PP LOW
RESET
PP HIGH
RESET
OD-LOW
WDI
WDO
PFI,
PFO
RST_IN1,
RST_IN2
MAX6701
✔
—
—
✔
✔ PP
—
✔
MAX6701A*
✔
—
—
✔
✔ PP
—
✔
MAX6702
—
✔
—
✔
✔ PP
—
✔
MAX6702A*
—
✔
—
✔
✔ PP
—
✔
MAX6703
—
—
✔
✔
✔ OD
—
✔
MAX6703A*
—
—
✔
✔
✔ OD
—
✔
MAX6704
✔
✔
—
✔
—
✔ PP
—
MAX6705
✔
—
—
✔
✔ PP
✔ PP
—
MAX6705A*
✔
—
—
✔
✔ PP
✔ PP
—
MAX6706
—
✔
—
✔
✔ PP
✔ PP
—
MAX6706A*
—
✔
—
✔
✔ PP
✔ PP
—
MAX6707
—
—
✔
✔
✔ OD
✔ OD
—
MAX6707A*
—
—
✔
✔
✔ OD
✔ OD
—
MAX6708
✔
✔
—
—
—
✔ PP
—
PART
PP = push-pull, OD = open drain.
*WDO deasserts when MR is pulled low. See the Standard- vs. A-Version Comparison section for the differences on WDO.
Threshold Suffix Guide
SUFFIX
RESET
THRESHOLD (V)
L
4.63
M
4.38
T
3.08
S
2.93
R
2.63
Z
2.32
Y
2.19
Bold indicates standard version.
10
______________________________________________________________________________________
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
TOP VIEW
MR
1
8
RESET
MR
1
VCC
2
7
RESET
VCC
2
GND
3
6
WDI
GND
3
PFI 4
5
PFO
MAX6704
MAX6705(A)
MAX6706(A)
MAX6707(A)
PFI 4
SOT23
8
WDO
MR
1
7
RESET (RESET)
VCC
2
GND
6
WDI
5
PFO
8
RESET
7
RESET
3
6
N.C.
PFI 4
5
PFO
MAX6708
SOT23
SOT23
( ) ARE FOR MAX6706(A) ONLY.
Typical Operating Circuit
PART
UNREGULATED DC
DC/DC
REGULATOR
µP
VCC
RESET
WDI
MAX6705(A)
WDO
MAX6706(A)
MR MAX6707(A) PFO
PFI
PUSHBUTTON
SWITCH
Ordering Information (continued)
VCC
RESET
I/O
NMI
INTERRUPT
TEMP RANGE
PIN-PACKAGE
MAX6702_ KA-T
-40°C to +125°C
8 SOT23-8
MAX6702A_ KA-T
-40°C to +125°C
8 SOT23-8
MAX6703_ KA-T
-40°C to +125°C
8 SOT23-8
MAX6703A_ KA-T
-40°C to +125°C
8 SOT23-8
MAX6704_KA-T
-40°C to +125°C
8 SOT23-8
MAX6705_KA-T
-40°C to +125°C
8 SOT23-8
MAX6705A_KA-T
-40°C to +125°C
8 SOT23-8
MAX6706_KA-T
-40°C to +125°C
8 SOT23-8
MAX6706A_KA-T
-40°C to +125°C
8 SOT23-8
MAX6707_KA-T
-40°C to +125°C
8 SOT23-8
MAX6707A_KA-T
-40°C to +125°C
8 SOT23-8
MAX6708_KA-T
-40°C to +125°C
8 SOT23-8
Insert the desired suffix letter (from the Threshold Suffix Guide
table) into the blank to complete the part number. All devices
must be ordered in increments of 2500 pieces. Sample stock is
typically held on standard versions only. Contact factory for
availability.
Chip Information
TRANSISTOR COUNT: 716
PROCESS: BiCMOS
______________________________________________________________________________________
11
MAX6701–08/MAX6701A–03A/05A–07A
Pin Configurations (continued)
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
SEE DETAIL "A"
CL
CL
E
MIN
MAX
A
A1
A2
0.90
0.00
0.90
1.45
0.15
1.30
b
0.28
0.45
C
D
E
0.09
2.80
2.60
0.20
3.00
3.00
SYMBOL
e
b
CL
E1
E1
1.50
L
0.30
L2
e
PIN 1
I.D. DOT
(SEE NOTE 6)
SOT23, 8L .EPS
MAX6701–08/MAX6701A–03A/05A–07A
Low-Voltage, SOT23 µP Supervisors with PowerFail In/Out, Manual Reset, and Watchdog Timer
1.75
0.60
0.25 BSC.
0.65 BSC.
1.95 REF.
e1
0
0
8
e1
D
C
CL
L2
A
A2
GAUGE PLANE
A1
SEATING PLANE C
0
L
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
DETAIL "A"
5. COPLANARITY 4 MILS. MAX.
6. PIN 1 I.D. DOT IS 0.3 MM MIN. LOCATED ABOVE PIN 1.
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
8. MEETS JEDEC MO178.
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, SOT-23, 8L BODY
APPROVAL
DOCUMENT CONTROL NO.
21-0078
REV.
D
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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Printed USA
is a registered trademark of Maxim Integrated Products.