19-0536; Rev 3; 9/08 Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits The MAX6715A–MAX6729A/MAX6797A are ultra-low-voltage microprocessor (µP) supervisory circuits designed to monitor two or three system power-supply voltages. These devices assert a system reset if any monitored supply falls below its factory-trimmed or adjustable threshold and maintain reset for a minimum timeout period after all supplies rise above their thresholds. The integrated dual/triple supervisory circuits significantly improve system reliability and reduce size compared to separate ICs or discrete components. These devices monitor primary supply voltages (VCC1) from 1.8V to 5.0V and secondary supply voltages (VCC2) from 0.9V to 3.3V with factory-trimmed reset threshold voltage options (see the Reset Voltage Threshold Suffix Guide). An externally adjustable RSTIN input option allows customers to monitor a third supply voltage down to 0.62V. These devices are guaranteed to be in the correct reset output logic state when either VCC1 or VCC2 remains greater than 0.8V. A variety of push-pull or open-drain reset outputs along with watchdog input, manual-reset input, and power-fail input/output features are available (see the Selector Guide ). Select reset timeout periods from 1.1ms to 1120ms (min) (see the Reset Timeout Period Suffix Guide). The MAX6715A–MAX6729A/MAX6797A are available in small 5-, 6-, and 8-pin SOT23 packages and operate over the -40°C to +125°C temperature range. Applications Multivoltage Systems Telecom/Networking Equipment Computers/Servers Portable/BatteryOperated Equipment Industrial Equipment Printers/Fax Machines Set-Top Boxes Typical Operating Circuit UNREGULATED DC IN DC-DC OUT2 CONVERTER OUT1 1.8V VCC1 MAX6715AMAX6729A/ MAX6797A RST R1 R2 PUSHBUTTON SWITCH 0.9V VCC2 I/O CORE SUPPLY SUPPLY RESET RSTIN/PFI WDI I/O MR PFO NMI Features o VCC1 (Primary Supply) Reset Threshold Voltages from 1.58V to 4.63V o VCC2 (Secondary Supply) Reset Threshold Voltages from 0.79V to 3.08V o Externally Adjustable RSTIN Threshold for Auxiliary/Triple-Voltage Monitoring (0.62V Internal Reference) o Watchdog Timer Option 35s (min) Long Startup Period 1.12s (min) Normal Timeout Period o Manual-Reset Input Option o Power-Fail Input/Power-Fail Output Option (Push-Pull and Open-Drain Active-Low) o Guaranteed Reset Valid Down to VCC1 or VCC2 = 0.8V o Reset Output Logic Options o Immune to Short VCC Transients o Low Supply Current 14µA (typ) at 3.6V o Watchdog Disable Feature o Small 5-, 6-, and 8-Pin SOT23 Packages Ordering Information MAX6715AUT_ _D_+T -40°C to +125°C PINPACKAGE 6 SOT23 MAX6716AUT_ _D_+T -40°C to +125°C 6 SOT23 MAX6717AUK_ _D_+T -40°C to +125°C 5 SOT23 MAX6718AUK_ _D_+T -40°C to +125°C 5 SOT23 MAX6719AUT_ _D_+T -40°C to +125°C 6 SOT23 MAX6720AUT_ _D_+T -40°C to +125°C 6 SOT23 PART TEMP RANGE +Denotes a lead-free/RoHS-compliant package. T = Tape and reel. Note: The first “_ _” are placeholders for the threshold voltage levels of the devices. Desired threshold levels are set by the part number suffix found in the Reset Voltage Threshold Suffix Guide. The “_” after the D is a placeholder for the reset timeout delay time. Desired delay time is set using the timeout period suffix found in the Reset Timeout Period Suffix Guide. For example, the MAX6716AUTLTD3-T is a dual-voltage supervisor V TH 1 = 4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period. µP Ordering Information continued at end of data sheet. MAX67_ _ Pin Configurations and Selector Guide appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6715A–MAX6729A/MAX6797A General Description MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with respect to GND) VCC1, VCC2 ..........................................................-0.3V to +6V Open-Drain RST, RST1, RST2, PFO, RST ................-0.3V to +6V Push-Pull RST, RST1, PFO, RST...............-0.3V to (VCC1 + 0.3V) Push-Pull RST2 .........................................-0.3V to (VCC2 + 0.3V) RSTIN, PFI, MR, WDI ................................................-0.3V to +6V Input Current/Output Current (all pins) ...............................20mA Continuous Power Dissipation (TA = +70°C) 5-Pin SOT23-5 (derate 7.1mW/°C above +70°C) ........571mW 6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) ........696mW 8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) ........714mW Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Supply Voltage SYMBOL CONDITIONS VCC ICC1 Supply Current ICC2 VCC2 Reset Threshold 2 VTH1 VTH2 TYP 0.8 VCC1 < 5.5V all I/O connections open, outputs not asserted VCC1 < 3.6V all I/O connections open, outputs not asserted VCC2 < 3.6V all I/O connections open, outputs not asserted VCC2 < 2.75V all I/O connections open, outputs not asserted L (falling) VCC1 Reset Threshold MIN MAX UNITS 5.5 V 15 39 10 28 4 11 3 9 4.625 4.750 µA 4.500 M (falling) 4.250 4.375 4.500 T (falling) 3.000 3.075 3.150 S (falling) 2.850 2.925 3.000 R (falling) 2.550 2.625 2.700 Z (falling) 2.250 2.313 2.375 Y (falling) 2.125 2.188 2.250 W (falling) 1.620 1.665 1.710 V (falling) 1.530 1.575 1.620 T (falling) 3.000 3.075 3.150 S (falling) 2.850 2.925 3.000 R (falling) 2.550 2.625 2.700 Z (falling) 2.250 2.313 2.375 Y (falling) 2.125 2.188 2.250 W (falling) 1.620 1.665 1.710 V (falling) 1.530 1.575 1.620 I (falling) 1.350 1.388 1.425 H (falling) 1.275 1.313 1.350 G (falling) 1.080 1.110 1.140 F (falling) 1.020 1.050 1.080 E (falling) 0.810 0.833 0.855 D (falling) 0.765 0.788 0.810 _______________________________________________________________________________________ V V Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits (VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Reset Threshold Tempco Reset Threshold Hysteresis VCC to Reset Output Delay SYMBOL CONDITIONS TYP VHYST tRD tRP MAX UNITS 20 ppm/°C Referenced to VTH typical 0.5 % VCC1 = (VTH1 + 100mV) to (VTH1 - 100mV) or VCC2 = (VTH2 + 75mV) to (VTH2 - 75mV) 20 µs D1 Reset Timeout Period MIN ∆VTH/°C 1.1 1.65 2.2 D2 8.8 13.2 17.6 D7 (MAX6797A only) 17.5 26.25 35 D8 (MAX6797A only) 35 52.5 70 D3 140 210 280 D5 280 420 560 D6 560 840 1120 D4 1120 1680 2240 ms ADJUSTABLE RESET COMPARATOR INPUT (MAX6719A/MAX6720A/MAX6723A–MAX6727A) RSTIN Input Threshold VRSTIN 611 RSTIN Input Current IRSTIN -100 626.5 RSTIN Hysteresis RSTIN to Reset Output Delay tRSTIND VRSTIN to (VRSTIN - 30mV) 642 mV +100 nA 3 mV 22 µs POWER-FAIL INPUT (MAX6728A/MAX6729A) PFI Input Threshold PFI Input Current VPFI 611 IPFI -100 PFI Hysteresis VPFH PFI to PFO Delay tDPF 626.5 (VPFI + 30mV) to (VPFI - 30mV) 642 +100 mV nA 3 mV 2 µs MANUAL-RESET INPUT (MAX6715A–MAX6722A/MAX6725A–MAX6729A) 0.3 ✕ VCC1 VIL MR Input Voltage 0.7 ✕ VCC1 VIH MR Minimum Pulse Width 1 MR Glitch Rejection MR to Reset Delay tMR MR Pullup Resistance V µs 100 ns 200 ns 25 50 80 35 54 72 1.12 1.68 2.24 kΩ WATCHDOG INPUT (MAX6721A–MAX6729A) Watchdog Timeout Period tWD First watchdog period after reset timeout period Normal mode WDI Pulse Width WDI Input Voltage WDI Input Current tWDI (Note 2) 50 0.7 ✕ VCC1 VIH IWDI ns 0.3 ✕ VCC1 VIL WDI = 0V or VCC1 -1 s +1 V µA _______________________________________________________________________________________ 3 MAX6715A–MAX6729A/MAX6797A ELECTRICAL CHARACTERISTICS (continued) MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) (VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RESET/POWER-FAIL OUTPUTS RST/RST1/RST2/PFO Output LOW (Push-Pull or Open-Drain) RST/RST1/PFO Output HIGH (Push-Pull Only) RST2 Output HIGH (Push-Pull Only) RST Output HIGH (Push-Pull Only) VOL VOH VOH VOH VCC1 or VCC2 ≥ 0.8V, ISINK = 1µA, output asserted 0.3 VCC1 or VCC2 ≥ 1.0V, ISINK = 50µA, output asserted 0.3 VCC1 or VCC2 ≥ 1.2V, ISINK = 100µA, output asserted 0.3 VCC1 or VCC2 ≥ 2.7V, ISINK = 1.2mA, output asserted 0.3 VCC1 or VCC2 ≥ 4.5V, ISINK = 3.2mA, output asserted 0.4 VCC1 ≥ 1.8V, ISOURCE = 200µA, output not asserted 0.8 ✕ VCC1 VCC1 ≥ 2.7V, ISOURCE = 500µA, output not asserted 0.8 ✕ VCC1 VCC1 ≥ 4.5V, ISOURCE = 800µA, output not asserted 0.8 ✕ VCC1 VCC1 ≥ 1.8V, ISOURCE = 200µA, output not asserted 0.8 ✕ VCC2 VCC1 ≥ 2.7V, ISOURCE = 500µA, output not asserted 0.8 ✕ VCC2 VCC1 ≥ 4.5V, ISOURCE = 800µA, output not asserted 0.8 ✕ VCC2 VCC1 ≥ 1.0V, ISOURCE = 1µA, reset asserted 0.8 ✕ VCC1 VCC1 ≥ 1.8V, ISOURCE = 150µA, reset asserted 0.8 ✕ VCC1 VCC1 ≥ 2.7V, ISOURCE = 500µA, reset asserted 0.8 ✕ VCC1 VCC1 ≥ 4.5V, ISOURCE = 800µA, reset asserted 0.8 ✕ VCC1 V V V V VCC1 or VCC2 ≥ 1.8V, ISINK = 500µA, reset not asserted 0.3 VCC1 or VCC2 ≥ 2.7V, ISINK = 1.2mA, reset not asserted 0.3 VCC1 or VCC2 ≥ 4.5V, ISINK = 3.2mA, reset not asserted 0.4 RST/RST1/RST2/PFO Output Open-Drain Leakage Current Output not asserted 0.5 µA RST Output Open-Drain Leakage Current Output asserted 0.5 µA RST Output LOW (Push-Pull or Open Drain) VOL Note 1: Devices tested at TA = +25°C. Overtemperature limits are guaranteed by design and not production tested. Note 2: Parameter guaranteed by design. 4 _______________________________________________________________________________________ V Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +5V, VCC2 = +3.3V) 12 10 8 6 12 10 6 2 2 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 MAX6715A-29A toc03 10 ICC1 8 6 4 ICC2 ICC2 2 0 NORMALIZED/RESET WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE MAXIMUM VCC TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE 10 ICC1 6 1.008 1.004 1.000 0.996 0.992 0.988 0.984 ICC2 0.980 0 RESET OCCURS ABOVE THIS LINE 1000 100 10 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) RESET THRESHOLD OVERDRIVE (mV) NORMALIZED VCC RESET THRESHOLD vs. TEMPERATURE RESET INPUT AND POWER-FAIL INPUT THRESHOLD vs. TEMPERATURE VCC TO RESET DELAY vs. TEMPERATURE 1.007 1.006 636 RESET THRESHOLD 1.005 637 1.004 1.003 1.002 1.001 635 634 633 632 631 1 20 10 100 1000 75mV OVERDRIVE 19 VCC TO RESET DELAY (µs) 638 MAX6715A-29A toc07 1.008 MAX6715A-29A toc06 1.012 10,000 18 17 MAX6715A-29A toc09 TOTAL 1.016 TEMPERATURE (°C) MAXIMUM VCC TRANSIENT DURATION (µs) 14 1.020 RESET/WATCHDOG TIMEOUT PERIOD MAX6715A-29A toc04 SUPPLY CURRENT (µA) TOTAL 12 SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +1.8V, VCC2 = +1.2V) 4 RESET THRESHOLD 14 -40 -25 -10 5 20 35 50 65 80 95 110 125 16 2 16 TEMPERATURE (°C) 18 8 18 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 20 12 ICC1 8 4 ICC2 TOTAL 14 MAX6715A-29A toc05 4 16 20 SUPPLY CURRENT (µA) 14 18 MAX6715A-29A toc02 ICC1 20 SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +2.5V, VCC2 = +1.8V) MAX6715A-29A toc08 SUPPLY CURRENT (µA) 16 TOTAL SUPPLY CURRENT (µA) 18 MAX6715A-29A toc01 20 SUPPLY CURRENT vs. TEMPERATURE (VCC1 = +3.3V, VCC2 = +2.5V) 16 15 14 13 1.000 630 12 0.999 629 11 0.998 628 10 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX6715A–MAX6729A/MAX6797A Typical Operating Characteristics (VCC1 = 5V, VCC2 = 3.3V, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC1 = 5V, VCC2 = 3.3V, TA = +25°C, unless otherwise noted.) 22 20 18 16 MR TO RESET OUTPUT DELAY MAX6715A-29A toc12 30mV OVERDRIVE 1.9 1.8 1.7 MAX6715A-29A toc11 30mV OVERDRIVE 2.0 POWER-FAIL DELAY (µs) 24 POWER-FAIL INPUT TO POWER-FAIL OUTPUT DELAY vs. TEMPERATURE MAX6715A-29A toc10 RSTIN INPUT TO RESET OUTPUT DELAY vs. TEMPERATURE RSTIN TO RESET DELAY (µs) MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits VMR 2V/div 0V 1.6 1.5 1.4 1.3 VRST 2V/div 1.2 14 0V 1.1 12 1.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) 50ns/div Pin Description PIN MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A MAX6797A 1 6 1 1 1 1 1 1, 4 1 NAME FUNCTION RST/ RST1 Active-Low Reset Output, Open-Drain or Push-Pull. RST/RST1 changes from high to low when VCC1 or VCC2 drops below the selected reset thresholds, RSTIN is below threshold, MR is pulled low, or the watchdog triggers a reset. RST/RST1 remains low for the reset timeout period after VCC1/ VCC2/RSTIN exceed the device reset thresholds, MR goes low to high, or the watchdog triggers a reset. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. _______________________________________________________________________________________ Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits PIN MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A MAX6797A NAME FUNCTION Active-Low Reset Output, Open-Drain or Push-Pull. RST2 changes from high to low when VCC1 or VCC2 drops below the selected reset thresholds or MR is pulled low. RST2 remains low for the reset timeout period after VCC1/VCC2 exceed the device reset thresholds or MR goes low to high. Open-drain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC2. 5 — — — — — — — RST2 2 2 2 2 2 2 2 2 GND 3 3 3 3 — 5 5 5 MR 4 4 4 4 4 6 6 6 VCC2 6 5 6 6 6 8 8 8 VCC1 Ground Active-Low Manual-Reset Input. Internal 50kΩ pullup to VCC1. Pull low to force a reset. Reset remains active as long as MR is low and for the reset timeout period after MR goes high. Leave unconnected or connect to VCC1 if unused. Secondary Supply Voltage Input. Powers the device when it is above VCC1 and input for secondary reset threshold monitor. Primary Supply Voltage Input. Powers the device when it is above VCC2 and input for primary reset threshold monitor. _______________________________________________________________________________________ 7 MAX6715A–MAX6729A/MAX6797A Pin Description (continued) MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits Pin Description (continued) PIN MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A MAX6797A — — 8 — — — 5 5 — 3 5 3 7 3 7 3 — NAME FUNCTION WDI Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer runs out and the reset output asserts for the reset timeout period. The internal watchdog timer clears whenever a reset is asserted or WDI sees a rising or falling edge. The watchdog has a long startup period (35s min) after each reset event and a short watchdog timeout period (1.12s min) after the first valid WDI transition. Leave WDI unconnected to disable the watchdog timer. The WDI unconnected-state detector uses a small 200nA current source. Therefore, do not connect WDI to anything that will source more than 50nA. RSTIN Undervoltage Reset Comparator Input. Highimpedance input for adjustable reset monitor. The reset output is asserted when RSTIN falls below the 0.626V internal reference voltage. Set the monitored voltage reset threshold with an external resistor-divider network. Connect RSTIN to VCC1 or VCC2 if not used. _______________________________________________________________________________________ Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits PIN MAX6728A/ MAX6715A/ MAX6717A/ MAX6719A/ MAX6721A/ MAX6723A/ MAX6725A/ MAX6727A MAX6729A/ MAX6716A MAX6718A MAX6720A MAX6722A MAX6724A MAX6726A NAME FUNCTION MAX6797A — — — — — — — 7 PFI — — — — — — — 4 PFO — — — — — 4 — — RST Power-Fail Voltage Monitor Input. Highimpedance input for internal power-fail monitor comparator. Connect PFI to an external resistordivider network to set the power-fail threshold voltage (0.626V typical internal reference voltage). Connect to GND, VCC1, or VCC2 if not used. Active-Low Power-Fail Monitor Output, OpenDrain or Push-Pull. PFO is asserted low when PFI is less than 0.626V. PFO deasserts without a reset timeout period. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. Active-High Reset Output, Open-Drain or Push-Pull. RST changes from low to high when VCC1 or VCC2 drops below selected reset thresholds, RSTIN is below threshold, MR is pulled low, or the watchdog triggers a reset. RST remains HIGH for the reset timeout period after VCC1/VCC2/RSTIN exceed the device reset thresholds, MR goes low to high, or the watchdog triggers a reset. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. _______________________________________________________________________________________ 9 MAX6715A–MAX6729A/MAX6797A Pin Description (continued) MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits Detailed Description Supply Voltages The MAX6715A–MAX6729A/MAX6797A µP supervisory circuits maintain system integrity by alerting the µP to fault conditions. These ICs are optimized for systems that monitor two or three supply voltages. The outputreset state is guaranteed to remain valid while either VCC1 or VCC2 is above 0.8V. Adjustable Input Voltage The MAX6719A/MAX6720A and MAX6723A–MAX6727A provide an additional input to monitor a third system voltage. The threshold voltage at RSTIN is typically 626mV. Connect a resistor-divider network to the circuit as shown in Figure 1 to establish an externally controlled threshold voltage, VEXT_TH. VEXT_TH = 626mV((R1 + R2)/R2) Threshold Levels Input-voltage threshold level combinations are indicated by a two-letter code in the Reset Voltage Threshold Suffix Guide (Table 1). Contact factory for availability of other voltage threshold combinations. Reset Outputs The MAX6715A–MAX6729A/MAX6797A provide an active-low reset output (RST) and the MAX6725A/ MAX6726A also provide an active-high (RST) output. RST, RST, RST1, and RST2 are asserted when the voltage at either V CC1 or V CC2 falls below the voltage threshold level, RSTIN drops below threshold, or MR is pulled low. Once reset is asserted, it stays low for the reset timeout period (see Table 2). If VCC1, VCC2, or RSTIN goes below the reset threshold before the reset timeout period is completed, the internal timer restarts. The MAX6715A/MAX6717A/MAX6719A/MAX6721A/ MAX6723A/MAX6725A/MAX6727A/MAX6728A contain open-drain reset outputs, while the MAX6716A/ MAX6718A/MAX6720A/MAX6722A/MAX6724A/ MAX6726A/MAX6729A/MAX6797A contain push-pull reset outputs. The MAX6727A provides two separate open-drain RST outputs driven by the same internal logic. Manual-Reset Input Many µP-based products require manual-reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic-low on MR asserts the reset output. Reset remains asserted while MR is low for the reset timeout period (tRP) after MR returns high. This input has an internal 50kΩ pullup resistor to VCC1 and can be left unconnected if not used. MR can be driven with CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manualreset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. Low-leakage current at RSTIN allows the use of largevalued resistors resulting in reduced power consumption of the system. Watchdog Input The watchdog monitors µP activity through the watchdog input (WDI). To use the watchdog function, connect WDI to a bus line or µP I/O line. When WDI remains high or low for longer than the watchdog timeout period, the reset output asserts. The MAX6721A–MAX6729A/MAX6797A include a dualmode watchdog timer to monitor µP activity. The flexible timeout architecture provides a long period initial watchdog mode, allowing complicated systems to complete lengthy boots, and a short period normal watchdog mode, allowing the supervisor to provide quick alerts when processor activity fails. After each reset event (VCC power-up/brownout, manual reset, or watchdog reset), there is a long initial watchdog period of 35s minimum. The long watchdog period mode provides an extended time for the system to power-up and fully initialize all µP and system components before assuming responsibility for routine watchdog updates. VEXT_TH R1 MAX6719A/ MAX6720A/ MAX6723A– RSTIN MAX6727A R2 GND Figure 1. Monitoring a Third Voltage 10 ______________________________________________________________________________________ Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits Power-Fail Comparator PFI is the noninverting input to a comparator. If PFI is less than VPFI (626.5mV), PFO goes low. Common uses for the power-fail comparator include monitoring preregulated input of the power supply (such as a battery) or providing an early power-fail warning so software can conduct an orderly system shutdown. It can also be used to monitor supplies other than VCC1 or VCC2 by setting the power-fail threshold with a resistor-divider, as shown in Figure 3. PFI is the input to the power-fail comparator. The typical comparator delay is 2µs from PFI to PFO. Connect PFI to ground of VCC1 if unused. Ensuring a Valid Reset Output Down to VCC = 0V The MAX6715A–MAX6729A/MAX6797A are guaranteed to operate properly down to VCC = 0.8V. In applications that require valid reset levels down to VCC = 0V, use a pulldown resistor at RST to ground. The resistor value used is not critical, but it must be large enough not to load the reset output when VCC is above the reset threshold. For most applications, 100kΩ is adequate. This configuration does not work for the open-drain outputs of the MAX6715A/MAX6717A/MAX6719A/MAX6721A/ MAX6723A/MAX6725A/MAX6727A/MAX6728A. For pushpull, active-high RST output connect the external resistor as a pullup from RST to VCC1. A) VIN MAX6728A/ MAX6729A/ MAX6797A R1 PFI VTRIP = VPFI ( R1R2+ R2 ) PFO R2 GND B) VTH VCC VCC tWDI-NORMAL 1.12s MAX MAX6728A/ MAX6729A/ MAX6797A R1 tWDI-STARTUP 35s MAX PFI WDI PFO [ ( VTRIP = R2 (VPFI) ) 1 + 1 - VCC R1 R2 R1 ] VPFI = 626.5mV R2 1.12s MAX VIN GND RST tRP Figure 2. Normal Watchdog Startup Sequence Figure 3. Using Power-Fail Input to Monitor an Additional Power-Supply a) VIN is Positive b) VIN is Negative ______________________________________________________________________________________ 11 MAX6715A–MAX6729A/MAX6797A The normal watchdog timeout period (1.12s min) begins after the first transition on WDI before the conclusion of the long initial watchdog period (Figure 2). During the normal operating mode, the supervisor will issue a reset pulse for the reset timeout period if the µP does not update the WDI with a valid transition (high-tolow or low-to-high) within the standard timeout period (1.12s min). Leave WDI unconnected to disable the watchdog timer. The WDI unconnected-state detector uses a small (200nA typ) current source. Therefore, do not connect WDI to anything that will source more than 50nA. MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits Applications Information Interfacing to µPs with Bidirectional Reset Pins Most µPs with bidirectional reset pins can interface directly to open-drain RST output options. Systems simultaneously requiring a push-pull RST output and a bidirectional reset interface can be in logic contention. To prevent contention, connect a 4.7kΩ resistor between RST and the µP’s reset I/O port as shown in Figure 4. Adding Hysteresis to the Power-Fail Comparator The power-fail comparator has a typical input hysteresis of 3mV. This is sufficient for most applications where a power-supply line is being monitored through an external voltage-divider (see the Power-Fail Comparator section). If additional noise margin is desired, connect a resistor between PFO and PFI as shown in Figure 5. Select the values of R1, R2, and R3 so PFI sees VPFI (626mV) when VEXT falls to its power-fail trip point (VFAIL) and when VIN rises to its power-good trip point (VGOOD). The hysteresis window extends between the specified VFAIL and VGOOD thresholds. R3 adds the additional hysteresis by sinking current from the R1/R2 divider network when PFO is logic-low and sourcing current into the network when PFO is logic-high. R3 is typically an order of magnitude greater than R1 or R2. The current through R2 should be at least 2.5µA to ensure that the 100nA (max) PFI input current does not significantly shift the trip points. Therefore, R2 < VPFI/10µA < 62kΩ for most applications. R3 will provide additional hysteresis for PFO push-pull (VOH = VCC1) or open-drain (VOH = VPULLUP) applications. Monitoring an Additional Power Supply These µP supervisors can monitor either positive or negative supplies using a resistor voltage-divider to PFI. PFO can be used to generate an interrupt to the µP or cause reset to assert (Figure 3). Monitoring a Negative Voltage The power-fail comparator can be used to monitor a negative supply voltage using the circuit shown in Figure 3. When the negative supply is valid, PFO is low. When the negative supply voltage drops, PFO goes high. The circuit’s accuracy is affected by the PFI threshold tolerance, VCC, R1, and R2. Negative-Going VCC Transients The MAX6715A–MAX6729A/MAX6797A supervisors are relatively immune to short-duration negative-going VCC transients (glitches). It is usually undesirable to reset the µP when VCC experiences only small glitches. The Typical Operating Characteristics show Maximum Transient Duration vs. Reset Threshold Overdrive, for which reset pulses are not generated. The graph was produced using negative-going VCC pulses, starting above VTH and ending below the reset threshold by the RESET TO OTHER SYSTEM COMPONENTS VCC1 VCC2 R3 A VIN MAX6715A– MAX6729A/ MAX6797A VCC2 RST VEXT µP 4.7kΩ R1 PFI PFO R2 GND Figure 4. Interfacing to µPs with Bidirectional Reset I/O 12 PFO MAX6729A RESET VCC1 GND VGOOD VFAIL GND VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD VOH = VCC1 (FOR PUSH-PULL PFO) R2 = 50kΩ (FOR > 10µA R2 CURRENT) R1 = R2 ((VGOOD - VPFI) - (VPFI)(VGOOD - VFAIL)/VOH)/VPFI R3 = (R1 x VOH)/(VGOOD - VFAIL) Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO ______________________________________________________________________________________ Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits START SET WDI HIGH Watchdog Software Considerations Setting and resetting the watchdog input at different points in the program, rather than “pulsing” the watchdog input high-low-high or low-high-low, helps the watchdog timer to closely monitor software execution. This technique avoids a “stuck” loop where the watchdog timer continues to be reset within the loop, keeping the watchdog from timing out. Figure 6 shows an example flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, then set high again when the program returns to the beginning. If the program should “hang” in any subroutine, the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. MAX6715A–MAX6729A/MAX6797A magnitude indicated (reset threshold overdrive). The graph shows the maximum pulse width that a negativegoing VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. A 0.1µF bypass capacitor mounted close to the VCC pin provides additional transient immunity. PROGRAM CODE SUBROUTINE OR PROGRAM LOOP SET WDI LOW HANG IN SUBROUTINE SUBROUTINE COMPLETED RETURN Figure 6. Watchdog Flow Diagram ______________________________________________________________________________________ 13 Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits MAX6715A–MAX6729A/MAX6797A Functional Diagram VCC1 VCC1 MR MR PULLUP VCC1 VCC1 VCC2 VREF RESET TIMEOUT PERIOD VCC2 RST RESET OUTPUT DRIVER RST RSTIN/PFI PFO VCC1 VREF VCC1 WATCHDOG TIMER WDI VREF/2 14 ______________________________________________________________________________________ Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits PART NUMBER NUMBER OF VOLTAGE MONITORS OPENDRAIN RESET OPENDRAIN RESET PUSHPULL RESET PUSHPULL RESET MANUAL RESET WATCHDOG INPUT POWERFAIL INPUT/ OUTPUT MAX6715A 2 2 — — — √ — — MAX6716A 2 — — 2 — √ — — MAX6717A 2 1 — — — √ — — MAX6718A 2 — — 1 — √ — — MAX6719A 3 1 — — — √ — — MAX6720A 3 — — 1 — √ — — MAX6721A 2 1 — — — √ √ — MAX6722A 2 — — 1 — √ √ — MAX6723A 3 1 — — — — √ — MAX6724A 3 — — 1 — — √ — MAX6725A 3 1 1 — — √ √ — MAX6726A 3 — — 1 1 √ √ — MAX6727A 3 2 — — — √ √ — MAX6728A 2 1 — — — √ √ √ (open drain) MAX6729A 2 — — 1 — √ √ √ (push-pull) MAX6797A 2 — — 1 — √ √ √ (open drain) Ordering Information (continued) PART TEMP RANGE PINPACKAGE MAX6721AUT_ _D_+T -40°C to +125°C 6 SOT23 MAX6722AUT_ _D_+T -40°C to +125°C 6 SOT23 MAX6723AUT_ _D_+T -40°C to +125°C 6 SOT23 MAX6724AUT_ _D_+T -40°C to +125°C 6 SOT23 MAX6725AKA_ _D_+T -40°C to +125°C 8 SOT23 MAX6726AKA_ _D_+T -40°C to +125°C 8 SOT23 MAX6727AKA_ _D_+T -40°C to +125°C 8 SOT23 MAX6728AKA_ _D_+T -40°C to +125°C 8 SOT23 MAX6729AKA_ _D_+T -40°C to +125°C 8 SOT23 MAX6797AKA_ _D_+T -40°C to +125°C 8 SOT23 +Denotes a lead-free/RoHS-compliant package. T = Tape and reel. Note: The first “_ _” are placeholders for the threshold voltage levels of the devices. Desired threshold levels are set by the part number suffix found in the Reset Voltage Threshold Suffix Guide. The “_” after the D is a placeholder for the reset timeout delay time. Desired delay time is set using the timeout period suffix found in the Reset Timeout Period Suffix Guide. For example, the MAX6716AUTLTD3-T is a dual-voltage supervisor V TH 1 = 4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period. ______________________________________________________________________________________ 15 MAX6715A–MAX6729A/MAX6797A Selector Guide MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits Table 1. Reset Voltage Threshold Suffix Guide** PART NUMBER SUFFIX (_ _) VCC1 NOMINAL VOLTAGE THRESHOLD (V) VCC2 NOMINAL VOLTAGE THRESHOLD (V) LT 4.625 3.075 MS 4.375 MR Table 2. Reset Timeout Period Suffix Guide ACTIVE TIMEOUT PERIOD TIMEOUT PERIOD SUFFIX MIN (ms) D1 1.1 2.2 D2 8.8 17.6 2.925 D7† 17.5 35.0 4.375 2.625 D8† 35.0 70.0 TZ 3.075 2.313 D3 140 280 SY 2.925 2.188 D5 280 560 RY 2.625 2.188 D6 560 1120 TW 3.075 1.665 D4 1120 2240 SV 2.925 1.575 RV 2.625 1.575 TI 3.075 1.388 SH 2.925 1.313 RH 2.625 1.313 TG 3.075 1.110 SF 2.925 1.050 RF 2.625 1.050 TE 3.075 0.833 SD 2.925 0.788 RD 2.625 0.788 ZW 2.313 1.665 YV 2.188 1.575 ZI 2.313 1.388 YH 2.188 1.313 ZG 2.313 1.110 YF 2.188 1.050 ZE 2.313 0.833 YD 2.188 0.788 WI 1.665 1.388 VH 1.575 1.313 WG 1.665 1.110 VF 1.575 1.050 WE 1.665 0.833 VD 1.575 0.788 †D7 and D8 timeout periods are only available for the MAX6797A. **Standard versions are shown in bold and are available in a D3 timeout option only. Standard versions require 2,500 piece order increments and are typically held in sample stock. There is a 10,000 order increment on nonstandard versions. Other threshold voltages may be available, contact factory for availability. 16 MAX (ms) ______________________________________________________________________________________ Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits TOP VIEW RST1 1 GND 2 MAX6715A/ MAX6716A MR 3 6 VCC1 RST 1 5 RST2 GND 2 4 VCC2 MR 3 SOT23 VCC1 RST 1 MAX6717A/ MAX6718A MAX6719A/ MAX6720A GND 2 VCC2 4 MR 3 SOT23 RST 1 GND 2 5 MAX6721A/ MAX6722A MR 3 6 VCC1 RST 1 5 WDI GND 2 4 VCC2 WDI 3 SOT23 1 GND 2 MAX6723A/ MAX6724A 6 VCC1 5 RSTIN 4 VCC2 8 VCC1 RST 1 7 RSTIN GND 2 3 6 VCC2 WDI RST 4 5 MR PFO 4 SOT23 RST 1 GND 2 WDI RSTIN 4 VCC2 MAX6725A/ MAX6726A 3 8 VCC1 7 RSTIN 6 VCC2 5 MR RST 4 3 MAX6728A/ MAX6729A/ MAX6797A 8 VCC1 7 PFI 6 VCC2 5 MR SOT23 Chip Information TRANSISTOR COUNT: 1072 PROCESS: BiCMOS 5 SOT23 MAX6727A WDI VCC1 SOT23 SOT23 RST 6 Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 5 SOT23 U5-1 21-0057 6 SOT23 U6-1 21-0058 8 SOT23 K8SN-1 21-0078 ______________________________________________________________________________________ 17 MAX6715A–MAX6729A/MAX6797A Pin Configurations MAX6715A–MAX6729A/MAX6797A Dual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits Revision History REVISION NUMBER REVISION DATE 0 4/06 Initial release 1 7/06 Updated Ordering Information. 2 6/08 Added the MAX6797A to Ordering Information, Electrical Characteristics, Pin Description, Detailed Description, Figures 4 and 5, Selector Guide, Table 2, Pin Configurations. 3 9/08 Updated Selector Guide. DESCRIPTION PAGES CHANGED — 1, 15 1, 2, 6–11, 12, 15–17 15 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products Heaney is a registered trademark of Maxim Integrated Products, Inc.