MICREL MIC2124YMM

MIC2124
Constant Frequency, Synchronous
Current Mode Buck Controller
Hyper Speed Control™ Family
General Description
Features
The Micrel MIC2124 is a member of the Hyper Speed
Contro™l family of DC-DC controllers. It uses an adaptive
on-time current mode control scheme and operates at a
constant frequency.
The MIC2124 operates over a supply range of +3V to
+18V, and is independent of the IC supply voltage VIN. It
operates at a fixed 300kHz switching frequency and can
be used to provide up to 25A of output current. The output
voltage is adjustable down to +0.8V.
The MIC2124 includes an EN/COMP pin that can be
pulled low to shut down the converter. The MIC2124
optimizes performance and ensures stability with external
compensation.
The UVLO is provided to ensure proper operation under
power-sag conditions and to make sure that the external
power MOSFET has enough voltage to work with. An
internal digital soft-start ensures reduced inrush current.
Cycle-by-cycle current limiting ensures FET protection.
The MIC2124 is available in a 10-pin MSOP package with
a junction temperature operating range from –40ºC to
+125ºC.
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+3V to +18V input voltage
25A output current capability
TM
Any Capacitor stable
- Zero ESR to high ESR
Output down to 0.8V with ±1% FB accuracy
Up to 94% efficiency
300kHz switching frequency
All N-Channel MOSFET design
Shutdown feature with EN/COMP
No current-sense resistor needed
Internal 4ms digital soft-start
Thermal shutdown
Pre-bias output safe
Cycle-by-Cycle foldback current-limit protection
10-pin MSOP package
–40ºC to +125ºC junction temperature range
Applications
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Printers and scanners
Graphic and video cards
PCs and servers
Microprocessor core supply
Low-voltage distributed power
Telecommunication and networking
Set-top box, gateways and router
Typical Application
12V to 3.3V Efficiency
100
EFFICIENCY (%)
90
80
70
VHSD = 12V
VIN = 5V
60
MIC2124 Adjustable Output 300kHz Buck Converter
0
2
4
6
8
O UT PUT CURRENT (A)
Hyper Speed Control and Any Capacitor are trademarks of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
June 2010
M9999-060810-D
10
Micrel, Inc.
MIC2124
Ordering Information
Part Number
Voltage
Switching Frequency
Junction Temp. Range
Package
Lead Finish
Adj.
300kHz
–40° to +125°C
10-Pin MSOP
Pb-Free
MIC2124YMM
Pin Configuration
10-Pin MSOP (MM)
Pin Description
Pin Number
Pin Name
1
HSD
2
EN/COMP
3
FB
4
GND
5
IN
6
DL
7
PGND
8
DH
9
LX
10
BST
June 2010
Pin Function
High-Side N-MOSFET Drain Connection (Input): Input voltage for the internal sensing of external
power stage supply. The HSD operating voltage range is from 3V to 18V. Input capacitors between
HSD and the power ground (PGND) are required.
Enable (Input): Floating = enable, logic low = shutdown. In the off state, supply current of the device is
greatly reduced (typically 1mA).
COMP (Output): Output of the gm error amplifier and connects to the components for the external
compensation.
Feedback (Input): Input to the transconductance amplifier of the control loop. The FB pin is regulated
to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output
voltage.
Signal ground. GND is the ground path for the device input voltage VIN and the control circuitry. The
loop for the signal ground should be separate from the power ground (PGND) loop.
Input Voltage (Input): Power to the internal reference and control sections of the MIC2124. The IN
operating voltage range is from 3V to 5.5V. A 2.2µF ceramic capacitors from IN to GND are
recommended for clean operation. Connect IN to HSD when VHSD < 5.5V.
Low-Side Drive (Output): High-current driver output for external low-side MOSFET. The DL driving
voltage swings from ground-to-IN.
Power Ground. PGND is the ground path for the MIC2124 buck converter power stage. The PGND
pin connects to the sources of low-side N-Channel MOSFETs, the negative terminals of input
capacitors, and the negative terminals of output capacitors. The loop for the power ground should be
as small as possible and separate from the Signal ground (GND) loop.
High-Side Drive (Output): High-current driver output for external high-side MOSFET. The DH driving
voltage is floating on the switch node voltage (LX). It swings from VLX to VBST.
Switch Node (Input): High-current output driver return. The LX pin connects directly to the switch
node. Due to the high speed switching on this pin, the LX pin should be routed away from sensitive
nodes.
Current Sense input (Input): LX pin also senses the current for the current mode control and short
circuit protection by monitoring the voltage across the low-side MOSFET during OFF time. In order to
sense the current accurately, connect the low-side MOSFET drain to LX using a Kelvin connection.
Boost (Output): Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is
connected between the IN pin and the BST pin. A boost capacitor of 0.1μF is connected between the
BST pin and the LX pin. Adding a small resistor at BST pin can slow down the turn-on time of highside N-Channel MOSFETs.
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MIC2124
Absolute Maximum Ratings(1)
Operating Ratings(2)
IN, FB to GND .................................................. -0.3V to +6V
BST to LX ......................................................... -0.3V to +6V
BST to GND ................................................... -0.3V to +35V
DH to LX.............................................-0.3V to (VBST + 0.3V)
DL, COMP to GND ...............................-0.3V to (VIN + 0.3V)
HSD to GND..................................................... -0.3V to 29V
PGND to GND ............................................... -0.3V to +0.3V
(3)
Power Dissipation TA=70°C ................... Internally Limited
Storage Temperature (TS)..........................-65°C to +150°C
Lead Temperature (soldering, 10sec) ........................ 260°C
Input Voltage (VIN) ............................................ 3.0V to 5.5V
Supply Voltage (VHSD) ....................................... 3.0V to 18V
Ambient Temperature (TA) ...........................-40°C to +85°C
Junction Temperature (TJ) .........................-40°C to +125°C
Junction Thermal Resistance MSOP (θJA) ............130°C/W
Junction Thermal Resistance MSOP (θJC) ..............43°C/W
Electrical Characteristics(5)
VHSD = 13.2V, VIN = 5V, VBST - VLX = 5V; TA = 25°C, unless noted. Bold values indicate -40°C ≤ TA ≤ +85°C.
Parameter
Conditions
Min
Typ
Max
Units
General
Operating Input Voltage (VIN)
(6)
HSD Voltage Range (VHSD)
Quiescent Supply Current
VFB = 1.5V
Shutdown Current
VEN/COMP = GND
3.0
5.5
V
3.0
18
V
1.4
2
mA
1
2
mA
2.7
2.93
V
Under-Voltage Lockout
Under-voltage Lockout Trip Level
2.5
Rising edge
UVLO Hysteresis
40
mV
DC-DC Controller
Depends on external components and the
maximum duty cycle.
0.8
FB Regulation Voltage
0°C ≤ TA ≤ 85°C
-1
±0.2
1
%
FB Regulation Voltage
-40°C ≤ TA ≤ 85°C
-2.5
±0.2
1
%
70
110
160
µS
2.3
V
1
500
nA
240
300
360
kHz
89
91
93
%
Output-Voltage Adjust Range
(VOUT)
V
Error Amplifier
Transconductance gm
0.5
COMP Output Voltage Swing
FB Input Leakage Current
VFB = 0.8V
On Timer
Switching Frequency
Maximum Duty Cycle
VHSD = 4V, VIN = 5V, VLX = 3.33V
Minimum Duty Cycle
FB > 0.8V
0
%
Short Current Protection
Current Limit 1
VFB = 0.8V
110
127
145
mV
Current Limit 2
VFB = 0V
21
36
51
mV
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Parameter
MIC2124
Conditions
Min
Typ
Max
Units
0.1
V
FET Drivers
DH, DL Output Low Voltage
ISINK = 10mA
DH, DL Output High Voltage
ISOURCE = 10mA, measured the difference
between VBST-VDH, VIN-VDL
0.1
V
DH On-Resistance, High State
2
3
Ω
DH On-Resistance, Low State
1.5
3
Ω
DL On-Resistance, High State
2
3
Ω
1
2
Ω
30
µA
DL On-Resistance, Low State
LX, BST, HSD Leakage Current
TA = 25°C
Thermal Protection
Over-temperature Shutdown
160
°C
Over-temperature Shutdown
Hysteresis
5
°C
Shutdown Control
0.5
EN/COMP Logic Level High
3V < VIN <5.5V
EN/COMP Logic Level Low
3V < VIN <5.5V
0.4
0.4
EN/COMP Hysteresis
3V < VIN <5.5V
26
EN/COMP Pull-up Current
VEN/COMP = 0V
47
V
0.25
V
mV
100
µA
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. The maximum allowable power dissipation of any TA is PD(max) = (TJ(max)-TA) / θJA. Exceeding the maximum allowable power dissipation will result in
excessive die temperature, and the regulator will go into thermal shutdown.
4. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
5. Specification for packaged product only.
6. The application is fully functional at low IN (supply of the control section) if the external MOSFETs have enough low voltage VTH.
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MIC2124
Typical Characteristics
Efficiency
vs. Load Current
Output Voltage Change
vs. Input Voltage
Output Voltage
vs. Load Current
100
2.60
VOUT = 2.5V
70
80
70
VOUT = 1.5V
60
VIN = V HSD = 5V
50
2.55
2.50
2.45
V IN = V HSD = 5V
40
0.1
1.0
VOUT = 2.5V
30
10
-10
VOUT = 0.8V
-30
VIN = VHSD
-50
-70
0
Output Voltage
vs. Input Voltage
1
2
3
LOAD CURRENT (A)
4
5
3.0
3.5
4.0
4.5
5.0
INPUT VOTLAGE (V)
5.5
Switching Frequency
vs. Input Voltage
0.810
SWITCHING FREQUENCY (kHz)
350
0.805
0.800
0.795
330
310
25°C
-40°C
290
270
85°C
IOUT = 5A
0.790
10.8
50
IOUT = 5A
2.40
10.0
LOAD CURRENT (A)
OUTPUT VOTLAGE (V)
OUTPUT VOTLAGE CHANGE(mV)
OUTPUT VOLTAGE (V)
EFFICIENCY (%)
90
IOUT = 2.5A
250
11.4
12.0
12.6
INPUT VOTLAGE (V)
June 2010
13.2
VIN = VHSD
VOUT = 1.8V
3.0
3.5
4.0
4.5
5.0
INPUT VOTLAGE (V)
5
5.5
M9999-060810-D
Micrel, Inc.
MIC2124
Functional Characteristics
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MIC2124
Typical Characteristics
Feedback Voltage
v s. Temperature
Switching Frequency
v s. HSD Voltage
Switching Frequency
v s. Load
0.805
360
360
340
340
0.802
0.801
0.800
0.799
0.798
VIN = 5V
0.797
0.796
0.795
320
300
280
VHSD = 12V
VIN = 5V
260
240
0
20 40 60 80 100 120
T EM PERAT URE (ºC)
CURRENT-LIMIT THRESHOLD (mV)
360
300
280
VHSD = 5V
VIN = 5V
260
2
4
6
8
OUT PUT CURRENT (A)
-40
-20
0
20 40 60 80 100 120
T EMPERAT URE (°C)
VIN = 5V
VOUT = 1.8V
IOUT = 5A
260
3
6
9
12
15
VHSD VO LT AGE (V)
18
Current Limit Threshold
v s. Temperature
FB = 0.8V
150
150
120
120
90
60
VIN= 5V
30
90
FB = 0V
60
30
0
0
240
280
10
Current-Limit Threshold
vs. Feedback Voltage
320
300
240
0
Switching Frequency
v s. Tem perature
340
320
CURRENT LIMIT THRESHOLD
(m V)
-40 -20
SWITCHING FREQUENCY (kHz)
SWITCHING FRE QUENCY (kHz)
0.803
SWITCHING FRE QUENCY (kHz)
FEEDBACK VOLTAG E (V)
0.804
0
20
40
60
80
FEEDBACK VOTLAGE (%)
100
-40
-20
0
20 40 60 80
T EM PERAT URE (°C)
100 120
Shutdown Current
v s. Input Voltage
SHUTDO WN CURRENT (μA)
1000
800
600
400
VHSD = 12V
200
0
3
June 2010
3.5
4
4.5
5
INPUT VO LT AG E (V)
5.5
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MIC2124
Functional Diagram
Figure 1. MIC2124 Block Diagram
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MIC2124
300kHz switching frequency. The actual ON-time varies
a little with the different rising and falling times of the
external MOSFETs. Therefore, the type of the external
MOSFETs, the output load current, and the control
circuitry power supply VIN will slightly modify the actual
ON-time and the switching frequency. Also, the minimum
TON, which is 140ns typical, results in a lower switching
frequency in high VHSD and low VOUT applications, such
as 18V to 0.8V. During the load transient, the switching
frequency is changed due to the varying OFF-time.
To illustrate the control loop, the steady-state scenario
and the load transient scenario are analyzed. VCOMP is
defined as the output of the error amplifier. Figure 2
shows the MIC2124 control loop timing during the
steady-state operation in continuous mode. VIL
represents the inductor current sensing voltage via the
bottom MOSFET RDS(ON) and “Bottom Current Sense
Circuit”. When VIL is below VCOMP, which means that the
inductor current reaches the valley value, the OFF-time
ends and ON-time is triggered. The ON-time is
predetermined by the estimation.
Functional Description
The MIC2124 is an adaptive on-time current mode
synchronous buck controller built for low cost and high
performance. It is designed for wide input voltage range
from 3V to 18V and for high output power buck
converters. An estimated-ON-time method is applied in
MIC2124 to obtain a constant switching frequency and to
simplify the control compensation. The over-current
protection is implemented without the use of an external
sense resistor. It includes an internal soft-start function
which reduces the power supply input surge current at
start-up by controlling the output voltage rise time.
Theory of Operation
The MIC2124 is an adaptive on-time current mode buck
controller. Figure 1 illustrates the block diagram for the
control loop. The output voltage variation due to load or
line changes will be sensed by the inverting input of the
transconductance error amplifier via the feedback
resistors (RFB1 and RFB2 in “Typical Application”), and
compared to a reference voltage at the non-inverting
input. This will cause a small change in the DC voltage
level at the output of the error amplifier, or VCOMP.
Meanwhile, the inductor current is sensed through the
bottom MOSFET RDS(ON) and “Bottom Current Sense
Circuit” as VIL. If VIL is lower than VCOMP, an ON-time
period is triggered, in which DH pin is logic high and DL
pin is logic low. The ON-time period length is
predetermined by the “Fixed Ton Estimator” circuitry:
TON(estimated) =
VOUT
VHSD ⋅ 300kHz
(1)
where VOUT is the output voltage, VHSD is the power
stage input voltage.
After an ON-time period, the MIC2124 goes into the
OFF-time period, in which DH pin is logic low and DL pin
is logic high. The inductor current and VIL decrease
during OFF time. If VIL is above VCOMP, the OFF status is
maintained. When VIL is below VCOMP, the ON-time
period is triggered and the OFF-time period ends. If the
OFF-time period determined by the inductor current and
VCOMP is less than the minimum OFF time TOFF(min), which
is 350ns typical, the MIC2124 control logic will apply the
TOFF(min) instead. TOFF(min) is required to maintain enough
energy in the Boost Capacitor (CBST) to drive the highside MOSFET. The maximum duty cycle is obtained
from the 350ns TOFF(min):
DMAX =
TS − TOFF(min)
TS
= 1−
Figure 2. MIC2124 Control Loop Timing
Figure 3 shows the load transient operation of the
MIC2124 converter. Assume the output voltage drops
due to sudden load increase, which would cause the
inverting input of the error amplifier, which is divided
down version of VOUT, to be slightly less than the
reference voltage, causing the output voltage of the error
amplifier VCOMP to go high. This will cause “CONTROL
LOGIC” to trigger ON-time period. At the end of the ONtime period, a minimum OFF-time TOFF(min) is generated
to charge BST since the inductor current VIL is still below
VCOMP. Then, the next ON-time period is triggered due to
the high VCOMP. Therefore, the switching frequency
changes during the load transient. Also the load
regulation and transient load recovery is done by
modulating the OFF-time. With the varying duty cycle
and switching frequency, the output recovery time is fast
and the output voltage deviation is small in MIC2124
converter.
350ns
TS
where TS = 1/300kHz = 3.33μs. It is not recommended to
use MIC2124 with a OFF-time close to TOFF(min) during
steady state operation.
The estimated ON-time method results in a constant
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MIC2124
until VLX > -127mV, and then goes into the ON status
with minimum ON-time. The current limit threshold VCL
has a fold back characteristic related to the FB voltage.
Please refer to the “Typical Characteristics” for the curve
of VCL vs. FB voltage. The circuit in Figure 4 illustrates
the MIC2124 current limiting circuit.
Figure 3. MIC2124 Load-Transient Response
Figure 4. MIC2124 Current Limiting Circuit
Unlike in current-mode control, the MIC2124 uses
adaptive ON-time current mode control. The MIC2124
predetermined ON-time control loop has the advantage
of constant ON-time mode control and eliminates the
need for the slope compensation.
Using the typical VCL value of -127mV, the current limit
value in the inductor is roughly estimated as:
ICL ≈
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2124 implements an internal digital soft-start by
making the 0.8V reference voltage VREF ramp from 0 to
100% in about 4ms. Therefore, the output voltage is
controlled to increase slowly by a stair-case VREF ramp.
Once the soft-start cycle ends, the related circuitry is
disabled to reduce current consumption. VIN must be
powered up no earlier than VHSD to make the soft-start
function behavior correctly.
For designs where the inductor current ripple is
significant compared to the load current IOUT, or for low
duty cycle operation, calculating the load current limit
ICL(LOAD) should take into account that one is sensing the
peak inductor current.
ICL(LOAD) =
ΔIL(pp) =
127mV ΔIL(pp)
−
RDS(ON)
2
VOUT × (1− D)
f SW ×L
(2)
(3)
where:
VOUT = The output voltage
ΔIL(pp) = Inductor current ripple peak-to-peak value
D = Duty Cycle
fSW = Switching frequency
The MOSFET RDS(ON) varies 30% to 40% with
temperature; therefore, it is recommended to add 50%
margin to ICL(LOAD) in the above equation to avoid false
current limiting due to increased MOSFET junction
temperature rise. It is also recommended to connect LX
pin directly to the drain of the low-side MOSFET to
accurately sense the MOSFETs RDS(ON)
Current Limit
The MIC2174/MIC2174C uses the RSD(ON) of the lowside power MOSFET to sense over-current conditions.
This method will avoid adding cost, board space and
power losses taken by a discrete current sense resistor.
The low-side MOSFET is used because it displays much
lower parasitic oscillations during switching than the
high-side MOSFET.
In each switching cycle of the MIC2124 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. The sensed voltage VLX is
compared with a current-limit threshold voltage VCL after
a blanking time of 150ns. If the sensed voltage VLX is
under VCL, which is -127mV typical at 0.8V feedback
voltage, the MIC2124 keeps the low-side MOSFET on
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R DS(ON)
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MIC2124
hold the gate voltage with minimal droop for the power
stroke (high-side switching) cycle, i.e., ΔBST = 10mA x
3.33μs/0.1μF = 333mV. When the low-side MOSFET is
turned back on, CBST is recharged through D1. A small
resistor RG, which is in series with CBST, can be used to
slow down the turn-on time of the high-side N-Channel
MOSFET.
The drive voltage is derived from the supply voltage VIN.
The nominal low-side gate drive voltage is VIN and the
nominal high-side gate drive voltage is approximately
VIN - VDIODE, where VDIODE is the voltage drop across D1.
A dead-time of approximate 30ns between the high-side
and low-side driver transitions is used to prevent current
from simultaneously flowing unimpeded through both
MOSFETs.
MOSFET Gate Drive
The MIC2124 high-side drive circuit is designed to
switch an N-Channel MOSFET. The typical application
circuit shows a bootstrap circuit, consisting of a Schottky
diode D1 and 0.1μF boostrap capacitor CBST, as shown
in the typical application schematic on Page 1. This
circuit supplies energy to the high-side drive circuit.
Capacitor CBST is charged while the low-side MOSFET is
on and the voltage on the LX pin is approximately 0V.
When the high-side MOSFET driver is turned on, energy
from CBST is used to turn the MOSFET on. As the highside MOSFET turns on, the voltage on the LX pin
increases to approximately VHSD. Diode D1 is reversed
biased and CBST floats high while continuing to keep the
high-side MOSFET on. The bias current of the high-side
driver is less than 10mA so a 0.1μF to 1μF is sufficient to
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MIC2124
For the low-side MOSFET:
Application Information
IG[low - side] (avg) = C ISS × VGS × f SW
MOSFET Selection
The MIC2124 controller works from input voltages of 3V
to 18V and has an external 3V to 5.5V VIN supply to
provide power to turn the external N-Channel power
MOSFETs for the high-side and low-side switches. For
applications where VIN < 5V, it is necessary that the
power MOSFETs used are sub-logic level and are in full
conduction mode for VGS of 2.5V. For applications when
VIN > 5V; logic-level MOSFETs, whose operation is
specified at VGS = 4.5V must be used.
There are different criteria for choosing the high-side and
low-side MOSFETs. These differences are more
significant at lower duty cycles such as 12V to 1.8V
conversion. In such an application, the high-side
MOSFET is required to switch as quickly as possible to
minimize transition losses, whereas the low-side
MOSFET can switch slower, but must handle larger
RMS currents. When the duty cycle approaches 50%,
then the on-resistance of the high-side MOSFET starts
to become critical.
It is important to note that the on-resistance of a
MOSFET increases with increasing temperature. A 75°C
rise in junction temperature will increase the channel
resistance of the MOSFET by 50% to 75% of the
resistance specified at 25°C. This change in resistance
must be accounted for when calculating MOSFET power
dissipation and in calculating the value of current limit.
Total gate charge is the charge required to turn the
MOSFET on and off under specified operating conditions
(VDS and VGS). The gate charge is supplied by the
MIC2124 gate-drive circuit. At 300kHz switching
frequency and above, the gate charge can be a
significant source of power dissipation in the MIC2124.
At low output load, this power dissipation is noticeable
as a reduction in efficiency. The average current
required to drive the high-side MOSFET is:
IG[high-side] (avg) = Q G × f SW
Since the current from the gate drive comes from the
VIN, the power dissipated in the MIC2124 due to gate
drive is:
PGATEDRIVE = VIN .(IG[high - side] (avg) + IG[low -side] (avg))
(6)
A convenient figure of merit for switching MOSFETs is
the on-resistance times the total gate charge RDS(ON) ×
QG. Lower numbers translate into higher efficiency. Low
gate-charge logic-level MOSFETs are a good choice for
use with the MIC2124. Also, the RDS(ON) of the low-side
MOSFET will determine the current limit value. Please
refer to “Current Limit” subsection in “Functional
Description” for more details.
Parameters that are important to MOSFET switch
selection are:
•
Voltage rating
•
On-resistance
•
Total gate charge
The voltage ratings for the high-side and low-side
MOSFETs are essentially equal to the power stage input
voltage VHSD. A safety factor of 20% should be added to
the VDS(max) of the MOSFETs to account for voltage
spikes due to circuit parasitic elements.
The power dissipated in the MOSFETs is the sum of the
conduction losses during the on-time (PCONDUCTION) and
the switching losses during the period of time when the
MOSFETs turn on and off (PAC).
PSW = PCONDUCTION + PAC
(7)
2
PCONDUCTION = ISW(RMS) × R DS(ON)
(8)
PAC = PAC(off ) + PAC(on)
(9)
where:
RDS(ON) = on-resistance of the MOSFET switch
D = Duty Cycle = VOUT / VHSD
Making the assumption that the turn-on and turn-off
transition times are equal; the transition times can be
approximated by:
(4)
where:
IG[high-side](avg) = Average high-side MOSFET gate
current
QG = Total gate charge for the high-side MOSFET taken
from the manufacturer’s data sheet for VGS = VIN.
fSW = Switching Frequency (300kHz)
The low-side MOSFET is turned on and off at VDS = 0
because an internal body diode or external freewheeling
diode is conducting during this time. The switching loss
for the low-side MOSFET is usually negligible. Also, the
gate-drive current for the low-side MOSFET is more
accurately calculated using CISS at VDS = 0 instead of
gate charge.
June 2010
(5)
tT =
C ISS × VIN + C OSS × VHSD
IG
(10)
where:
CISS and COSS are measured at VDS = 0
IG = gate-drive current
The total high-side MOSFET switching loss is:
PAC = (VHSD + VD ) × IPK × t T × f SW
12
(11)
M9999-060810-D
Micrel, Inc.
MIC2124
Lower cost iron powder cores may be used but the
increase in core loss will reduce the efficiency of the
power supply. This is especially noticeable at low output
power. The winding resistance decreases efficiency at
the higher output current levels. The winding resistance
must be minimized although this usually comes at the
expense of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower output
currents, the core losses can be a significant contributor.
Core loss information is usually available from the
magnetics vendor. Copper loss in the inductor is
calculated by the equation below:
where:
tT = Switching transition time
VD = Body diode drop (0.5V)
fSW = Switching Frequency (300kHz)
The low-side MOSFET switching losses are negligible
and can be ignored for these calculations.
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak-to-peak inductor ripple current. Generally, higher
inductance values are used with higher input voltages.
Larger peak-to-peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor. A good compromise between size,
loss and cost is to set the inductor ripple current to be
equal to 20% of the maximum output current. The
inductance value is calculated by the equation below.
L=
(
VOUT ⋅ VHSD(max) − VOUT
)
VHSD ⋅ f SW ⋅ 20% ⋅ I OUT(max)
2
PINDUCTORCu = IL(RMS) ⋅ R WINDING
The resistance of the copper wire, RWINDING, increases
with the temperature. The value of the winding
resistance used should be at the operating temperature.
R WINDING(Ht) = R WINDING(20 °C) ⋅ (1 + 0.0042 ⋅ (TH − T20°C ))
(17)
where:
TH = temperature of wire under full load
T20°C = ambient temperature
RWINDING(20°C) = room temperature winding resistance
(usually specified by the manufacturer)
(12)
where:
fSW = switching frequency, 300 kHz
20% = ratio of AC ripple current to DC output current
VHSD(max) = maximum power stage input voltage
The peak-to-peak inductor current ripple is:
ΔIL(PP) =
VOUT ⋅ (VHSD(max) − VOUT )
VHSD(max) ⋅ f SW ⋅ L
Output Capacitor Selection
The type of the output capacitor is usually determined by
its ESR (equivalent series resistance). Voltage and RMS
current capability are two other important factors for
selecting the output capacitor. Recommended capacitors
are tantalum, low-ESR aluminum electrolytic, OS-CON
and POSCAPS. The output capacitor’s ESR is usually
the main cause of the output ripple. The output capacitor
ESR also affects the control loop from a stability point of
view. See “Feedback Loop Compensation” section for
more information. The maximum value of ESR is
calculated:
(13)
The peak inductor current is equal to the average output
current plus one half of the peak-to-peak inductor current
ripple.
IL(pk) = I OUT(max) + 0.5 × ΔIL(PP)
(14)
2
The RMS inductor current is used to calculate the I R
losses in the inductor.
2
IL(RMS) = I OUT(max) +
ΔIL(PP)
12
ESR COUT ≤
ΔVOUT(PP)
(18)
ΔIL(PP)
where:
ΔVOUT(PP) = peak-to-peak output voltage ripple
ΔIL(PP) = peak-to-peak inductor current ripple
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated below:
2
(15)
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance. The
high frequency operation of the MIC2124 requires the
use of ferrite materials for all but the most cost sensitive
applications.
June 2010
(16)
2
ΔVOUT(PP)
13
ΔIL(PP)
⎞
⎛
2
⎟ + ΔIL(PP) ⋅ ESR C
= ⎜⎜
OUT
⎟
C
f
8
⋅
⋅
⎠
⎝ OUT SW
(19)
(
)
M9999-060810-D
Micrel, Inc.
MIC2124
where:
D = duty cycle
COUT = output capacitance value
fSW = switching frequency
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated below:
ICOUT (RMS) =
ΔIL(PP)
R2 =
VREF ⋅ R1
VOUT − VREF
(26)
(20)
12
The power dissipated in the output capacitor is:
2
PDISS(COUT ) = I COUT (RMS) ⋅ ESR COUT
Figure 5. Voltage-Divider Configuration
(21)
External Schottky Diode (Optional)
An external freewheeling diode, which is not necessary,
is used to keep the inductor current flow continuous
while both MOSFETs are turned off. This dead-time
prevents current from flowing unimpeded through both
MOSFETs and is typically 30ns. The diode conducts
twice during each switching cycle. Although the average
current through this diode is small, the diode must be
able to handle the peak current.
Input Capacitor Selection
The input capacitor for the power stage input VHSD
should be selected for ripple current rating and voltage
rating. Tantalum input capacitors may fail when
subjected to high inrush currents, caused by turning the
input supply on. A tantalum input capacitor’s voltage
rating should be at least two times the maximum input
voltage to maximize reliability. Aluminum electrolytic,
OS-CON, and multilayer polymer film capacitors can
handle the higher inrush currents without voltage derating. The input voltage ripple will primarily depend on
the input capacitor’s ESR. The peak input current is
equal to the peak inductor current, so:
ΔVIN = IL(pk) ⋅ ESR CIN
ID(avg) = IOUT ⋅ 2 ⋅ 30ns ⋅ f SW
The reverse voltage requirement of the diode is:
VDIODE(rrm) = VHSD
The power dissipated by the Schottky diode is:
(22)
PDIODE = ID(avg) × VF
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
ICIN (RMS) ≈ IOUT(MAX) ⋅ D ⋅ (1 − D)
2
(23)
(24)
Voltage Setting Components
The MIC2124 requires two resistors to set the output
voltage as shown in Figure 5.
The output voltage is determined by the equation:
R1
)
(25)
R2
where VREF = 0.8V. A typical value of R1 can be between
3kΩ and 10kΩ. If R1 is too large, it may allow noise to be
introduced into the voltage feedback loop. If R1 is too
small in value, it will decrease the efficiency of the power
supply, especially at light loads. Once R1 is selected, R2
can be calculated using:
VOUT = VREF ⋅ (1 +
June 2010
(28)
where VF = forward voltage at the peak diode current.
The external Schottky diode is not necessary for the
circuit operation since the low-side MOSFET contains a
parasitic body diode. The external diode will improve
efficiency and decrease the high frequency noise. If the
MOSFET body diode is used, it must be rated to handle
the peak and average current. The body diode has a
relatively slow reverse recovery time and a relatively
high forward voltage drop. The power lost in the diode is
proportional to the forward voltage drop of the diode. As
the high-side MOSFET starts to turn on, the body diode
becomes a short circuit for the reverse recovery period,
dissipating additional power. The diode recovery and the
circuit inductance will cause ringing during the high-side
MOSFET turn-on.
An external Schottky diode conducts at a lower forward
voltage preventing the body diode in the MOSFET from
turning on. The lower forward voltage drop dissipates
less power than the body diode. The lack of a reverse
recovery mechanism in a Schottky diode causes less
ringing and less power loss. Depending on the circuit
components and operating conditions, an external
Schottky diode will give a 0.5% to 1% improvement in
efficiency.
The power dissipated in the input capacitor is:
PDISS(CIN ) = I CIN (RMS) ⋅ ESR CIN
(27)
14
M9999-060810-D
Micrel, Inc.
MIC2124
Feedback Loop Compensation
The MIC2124 controller comes with an internal error
amplifier used for optimizing control loop stability by
placing a capacitor C1 in series with a resistor R1 and
another capacitor C2 in parallel from the COMP pin to
ground.
and the output inductor in the power stage:
1
2π × C OUT × ESR COUT
(30)
1
1
1
D
×(
+
× )
2π C OUT × R LOAD f SW × L × C OUT 2
(31)
f z( con) =
fp(con) =
Therefore, type II compensation, which is comprised by
C1, R1 and C2, is able to achieve a stabilized loop for
MIC2124 in most applications.
b. gm Error Amplifier
It is undesirable to have high error amplifier gain at high
frequencies because high frequency noise spikes would
be picked up and transmitted at large amplitude to the
output; thus, gain should be permitted to fall off at high
frequencies. At low frequency, it is desired to have high
open-loop gain to attenuate the power line ripple. Thus,
the error amplifier gain should be allowed to increase
rapidly at low frequencies.
The transfer function with R1, C1, and C2 for the internal
gm error amplifier can be expressed as:
Figure 6. Loop Compensation
a. Power Stage
The adaptive on-time current mode control applied in
MIC2124 controller eliminates the double-pole in the
power stage, which is caused by the output inductor and
output capacitor. At the frequency range which is far
below the switching frequency (f < fSW /6), the transfer
function from the output of the error amplifier to the buck
converter output can be approximated by the following
equation:
G(s) con ≈ G C ×
1 + s × C OUT × ESR COUT
s
1+
ϖp
G(s)err
One pole and one zero can be seen from the above
transfer function at the following frequencies:
f z( err ) =
(29)
f p( err ) =
where:
GC =
R LOAD
×
Ri
ϖp =
1
1
D
+
×
C OUT × R LOAD f SW × L × C OUT 2
1
2π × R1 × C1
1
2π × R1 ×
1
1+
R LOAD D
×
f SW × L 2
C1 × C2
C1 + C2
(33)
(34)
c. Total Open-Loop Response
The open-loop response for the MIC2124 controller is
easily obtained by combining the power stage, the
feedback resistor divider, and the error amplifier gains
together.
G(s) total =
COUT = total output capacitors
ESRCOUT = electrical series resistance of the output
capacitor
RLOAD = load resistance
Ri = 2.4 x Rds(on)_bottom (low-side MOSFET Rds(on))
fSW = switching frequency
L = inductance of the output inductor
D = duty cycle
According to equation (29), there is a pole and zero pair
set by the load resistance RLOAD, the output capacitor,
June 2010
⎤
⎡
⎥
⎢
1
+
s
×
R1
×
C1
⎥ (32)
= gm × ⎢
C1 × C2 ⎞ ⎥
⎢
⎛
⎢ s × (C1 + C2) × ⎜1 + s × R1 × C1 + C2 ⎟ ⎥
⎝
⎠⎦
⎣
R FB2
× G(s) con × G(s) err (35)
R FB1 + R FB2
where RFB1 and RFB2 are the voltage divider resistors, as
shown in the typical application schematic on Page 1.
It is desirable to have the gain curve intersect zero dB at
tens of kilohertz, this is commonly called crossover
frequency; the phase margin at crossover frequency
should be at least 45°.
12V to 1.8V @ 10A application is applied as an example
to demonstrate the loop compensation for MIC2124. In
this application:
15
M9999-060810-D
Micrel, Inc.
MIC2124
30
0
20
-20
10
-40
0
-60
-10
-80
90
20
Gain of Error Amplifier
Phase of Error Amplifier
Gain (dB)
70
50
-20
30
-40
10
-60
-10
-80
-30
10
100
1000
10000
Figure 8. Error Amplifier Bode Plot
120
0
Total Open Loop Gain
Total Open Loop Phase
60
-60
30
-90
0
-120
-30
-150
10
100
1000
10
Phase (Degree)
Gain (dB)
-30
10000
-30
100
1000
10000
Phase (Degree)
Gain (dB)
90
-180
100000
f (Hz)
Figure 9. Total Open Loop Bode Plot
-100
Gain of Control-to-Output
Phase of Control-to-Output
-100
100000
f (Hz)
-60
-20
0
Phase (Degree)
D = 0.15
RLOAD = 0.18Ω.
The output capacitor and the inductor parameters are:
COUT = 760μF
ESRCOUT = 0.002Ω
L = 2.2μH.
Also,
Ri = 0.007Ωx2.4
fSW = 300kHz
Rfb1 = 10kΩ
Rfb2 = 8.06kΩ
The error amplifier gm and external compensation
component are:
gm = 110μS
R1 = 150kΩ
C1 = 220pF
C2 = 47pF
The gain and phase of the control-to-output transfer
function predicted by the equation (29) are shown in
Figure 7. The gain and phase of the error amplifier
transfer function predicted by the equation (32) are
shown in Figure 8. The total open-loop bode plot
predicted by the equation (35) is shown in Figure 9.
The crossover frequency of this MIC2124 buck converter
is 40kHz and the phase margin is about 50°, as shown in
Figure 9.
-120
100000
f (Hz)
Figure 7. Control-to-Output Bode Plot
June 2010
16
M9999-060810-D
Micrel, Inc.
MIC2124
Inductor
PCB Layout Guideline
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC2124 converter.
IC
•
The 2.2µF ceramic capacitor, which connects to the
VIN terminal, must be located right at the IC. The VIN
terminal is very noise sensitive and placement of the
capacitor is very critical. Use wide traces to connect
to the IN and PGND pins.
•
Place the IC and MOSFETs close to the point of
load (POL).
•
•
Do not route any digital lines underneath or close to
the inductor.
•
Keep the switch node (LX) away from the feedback
(FB) pin.
•
The LX pin should be connected directly to the drain
of the low-side MOSFET to accurate sense the
voltage across the low-side MOSFET.
To minimize noise, place a ground plane underneath
the inductor.
Output Capacitor
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
•
Use fat traces to route the input and output power
lines.
Signal and power grounds should be kept separate
and connected at only one location.
Input Capacitor
• Place the HSD input capacitor next.
•
Place the HSD input capacitors on the same side of
the board and as close to the MOSFETs and the IC
as possible.
•
Keep both the HSD and PGND connections short.
•
Place several vias to the ground plane close to the
HSD input capacitor ground terminal.
•
Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
•
Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
•
If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be de-rated by 50%.
•
In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the overvoltage spike seen on the input supply with power is
suddenly applied.
•
Keep the inductor connection to the switch node
(LX) short.
•
•
•
•
•
The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
Schottky Diode (Optional)
• Place the Schottky diode on the same side of the
board as the MOSFETs and HSD input capacitor.
•
The connection from the Schottky diode’s Anode to
the input capacitors ground terminal must be as
short as possible.
•
The diode’s Cathode connection to the switch node
(LX) must be kept as short as possible.
RC Snubber
• Place the RC snubber on the same side of the board
and as close to the MOSFETs as possible.
MOSFETS
• Low-side MOSFET gate drive trace (DL pin to
MOSFET gate pin) must be short and routed over a
ground plane. The ground plane should be the
connection between the MOSFET source and
PGND.
An additional Tantalum or Electrolytic bypass input
capacitor of 22uF or higher is required at the input
power connection.
The 2.2µF, which connect to the VIN terminal, must
be located right at the IC. The VIN terminal is very
noise sensitive and placement of the capacitor is
very critical. Connections must be made with wide
trace.
June 2010
Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
17
•
Chose a low-side MOSFET with a high CGS/CGD ratio
and a low internal gate resistance to minimize the
effect of dv/dt inducted turn-on.
•
Do not put a resistor between the LSD output and
the gate.
•
Use a 4.5V VGS rated MOSFET. Its higher gate
threshold voltage is more immune to glitches than a
2.5V or 3.3V rated MOSFET. MOSFETs that are
rated for operation at less than 4.5V VGS should not
be used.
M9999-060810-D
Micrel, Inc.
MIC2124
Others
•
•
In order to accurately sense the voltage across the
low-side MOSFET, the LX pin and PGND pin should
be Kelvin connected to the drain and source of the
low-side MOSFET.
The feedback resistors RFB1 and RFB2 (refer to the
typical application schematic on page 1) should be
placed close to the FB pin. The top side of RFB1
should connect directly to the output node. Run this
trace away from the switch node (junction of Q1, Q2,
and the output inductor).
June 2010
18
•
The compensation resistor and capacitors should be
placed right next to the COMP pin and the other side
should connect directly to the GND pin on the
MIC2124 rather than going to the plane.
•
HSD pin is sensitive to the noise. Too much noise at
HSD pin may cause the jittering at LX. A 10Ω
resistor and 0.1μF capacitor low-pass filter at the
HSD is able to mitigate the noise.
M9999-060810-D
Micrel, Inc.
MIC2124
Evaluation Board Schematic
Figure 10. Schematic of MIC2124 5A Evaluation Board
June 2010
19
M9999-060810-D
Micrel, Inc.
MIC2124
Bill of Materials
Item
Part Name
C1
B41125A7227M
C2
1210YD226MAT2A
GRM32ER61C226ME20L
C3225XR1C226M
C3
EEFSX0D181R
C6, C9,
C13
06035C10KAT2A
C7, C8
GRM21BR71A225KA01L
180µF SP Capacitor, 9mΩ, 2V
1
0.1µF Ceramic Capactior, X7R, Size 0603, 50V
3
2.2µF Ceramic Capacitor, X7R, Size 0805, 10V
2
470pF Ceramic Capacitor, X7R, Size 0603, 50V
1
1nF Ceramic Capacitor, X7R, Size 0603, 50V
1
18pF Ceramic Capacitor, Size 0603, 50V
1
30V small signal Schottky diode
1
2.7µH inductor, 6.6A saturation current
1
20V, 7.5A Dual N-MOSFET, 0.018Ω Rds (on) @ 4.5V
1
Murata
TDK
AVX
Murata
TDK
AVX
Murata
SD103BWS
MCC
FDS6890A
1
1
Murata
TDK
SD103BWS-7
220µF Aluminum Capacitor, SMD 35V
22µF Ceramic Capacitor, X5R, Size 1210, 16V
Murata
C1608C0G1H180J
DO316P-272HC
(5)
AVX
TDK
06035A180JAT2A
Qty
(3)
Panasonic
AVX
06035C102KAT2A
Description
(4)
06035C471KAT2A
GRM1885C1H180JA01D
Q1
TDK
C2012X7R1A225K
C1608X7R1H102K
L1
Murata
TDK
GRM188R71H102KA01D
D1
(2)
AVX
AVX
C1608X7R1H471K
C12
EPCOS
0805ZC225MAT2A
GRM188R71H471KA01D
C11
(1)
C1608X7R1H104K
GRM21BR71A225KA01L
C10
Manufacturer
(6)
DIODE INC
Coilcraft
Fairchild
(7)
Vishay/Dale
(8)
R1, R5
CRCW06030000Z0EA
0Ω resistor, size 0603, 1%
2
R2
CRCW08051R21FKEA
Vishay/Dale
1.21Ω resistor, size 0805, 1%
1
R3
CRCW060382K0FKEA
Vishay/Dale
82kΩ resistor, size 0603, 1%
1
R4
CRCW06037K15FKEA
Vishay/Dale
7.15kΩ resistor, size 0603, 1%
1
R6
CRCW06038K06FKEA
Vishay/Dale
8.06kΩ resistor, size 0603, 1%
1
R7
Open
MIC2124YMM
U1
U2
(10)
MIC5233-5.0YM5
(9)
Micrel, Inc
Micrel, Inc
300kHz Buck Controller
1
LDO
1
Notes:
1. EPCOS: www.epcos.com
2. AVX: www.avx.com
3. Murata: www.murata.com
4. TDK: www.tdk.com
5. Panasonic: www.panasonic.com
6. Diodes Inc.: www.diodes.com
7. Fairchild: www.fairchildsemi.com
8. Vishay: www.vishay.com
9. Micrel, Inc.: www.micrel.com
10. Optional: Required if 5V supply is not available in the system.
June 2010
20
M9999-060810-D
Micrel, Inc.
MIC2124
PCB Layout
Figure 11. MIC2124 Evaluation Board Top layer
Figure 12. MIC2124 Evaluation Board Mid-Layer 1(Ground Plane)
June 2010
21
M9999-060810-D
Micrel, Inc.
MIC2124
Figure 13. MIC2124 Evaluation Board Mid Layer 2
Figure 14. MIC2124 Evaluation Board Bottom Layer
June 2010
22
M9999-060810-D
Micrel, Inc.
MIC2124
Package Information
10-Pin MSOP (MM)
June 2010
23
M9999-060810-D
Micrel, Inc.
MIC2124
Recommended Landing Pattern
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its
use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2010 Micrel, Incorporated.
June 2010
24
M9999-060810-D