ETC NC6000

DIAMOND
MV B- BUILD FINAL
2003/08/21
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
Size
TITLE
A3
DIAMOND
DOC CTRL CHK
MFG ENGR CHK
Changed by
EE2
Date Changed
Thursday, August 21, 2003
Time Changed
11:19:38 am
QA CHK
VER
A02
Model Number
PC8803
Sheet
1
of
67
TABLE OF CONTENTS
PAGE
PAGE
27- DDR-SDRAM-3
48- HDD CONN
5- DC& BATTERY CHANGER
28DDR-SDRAM-4
49MULTIBAY CONN
6- SELECT & BATTERY CONN
29ATI-M10-P-1
50USB&IR
CONN
7- SYSTEM POWER(3V/5V/12V)
30ATI-M10-P-2
51- CARDBUS CONTROLL
8- DAUGHTER SYSTEM POWER(1.5V/1.8V)
31- ATI-M10-P-3
9- SYSTEM POWER(VCCP/1.2V)
52- PC CARD SLOT
10- DAUGHTER SYSTEM POWER(2.5V/VGAVCC) 32- ATI-M10-P-4
53- SD CARD CONN
33- VIDEO RAM DEPEND
11- CPU POWER(VCC_CORE)
54- MINIPCI CONN
12- DDR_TERMINATION
34- VIDEO RAM-2
55- LAN INTERFACE-1
13- POWER(SLEEP)
35- CRT& SVEDIO CONN
56LAN INTERFACE-2
14- POWER(SEQUENCE)
36- LCD CONN
57DOCKING
CONN
15- CLOCK_GENEATOR
37- ICH4-1
58- BLUETOOTH
16- BANIAS-1
38- ICH4-2
59- BOARD TO BOARD CONN & LID SWITCH
17- BANIAS-2
39- ICH4-3
60- DAUGHTER FHW
18- BANIAS-3
61- DAUGTHER MDC CONN
40KBC
19- BANIAS-4
41- INT.KBC/POINT DEVICES 62- DAUGTHER TCPA CONN
63- DAUGTHER CONN & SWITCH LED
20- THERMAL&FAN CONTROLLER
42- SUPER I/O
64- DAUGTHER LED & VOL BUTTON
21- ODEM-1
43- SERIAL PORT
22- ODEM-2
44- PARALLER PORT
45- AC97 CODEC
23- ODEM-3
46- EQ&MIC JACK
24- ODEM-4
47- AUDIO AMP&HP JACK
25- DDR-SDRAM-1
26- DDR-SDRAM-2
PAGE
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
Size
TITLE
A3
DIAMOND
DOC CTRL CHK
MFG ENGR CHK
Changed by
EE2
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:56 am
QA CHK
VER
A02
Model Number
PC8803
Sheet
2
of
67
PORT REPLICATOR
CK 408
Clock generator
BANIAS
(Micro-FCPGA)
ITP
S-video
ATI_M9-X
1.5V,AGP 4X/8X_BUS,66MHz
VGA Chip
PSB, VCCP,400MHz
Odem MCH-M
593 BGA
32MB/64MB
DDR RAM
2.5V,DDR SDRAM200/266 Interface
Primary_IDE
HDD
ATA 66/100
USB5
USB4
Bluetooth
USB3
Dock
USB2
Dock
USB1
CONN B
USB0
CONN A
Multi-bay/ Battery
Secondary_IDE
1.8V, Hub Link, 66MHz
ICH4-M
421 BGA
3.3V, PCI_Interface,33MHz
Giga-bit LAN
Mini_PCI
O2_711M3B
BCM 5705
Wireless LAN
CARD BUS
RJ45
3.3V, AC97 LINK 3.3MHz
DDR _SODIMM1
CRT
DDR _SODIMM0
LCM
ANT
ANT
Cardbus
SLOT A/B
SD Card
SLOT
3.3V, LPC_Interface,33MHz
BATTERY
System Charger &
MDC/Modem
Module 56K
AD_1981
AC97 Codec
System BIOS
TCPA
Super I/O
FWH
Module
47N227
Kahuna Lite
47N250
DC/DC System power
Engineer
INVENTEC
David Du
RJ11
Drawn by
David Du
R&D CHK
Size
TITLE
A3
DIAMOND
DOC CTRL CHK
MFG ENGR CHK
Changed by
EE2
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:58 am
QA CHK
VER
A02
Model Number
PC8803
Sheet
3
of
67
+V12
+V5
+VBATR
5V
0.0295
3V
ADPT
SKIP#
+V5A
+V3A
+V5S
+V5L +V5L
+V3L +V3L
NS_LM2621MMX
+V3
+VBDC
+V1.25
+V3S
ICTL
ACOK
+VBATA
+VGAVCC
ON1
+V2.5
+VGAVCC
SKIP#
2.5V
+V2.5L
ON2
PDS CHGA
+V2.5S
DISA
THMA
ON1
COMA
1.05V
+VCCP
1.2V
+V1.2L
+V1.2L
+VBATB
CHGB
SKIP#
THMB
DISB
ON2
+V1.2_MCH
COMB
BATSELB_A#
ON1
1.8V
+V1.8S
BATSEL
SKIP#
ACPRES#
BATSTAT#
1.5V
+V1.5A
+V1.5A
ON2
BATSTAT
+V1.5S
+VCC_CORE
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
Size
TITLE
A3
DIAMOND
DOC CTRL CHK
MFG ENGR CHK
Changed by
EE2
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:04 am
QA CHK
VER
A02
Model Number
PC8803
Sheet
4
of
67
+V5S
D1000
R1016 CHANGE TO 133K_1%
4
U1002
LM324A
1
1
1
+
3
-
2
OUT
U1002
4
LM324A
10 +
8
OUT
9 11
1
2
R1022
0_5%
11
R1021
0_5%
1
2
R1001
2
100K_0.5%
1
2
R6036 2
499_1%
U1000
1 C312
2
4 REF
0.1UF_25V
12 +
13 -
Q1003 2
1B E
R1017
80.6K_1%
MMBT3906 3
C
3
100K_5%
$V
1
1 C1015
D6009 1 C1003
BAT54C 2 1UF_16V
3
14
LM324A
11
R1019
1
2 1UF_25V
2
2
1
R1011
10
100K_5%
1 R6044 2
1 C1016
1
C
R1015 2
4
OUT
2
MMBT3906 3
2
U1002
2
Q1002 2
1B E
2
R1006
10K_0.5%
NC 2
1
R1037
10K_5%
C1000 2200PF
1 2
1
CATHODE 3
5 ANODE
0
1
R1016
133K_1%
U1002
4
5 +
LM324A
OUT 7
6 1
11
R1020
4.7K
R6043 2
$V
1
1
2
1
R1000
10K_1%
BAT54S
$V
2 6800PF_25V
2
OPEN
7-
MAX_LX5
2
NC 1
Q1004 5
S1
G1
6
D1
D2 4
3 G2
S2 2
NDC7002N
1
NS_LMV431ACM5X_SOT23_5P
1
R1038
47K_5%
1
2
+ VADP1
R1588
1
2
37-,16-
2
37-
H_STPCLK#
OPEN
R6029
R1040
10K_5%
1
STBY_SWIN#_3
0_5%
2
+VBATR
DC JACK
+ VADP
2
237K_1%
3.3A_150mil
+ VADP
Iadp=3.3A
+ VADP1
R1035
0.018_1%_1W
3.3A_150mil
1
1
0.47UF_25V 2
1 C1044
2 1UF_10V
1
1 C1040
R1047
10K_5%
2 0.1UF_16V
1772REF
2
2
1772GND
4.096V_10mil
2
ACIN#
D1006
15mil
D
C1053 0.1UF_16V R1051
2
1
1 2
1K_5%
1 C1043 1 C1042
1
2
2
1
R1053
10K_5%
0.01UF_16V
2 C1046
0.01UF_16V
2
R1060 2
0.1UF_16V
1772GND
0_5%
10mil
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1N4148
U1008
DCIN
LD0
CLS
REF
CCS
CCI
CCV
GND
GND
ICHG
ACIN
AC0K
REFIN
ICTL
IINP
CSSP
CSSN
BST
DHI
LX
DL0V
DL0
PGND
CSIP
CSIN
BATT
CELLS
VCTL
28
27
26
25
24
23
22
21
20
19
18
17
16
15
10mil
10mil
15mil
15mil
15mil
15mil
15mil
15mil
10mil
10mil
10mil
1
R1046 2
C1039
0.1UF_25V
2
57-,55-
AIRACIN
Q1005 3
D
2G
10K_5%
S
1
2N7002
Q1007
IRF7807V
+VBDC
L27
2.2_5%
1
2
PLFC1055P_220A_22UH
1
1 C1049
U1007
FDS6680S
G
43 2 1
1
5-
2
1
R1064
2
C1050
1 C288
22UF_23V_METAL 2 10UF_25V
2
C1051
1 2
0.1UF_25V
R1063 2
C297
1
R1065
2
S
1772LDO
2.5A_100mil
2
1
D
2 1UF_10V
R265
0.05_1W_1%
567 8
1 2
0.1UF_25V
47K_5%
+V3A
1
+V3A
1
1 C1038
R1055
2 10UF_25V 2 10UF_25V
MAX_MAX1772EEI_QSOP_28P
R1068 2
10.2K_1%
1 C1037
40-,6-1
AIRACIN#
G
1 C1045
2 1UF_6.3V
40-
1
1
R1052
52.3K_1%
2
+ VADP
1772LDO
S
1 C6038
2 1UF_6.3V
R1054
100K_5%
2
5-
1
R1071
100K_5%
+V3A
1
2 1
1
R1049
4.7
1
4
3
2
1
2
1 C302 1 C299
2 10PF 2 0.1UF_25V
2
5
6
7
8
R1050
52.3K_1%
R1591 2
OPEN
C1033 1
5.4V_15mil
33
1
1
2
R1041 2
2
0.47UF_25V 2
C1041 1
1
1
OPEN
1 R1590 2
R1048
4.7
1
+V3A
2
0.015_1W_1%
1 C1034
2 1UF_25V
1772REF
R1592
OPEN
R1036
SINGA_2DC_S028I200
JACK3
1
3
2
3.3A_150mil
3
1 C301 1 C300
2 10PF 2 0.1UF_25V
3.3A_150mil
2
D1004
1
1
2
15mil
4
+VBATR
+VADP2
1N4148
1772LDO
L26
NFM60R30T222
+VADPTR
1
2
5
R1039
4
1
ICHG
R1070
1.37K_1%
1
100K_1%
2
CHGCTRL_3
40-
1
R1066
49.9K_1%
2
1772GND
5-
2
C
B
1
high power trace
1
R1061
R16
37.4K_1%
Q1008
WAIT TO CHANGE 38.3K
2
3 SST3904
R1067 2
40.2K_1%
Note:
R1062
47K_5%
R1059 2
E
1 C1052
2
1772GND
0.1UF_16V
1
5-
2
Engineer
INVENTEC
David Du
6-
Drawn by
CELLSEL
1 C6023
2 OPEN
Changed by
EE2
David Du
Icharger=2.5A
CELLSEL=1,Vcharger=12.6V
CELLSEL=0,Vcharger=16.8V
Date Changed
Thursday, August 21, 2003
R&D CHK
MFG ENGR CHK
Time Changed
QA CHK
A3
DIAMOND
DOC CTRL CHK
11:22:36 am
Size
TITLE
DC &BATTERY CHANGER
VER
A02
Model Number
PC8803
Sheet
5
of
67
+V3A
+V3A
+V3A
1
1
1
1
R1581
3.3K_1%
R1218
100K_5%
R1215
2.7K_1%
2
+VBATA
R283
13.0K_1%
+V3A
+VBATB
1
2
6-
2
R1233
100K_5%
BAT6CELL#
5A_200mil
2
2
1
1 R1216
40-
SCL_MAIN
2
CN14
1 1
2 2
3 3
4 4
5 5
6 6
0_5%
1
40-
SDA_MAIN
R1219
2
0_5%
THM_MAIN#
1 R1217
40-,6-
1 D1064
1 D1015
2 UDZS5.6B
2 UDZS5.6B
2 0.1UF_25V
2
5A_200mil
R1230
1.8K_5%
2
1
57-,40-
SCL_MBAY
R1232 2
100_5%
1
57-,40-
SDA_MBAY
2
100_5%
1
R1231
1.8K_5%
1 C203
1
2
3
4
5
6
R1229 2
100_5%
AMP_1470444_1_6P
1 C1245
2
47PF_50V
1
THM_MBAY#40-,6-
R1234 2
100_5%
1 D1016
1 D1017
2 UDZS5.6B
2 UDZS5.6B
CN1003
1
2
3
4
5
6
1 C1289
2 0.1UF_25V
AMP_C1470694_1_6P
1 C1282
2
47PF_50V
MAIN BATT
2nd BATT
2.5A_100mil
2.5A_100mil
+VADP2
+VBATB
+VBDC
+VBDC
Q1028
1
2
1 C1291
10mil
3
S2
S
D
5 6 7 8
5A_200mil
FDS4435
R1245
10K
+VBDC
2
Q1031
FDS4935
10mil
1 C1287
2 0.022UF
2 0.022UF
+VADP
D
S
FDS4435
2 2.2UF_25V
1
4 G2
1
2 G1 S1
R1246
10K
Q1029
5 6 7 8
1 C1288
2 2.2UF_25V
G
2.5A_100mil
2.5A_100mil
1 C204
7
D1 8
5
D2 6
4 3 2 1
5A_200mil
4 3 2 1
5A_200mil
S
D
G
5 6 7 8
D
5 6 7 8
G
4 3 2 1
S
5A_200mil
Q1025
FDS4435
4 3 2 1
+VBATA
Q1032
FDS4435
G
+VADP2
+VADP1
+V3A
D1002
3.3A_150mil
3.3A_150mil
U12
10mil
40-,6-
THM_MAIN#
10mil
10mil
R1026 2
1773VDD
10K
100K_1%
1 R205
6-
1
2
15mil
15mil
15mil
D1003
2
15mil
1
R1252 2
1
2
3
4
5
6
7
8
9
10
1
BATA
THMA
CHGA
DISA
COMA
GND
MINV
EXTLD
PDS
ACDET
BATB
THMB
CHGB
DISB
COMB
VDD
TCOMP
BATSEL
ACPRES#
BATSTAT
20
19
18
17
16
15
14
13
12
11
10mil
10mil
10mil
1
R203
3.3V_10mil
BATSELB_A#
40-,5AIRACIN#
40BATSTAT#
+V3A
2
1
1
1N4148
R1249
1 C1290
2
C
B
E
1
R1250
47K_5%
0.33UF_10V
2
CELLSEL
3
2
Q1062
SST3904
1
2
2
10K_1%
1 R1248 2
R204
100K_1%
5-
R1589
390K_5%
1773VDD
40-
100K_1%
D1014
6-
10mil
1
+V3A
R1251
470K_5%
2
1
3.3K_5%
10mil
1
C
100K_5%
MMBT3906 3
40-,6- THM_MBAY#
MAX_MAX1773EUP_TSSOP_20P
1N4148
2
S
1
4 3 2 1
G
5 6 7 8
D
2
1
SFPB74
Q1001
FDS6675
Q1030 2
R1244 2 1 B E
BAT6CELL#
6-
100K_5%
R1247 2
1
2
1
R202
100K_5%
R1214 2
2
1
100K_5%
0_5%
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:32 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SELECT & BATTERY CONN
VER
A02
Model Number
PC8803
Sheet
6
of
67
+VBATR
+VBATP
PAD4
5A_200mil
3
4
20mil
1
R231
20mil
2
4.7_1206_1/4W
MAX3V
15mil 1
2
D1
R1195 C1221
2
1 2
0
2
1 C1244
M1999FB3
7-
M1999FB5
7-
R1211
1
2
0_5%
1
R1210
80.6K_1%
1
2
R1242
143K_1%
1632GND
NC
PGOOD
ON3
ON5
ILIM3
SHDN#
FB3
REF
FB5
PRO#
ILIM5
SKIP#
TON
BST5
BST3
LX3
DH3
LDO3
DL3
GND
OUT3
OUT5
V+
DL5
LDO5
VCC
DH5
LX5
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Q1022 1
2
1
C1243
22
0_5%
10mil
+V5L
+V5A
15mil
2
R214
5-
MAX_LX5
16K_1%
C182
1 C198
1
15mil
43 2 1
2 10UF_K_6.3V
+V5L
220UF_6.3V_OSCON
1 C1219 1 C200
2
2
4.7UF_K_6.3V
D1018
BAT54C
0.1UF_10V
1
R1241 2
+V3A
R216
10.2K_1%
0
2
0.22UF_K_10V
6A_250mil
FDS6680S
G
+V3L
2 PAD1
6A_250mil
3
1
4
POWERPAD_4A
L19
1
2
SIQ127A_10UH
Q1024
S
4.7UF_K_6.3V
1UF_6.3V
274K_1% 2
M1999FB3
MAX5V
1 C1220
C199
2
C1286
2 10UF_25V
2
324K_1%
2
1
1
R1243
1
1 C1218
10UF_25V
56 7 8
C1242 0.1UF_25V
1 2
10mil 1 R1194 2
2 1
2
1
+VBATP
1632GND
1 C1217
S
4 3 2 1
15mil
15mil
R1207 2
2
2 10UF_K_6.3V
7-
15mil
R213
R1209
4A_160mil
D FDS6612A
2
1
1 C185
3
1
2 1UF_25V
Q1021
5 6 7 8
G
0
470PF_50V
2
15mil
15mil
15mil
15mil
D
15mil
1
S1
15mil
15mil
MAX_MAX1999EEI_QSOP28_28P
2
1 C1222 1 C1223
C202
1
10mil
1
2
3
4
5
6
7
8
9
10
11
12
13
14
G1
1
FDS6982S
U1012
2 0.022UF
2A_80mil
6
5
8
7
4A_160mil
330UF_4V_OSCON
2
0.1UF_25V
1 C201
2 OPEN
R1212
10K_5%
47K_5%
D2
L21
1
2
PLFC1055P_6R8A_6.8UH
OPEN
4 G2
BAT54A
1
3
R218
S2
2
2
15mil
1
1
R1208
PAD2
2
4A_160mil
3
1
4
POWERPAD_4A
3
1
1
+VBATP
D1011
15mil
0
MAX5V
2
R217
+V5L
1 C226
2
2
2
R232
220K_5%
+V3A
+V5L
1 C225
100UF_25V
1
1
10UF_25V
For power test
C197
0.1UF_25V
POWERPAD_4A
4.7UF_K_25V
5A_200mil
71632GND
+V12
L1000
1
2
SIL520_6.8UH
30mil
2
120mA_30mil
1
120mA_30mil
+V5
1 C1047
20mil
U1006
1 PGND
2 EN
R1045 2 3
FREQ
150K_1%
4 FB
1
SW
BOOT
VDD
SGND
8
20mil
7
10mil
6
10mil
1
R1044 2
1
0
5
NS_LM2621MMX_MSO8_8P
1
C1048
2
0.1UF_16V C1035
2.2PF_50V
C1032
1 C1036
47UF_20V 2 10UF_K_16V
1
2 22UF_10V
R1043
147K_1%
2
59-,47-,45-,40-,38-,13-,12-,9-
2
D1005
EC10QS03L
1
SLP_S3#_3R
1632GND
+V5
Engineer
R1042
16.9K_1%
David Du
2
R1213
OPEN
1
M1999FB5
1632GND
1 2
1
D1012
1N4148
2
David Du
INVENTEC
Drawn by
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:59:19 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SYSTEM POWER(3V/5V/12V)
VER
A02
Model Number
PC8803
Sheet
7
of
67
+V5A_BN
+V1.5A_BN
15mil
3
D4004 BAT54A
1
2
PLFC0735P_6R8A
15mil
1
15mil
2
3A_100mil
L4000
C4004
1
1
Q4004
12mil
15mil
10
R4022
2
1
1 C4002
2 0.1UF_25V
12mil
1 C4020
4 G2
2
+VBATP_BN
S2 3
D2 6
5
D1 8
12mil
7
G1
2
S1
1
1 C4003
2 0.1UF_16V
1 C4005
2 220P_25V
R4001
10K_1%
+VBATP_BN
220UF_2.5V_S18_METAL
1
40mil
R4002
20K_1%
2
1
1
2 C4000 2
C4001
0.1UF_25V
10UF_25V
15A18SGND
2 1UF_10V
1
NC2
V+
4
20
10mil
VDD
2
FDS6984S
15
U4000
R4005
22
VCC
23
NC0
2 C4006
1UF_10V
28
NC1
BST1
DH1
LX1
DL1
FB1
5
TON
PGOOD 7
6
SKIP#
10
ON1
R4003 2
11
ON2
0_5%
3
ILIM1
12
ILIM2
15mil
OUT1 1
OUT2 14
12mil
12mil
10
18
17
16
19
13
15mil
2 R4025 1
BST2
DH2
LX2
DL2
FB2
22 PGND
1
9 REF
63-,10-
8 AGND
15A18SGND
SLP_S3#_3R_BN
25
26
27
24
2
21
1
+V1.8S_BN
L4001
1
2
PLFC0735P_6R8A
15mil
Q4000
1 C4021
2 0.1UF_25V 12mil
4 G2
MAX_MAX1715_QSOP_28P
3A_100mil
+VBATP_BN
S2 3
40mil
C4010
D2 6
5
D1 8
12mil
7
G1
2
S1
1
1
1 C4011
1
2
2 C4012
1 C4009
2 0.1UF_16V
1
R4004
20K_1%
10UF_25V
0.1UF_25V
2
15mil
1 C4008
220UF_2.5V_S18_METAL
2 180PF_50V
FDS6984S
1
R4000
1 C4007
2
1
R4007
2
274K_1%
10mil
274K_1%
1UF_6.3V
2
10mil
1
1
R4006
23.7K_1%
R4008 2
0
2
15A18SGND
15A18SGND
SYSTEM POWER (1.5&1.8) ON BUTTON DAUGHTER BOARD
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:59:26 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SYSTEM POWER(1.5V/1.8V)
VER
A02
Model Number
PC8803
Sheet
8
of
67
+VGAVCC
+V5A
+VBATR
40mil
15mil
D4 BAT54A
3
5 6 7 8
1
2
Q7
FDS6612A
L20
1
2
SIL104R_5R2
1
1
2 C205
2
G
+VBATR
1
1 C207
2 220P_25V
R219
1K_1%
0.1UF_25V
10UF_25V
5A_200mil
POWERPAD_2_0610
C186
D
PAD5
4A_160mil
S
C230
1
2
1 C242
2 0.1UF_16V
220UF_2.5V
4 3 2 1
+V3A
1
10
R235
15mil
2
15mil
1
R220
20K_1%
D
1 C206
1 C231
12mil
G
2 0.1UF_25V
S
2 1UF_10V
R1582
OPEN
1
56 7 8
43 2 1
1
2
59-,47-,45-,40-,38-,13-,12-,7-
15
28
NC1
BST1
DH1
LX1
DL1
FB1
5
TON
PGOOD 7
6
SKIP#
2
1 C6016
10
ON1
11
ON2
3
ILIM1
12
ILIM2
U4005
4
3
Q1058 D
D
PWRPLAY
S
SSM3K17FU S
OPEN
+V2.5L
12mil
12mil
18
17
16
19
13
BST2
DH2
LX2
DL2
FB2
29-G G
15mil
15mil
15mil
10mil
OUT1 1
OUT2 14
9 REF
5
NC2
20
4
NC0
2
+V3A
25
26
27
24
2
VCC
22 PGND
R223
200K_5%
OPEN
VGA25LGND
23
8 AGND
1
R1583 2
2 OPEN
21
VGA25LGND
SLP_S3#_3R
1
S
15mil
15mil
15mil
15mil
10mil
10
2 R236 1
15mil
L22
1
2
SIL104R_7R0
1 C232
2 0.1UF_25V
MAX_MAX1715_QSOP_28P
TI_SN74LVC1G17DBVR_SOT_5P
2 0.012UF_16V
Q12
S2
3
4 G2
D2 6
5
D1 8
7
G1
2
S1
1
FDS6982S
PAD3
4A_160mil
4A_160mil
POWERPAD_2_0610
+VBATR
60mil
1 C211
1
2
2 C212
C213
2
1
R226
15K_1%
1UF_10V
C189
10mil
VDD
2
V+
U13
2
S SSM3K17FU
OPEN
1 C1469
1
R1175
22
R6019
OPEN
D D Q1057
G G
2
Q15
FDS6680S
1
2
10UF_25V
0.1UF_25V
15mil
1 C209
2 1UF_10V
1 C210
2 OPEN
1
220UF_4V_METAL
10mil
59-,551
1 C208
2
1
R221
300K_1%
R224
2
LAN_ON_3
1UF_6.3V
300K_1%
2
1
10mil
1
R207
+V1.2_MCH
2
R225
9.76K_1%
+V1.2L
0
2
VGA25LGND
1
2
3
4
1
R1166
470_5%
2
PWR_GOOD#_5
14-
Q1019 3
D
2G
S
G
Q1020
D 8
7
6
5
VGA25LGND
VGAVCC NOTES :
NDS8425
C1189
1
1
USED M10 (1.0V/ 1.2V)
R219_ 1K_1%
R220_20K_1%
R1582_5.49K_1%
R238
220K_5%
68UF_6.3V_METAL
2
S
NDS7002A 1
Engineer
INVENTEC
David Du
Drawn by
David Du
PWR_GOOD_5
USED M9(1.25V/ 1.5V)
R219_ 10.2K_1%
R220_40.2K_1%
R1582_40.2K_1%
14-
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, August 21, 2003
Time Changed
11:26:35 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SYSTEM POWER (2.5V/1.25V)
VER
A02
Model Number
PC8803
Sheet
9
of
67
+V5A_BN
+VCCP_BN
15mil
3
D4005 BAT54A
15mil
L4004
PLFC0735P_6R8A
15mil
2
1
1
3A_100mil
2
C4044
1
+VBATP_BN
S2
4 G2
R4041
15mil
2
1 C4033
10
1
1 C4035
2 1UF_10V
3
1 C4026
1
2 220P_25V
2
40mil
D2 6
5
D1 8
7
G1
2
S1
1
Q4007
FDS6984S
2 0.1UF_16V
220UF_2.5V_S18_METAL
1
R4032
1.1K_1%
+VBATP_BN
1 C4043
1
2 C4041 2
C4040
0.1UF_25V
10UF_25V
2 0.1UF_25V
12mil
1
R4034
20K_1%
1
2
VCC
23
NC0
2 C4027
1UF_10V
28
NC1
BST1
DH1
LX1
DL1
FB1
5
TON
PGOOD 7
VCCP12LGND
1
R4029 2
0_5%
63-
6
SKIP#
10
ON1
11
ON2
3
ILIM1
12
ILIM2
OUT1 1
OUT2 14
18
17
16
19
13
BST2
DH2
LX2
DL2
FB2
9 REF
63-,10-
22 PGND
LAN_ON_3_BN
63-,8-
8 AGND
SLP_S3#_3R_BN
25
26
27
24
2
21
1
10mil
PWR_GOOD_3_BN
NC2
20
4
V+
VDD
2
15
U4003
R4042
22
63-
VCCP12LGND
1
15mil
15mil
15mil
15mil
10mil
R4050 2
63-,10-PWR_GOOD_3_BN
100K_5%
15mil
15mil
+V1.2L_BN
2 R4040 1
3A_100mil
L4003
1
2
PLFC0735P_6R8A
10
1 C4032
+VBATP_BN
2 0.1UF_25V
S2
4 G2
D2
MAX_MAX1715_QSOP_28P
D1
2
G1
S1
3
6
5
8
7
1
Q4006
FDS6984S
15mil
MCH_GOOD_BN
15mil
15mil
15mil
10mil
40mil
C4039
1
1
1
2
2
1 C4038
2 0.1UF_16V
2
C4036
C4037
10UF_25V 0.1UF_25V
1 C4024
220UF_2.5V_S18_METAL
2 100PF_50V
3.92K_1%
R4027
1
10mil
1
1
R4031
274K_1%
2 C4025
1UF_6.3V
1
R4028
2
2
274K_1%
1
10mil
1
R4026
18.7K_1%
R4030 2
0
2
VCCP12LGND
VCCP12LGND
Engineer
SYSTEM POWER (VCCP&1.2) ON BUTTON DAUGHTER BOARD
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
6:06:02 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SYSTEM POWER(VCCP/1.2V)
VER
A02
Model Number
PC8803
Sheet
10
of
67
+V3S
+VBATR
1 C1066
1 C1160
1 C1065
2
2
2
+V5S
1 C1402
+V3S
+VCC_CORE
KENVEN SENSE
4
3
2
1
2
0.1UF_16V
G
SB_VGATE
2
4
5
6
3
2
7
D 8
1 S
Q1011
FDS6694
3
5
6
7
8
R1404 2
200K_5%
2
C1780 C532 C531 PIN2 CONNECT TO Q16 , Q20 GND
D
1
0.1UF_16V
U1035
384
G
U1035
6
5
S
1
LAYOUT NOTES: C1779 C502 C503 PIN2 CONNECT TO Q14 , Q18 GND
x3
10UF_25V
5A_200mil
1N4148
2
Q1010FDS6694
5
D1025
1
1
2
C54
DHM
R272
3K_5%
1
LXM
2
L24
1
R257
1
25A
2
HMU1050_0.6UH_17A 0.0015_5%_1W
FAIR_NC7WZ17_SC70_6P
FAIR_NC7WZ17_SC70_6P
2
1 C1069
R267
10
2 1UF_6.3V
G
D
5
6
7
8
S
1 C291
1
R273
OPEN1
G
Q1013
FDS7764A
20mil
4
3
2
1
PM_VGATE
4
5
6
3
7
2
D 8
1 S
Q1012 FDS7764A
1
15-
2 2.2UF_K_10V
2
R1117
20_5%
1 D1008
2 SSM34_3A40V
10mil
1 C1064
2
1
1
2
2
470PF_50V
20mil
15mil
2
B0
B1
B2
R1076
R1075
R274
R268
R1074
3 B0
4 B1
5 B2
43
44
21
9
2
C1057 270PF_50V
1 2
10mil
REF
1
1
MAX1987GND
2
0.22UF_K_10V
1
R1078
100K_5%
C1054
R1077 2
28K_5%
2
5
4
6
3
7
2
S
D
8
1
Q1016
FDS6694
5
6
7
8
G
D
2
2
S
45
46
20
19
1 C1161
2
G
CMP
CMN
OAIN+
OAIN-
R1098
1K_1%
2
2
UGATE2
10mil
10mil
10mil
10mil
MAX1987GND
2
SUS
DPSLP#
PSI#
SHDN#
TON
C1055 2
470PF_50V 1
BSTS 41
11 ILIM
DHS 39
1
20mil
4.7_5%
1
C1067
0.1UF_25V
1
R271
1.1K_1%
2
LXS 40
25mil
31 DDO#
DLS 38
25mil
R1159
20_5%
2
C263
1
1 D1009
1
2 SSM34_3A40V
220UF_2.5V
220UF_2.5V
1 C1123
2 1000PF_50V_X7R
2
25mil
1 TIME
1
2
R1081
1M_5%
R1073 2
1
1 C1058
4700PF_50V2
1
2
10 REF
R1096
4.7K_5%
2
10mil
10mil
CSP 48
CSN 47
14 CCV
R1079
1.1K_1%
10mil
CCI 17
POS 15
L23
1 R250 2
1
HMU1050_0.6UH_17A
0.0015_5%_1W
C262
1
FB 18
NEG 16
G
2
2
2
2
2
6 S0
7 S1
8 S2
1 C1162
2
4
5
6
3
2
7
S
D
8
1
Q1014
FDS7764A
0_5%1
0_5%1
0_5%1
0_5%1
OPEN1
3838-,151759-,40-,30-,14-
S0
S1
S2
1
1 C1068
D
11111111-
D0
D1
D2
D3
D4
D5
C1070
0.1UF_25V
15mil
20mil 1 R1092 2
25mil 4.7_5%
25mil
25mil
25mil
15mil
S
+VCCP PM_DPRSLPVR
CPUSTOP#_3
PSI#
PWR_GOOD_3
30
29
28
27
26
25
1111-
VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5
42
32
34
33
35
37
13
Q1017
FDS6694
2 OPEN
V+
BSTM
DHM
LXM
DLM
PGND
GND
4
3
2
1
1 C292
VDD 36
5
6
7
8
2
MAX1987GND
G
R264
0_5%
1
R1094
750_1%
x3
10UF_25V
Q1015
FDS7764A
1
U1009
VCC
SYSPOK
CLKEN#
IMVPOK
TH 49
59-
1
20mil
12
22
24
23
KENVEN SENSE
1000PF_50V_X7R
D1007
BAT54A
4
3
2
1
MCH_GOOD
15mil
1 2
1
3
VCC_IN
220UF_2.5V
220UF_2.5V
R1097
1K_1%
R1095
750_1%
C1056
1 C303
2 1UF_6.3V
C1107
2
DLM
2
C281
1
1
MAX_MAX1987ETM_QFN48_48P
MAX1987GND
10mil
MAX1987GND
C1059
KENVEN SENSE
10mil
1
1
R1080
30.1K_1%
100PF_50V 2
MAX1987GND
2
10mil
MAX1987GND
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
0_5%
0_5%
0_5%
0_5%
0_5%
0_5%
1
1
1
1
1
1
R269
2
POWER_GROUND
MAX1987GND
B0
181818181818-
1
0_5%
MAX1987GND
2
2
2
2
2
2
R1104
R1103
R1102
R1101
R1100
R1099
111111111111-
S0
VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5
VCC_IN
S2
1
R270
1
1
R1084
0_5%
R1083
OPEN
R1082
0_5%
2
S1
2
B2
B1
1
1
100K_5%
1
2
Engineer
1
2
Drawn by
David Du
R&D CHK
2
REF
2
INVENTEC
David Du
R1087
OPEN
R1086
0_5%
R1085
0_5%
2
REF
MFG ENGR CHK
Changed by
EE2
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:10 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
MAX1987GND
Size
TITLE
CPU POWER(VCC_CORE)
VER
A02
Model Number
PC8803
Sheet
11
of
67
+V3
D6
3
BAT54
1
2
1
+V1.25S
R1144
10
MAX1809_LXA
SLP_S3#_3R
59-,47-,45-,40-,38-,13-,9-,7-
1
R1138 2
1K_1%
MA1809_V3
C11191
0.01UF_16V 2
40mil
1 C1100
1 C1099
2
1
2
3
4
5
6
7
8
2 10UF_K_6.3V
10UF_K_6.3V
U1010
SHDN#
IN
LX
IN
SS
EXTREF
TOFF
FB
16
15
14
13
12
11
10
9
1
L25
3A_120mil
2
1UH
10mil
1
R263
2
100
R266
68K_5%1
C290
1
330UF_2.5V_METAL
MAX_MAX1809EEE_QSOP_16P
1
2
LX
PGND
LX
PGND
VCC
GND
REF
GND
MA1809LX_FB
C298
2 0.01UF_16V
10mil
C11221
1UF_6.3V2
1 C1121
2 1UF_10V
1 R1146 2
10mil
40mil
0_5%
26-,25-,21-
+V2.5
SM_VREF
+V5
U1011
1
R255
1 C1120
10K_1%
2 0.1UF_10V
2
1 OUT
3 IN+
1
1 C280
R256
10K_1%
2 0.1UF_10V
VCC
5
2 VEE
1 C261
IN-
4
2 0.1UF_10V
MAX_MAX4322EUK_SOT23_5P
2
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:16 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
VGA POWER(VDD_CORE)
VER
A02
Model Number
PC8803
Sheet
12
of
67
+V5A
+V2.5L
+V3A
14
1
7
+V5A
+V3S
U1038
2
8
5
S
D
74ACT14MTC
4
G
1
2
3
6
7
Q1041
+V1.5A
+V2.5S
+V1.5S
+V5S
8
5
Q1046
D
S
4
G
Q10
8
5
1
2
3
6
7
S
D
4
G
1
2
3
6
7
Q6
FDR840P
FDR840P
8
7
6
5
FDR840P
D
S
G
1
2
3
4
1 C188
NDS8425
2 OPEN
1
C1368
1 C1369
C1377
1
1
47UF_6.3V_METAL
1
68UF_4V_METAL
R1204
220K
1
1
2
1
R1373
330K
R1371
470_5%
Q1043 3
D
2G
14
SLP_S3#_3R
59-,47-,45-,40-,38-,12-,9-,7-
3
74ACT14MTC
1
R206
100K
S
NDS7002A 1
+V5A
1 C187
2 0.039UF_10V
2
NDS7002A 1
NDS7002A 1
S
Q1054 3
D
2G
S
S
NDS7002A 1
2
Q1039 3
D
2G
Q1047 3
D
2G
2
R1407
470_5%
1
2
47UF_6.3V_METAL
2
R1383
220K
2
+V5A
1
R1359
470_5%
2
R1382
470_5%
1
68UF_4V_METAL
C175
14
U1038
4
9
7
7
U1038
8
57-
SLP_S3#_5R
74ACT14MTC
49-,32-
SLP_S3_5R
+V3
+V2.5L
+V5
+V5A
+V2.5
+V3A
Q1035
Q11
8
5
4
D
S
G
Q1042
1
2
3
6
7
4
3
D
G
4
1
2
5
6
FDR840P
C274 1
1
R78
220K
2
10UF_K_6.3V
1
1
R1236
470_5%
R1345
470_5%
C1350
2
2
2
Q1034
S
1 C52
2 0.1UF_16V
14
SLP_S5#_3R
38-
5
7
NDS7002A 1
47UF_6.3V_METAL
2G
D
3
1
2
5
6
FDC638P
R1343
220K
1 C6024
1
2
Q1023 3
D
2G
G
1
1
R1372
220K
D
S
3
FDC638P
2
+V5A
S
C1351
1
1
2
47UF_6.3V_METAL
1000PF_0402
R1344
470_5%
+V5A
2
Q1033 3
D
2G
S
S
1
NDS7002A
1
NDS7002A
1 C53
2 0.1UF_16V
14
U1038
6
11
74ACT14MTC
7
U1038
10
SLP_S5#_5R
74ACT14MTC
Engineer
INVENTEC
David Du
Drawn by
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R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, August 21, 2003
Time Changed
11:28:38 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
POWER(SLEEP)
VER
A02
Model Number
PC8803
Sheet
13
of
67
+V3S
1
R1424
180_0.5%
1
D1029
2
1N4148
2
1 C1408
2 1UF_10V
+V5S
+V3S
+V5A
+V5A
1
R1412
4.7K_5%
1
R1425
10K_5%
+V1.5S +V2.5S
2
2
+V1.8S
U103610
9
1
IN1 VCC OUT1 8
2 IN2
OUT2 7
3 IN3
OUT3 6
4
IN4 GND OUT4
5
MAX_MAX6338KUB_UMAX_10P
+V3A
14
13
7
Q1052 3
D
2G
U1038
12
74ACT14MTC
59-,40-,30-,11-
PWR_GOOD_3
S
NDS7002A 1
9-
PWR_GOOD#_5
9-
PWR_GOOD_5
+V3A
1
R277
511K_1%
1 C306
2 0.1UF_16V
2
5
2
U1032
4
40-,38-
VCC1_POR#_3
3
TI_SN74LVC1G17DBVR_SOT_5P
1 C307
1
R278
100K_5%
2 0.1UF_16V
2
Engineer
INVENTEC
David Du
Drawn by
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R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:25 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
POWER(SEQUENCE)
VER
A02
Model Number
PC8803
Sheet
14
of
67
+V3S
+V3S
(10/5)
L1018
NFM40P12C223
2
1
3
(15/5)
(10/5)
4
1
1
1
1
1
1
8
14
19
32
37
46
50
Place crystal within 500
C1339
1
1
10PF
1
2
X1001
1
R1314
OPEN
2
R1312
1K_5%
C1340
1
2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
2 XTAL_IN
14.318MHZ
10PF
3 XTAL_OUT
2
1
2
40 SEL2
55 SEL1
54 SEL0
SLP_S1#_3R
1
38-
1
1
R1311
1K_5%
38-
PCISTOP#_3
R1313
OPEN
2
2
R1328
1
2
10K_5%
+V3S
1 R1329
2
OPEN
ICH_SMDAT_3
CPUSTOP#_3
38-,11-
ICH_SMCLK_3
1
R1335
475_1%
2
+V3S
R1370 2
33_5%
1
1
2
C1367
2
10UF_K_6.3V
22UF_6.3V
VDDA 26
VSSA 27
1
CPU2 45 CLK_CPU_BCLK_3
CLK_CPU_BCLK#_3
CPU2# 44
CLK_MCH_BCLK_3
CPU1 49
CPU1# 48 CLK_MCH_BCLK#_3
R1327 2
1K_5%
1
C1366
0.01UF_16V
U1020
mils of CLK_TITAN
(10/5)
C1365
2 C135
2 C132
2 C133
2 C134
2 C118
C1363
0.01UF_16V22UF_6.3V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V
+V3S
1 L1019 2
BLM11A221S
1
CPU0 52
CPU0# 51
1
R1332 2 33_5%
1
R1331 2 33_5%
1
R1330 2 33_5%
1
R1333 2 33_5%
R1310 2
33_5%
33_5%
1
CLK_CPU_BCLK
CLK_CPU_BCLK#
1
2
1
R1369
1
2
R1368
2
22-
CLK_MCH_BCLK
22-
CLK_MCH_BCLK#
R148 49.9_1%
1
2
R1309
0_5%
19-
CLK_ITP
19-
CLK_ITP#
1
2
2
R1325 49.9_1%
CLK_AGPCONN_3
1
R150 49.9_1%
2
R1308 49.9_1%
66INPUT 24
66BUF2 23
1616-
R149 49.9_1%
1
CLK_ITP#_3 1 R1326 2
CLK_ITP_3
2
R147 49.9_1%
33_5%
1
2
R1324
0_5%
29-
CLK_AGPCONN
21-
CLK_MCH66
25 PWRDWN#
66BUF1 22
CLK_MCH66_3
34 PCI_STOP#
66BUF0 21
CLK_ICHHUB_3
1
R1367 2 33_5%
37-
CLK_ICHHUB
53 CPU_STOP#
PCIF2 7
CLK_ICHPCI_3
1
R1340 2 33_5%
37-
CLK_ICHPCI_3R
28 VTT_PWRGD#
PCIF1 6
43 MULT0
PCIF0 5
CLK_CBPCI_3R
1
33_5%
2
37-,26-,25-,20-
29 SDATA
PCI6 18
CLK_CBPCI_3
33_5%
1
R1337 2
51-
37-,26-,25-,20-
30 SCLOCK
PCI5 17
CLK_NICPCI_3
33_5%
1
R1338 2
55-
CLK_NICPCI_3R
33 DRCG0
PCI4 16
CLK_MINIPCI_3
33_5%
1
R1339 2
54-
CLK_MINIPCI_3R
35 DRCG1_VCH
PCI3 13
42 IREF
PCI2 12
CLK_FWHPCI_3
33_5%
1
R1336 2
59-
CLK_FWHPCI_3R
PCI1 11
CLK_SIOPCI_3
33_5%
1
R1342 2
42-
CLK_SIOPCI_3R
PCI0 10
CLK_KBCPCI_3
33_5%
1
R1341 2
40-
CLK_KBCPCI_3R
USB 39
CLK_ICH48_3
33_5%
1
R1334 2
38-
CLK_ICH48_3R
ADI48M_3
OPEN
1
R1361 2
45-
ADI48M
1
R1584 2
33_5%
1
33_5%
R1316 2
42-
CLK_SIO14_3R
33_5%
1
R1315 2
38-
CLK_ICH14_3R
33_5%
1
R1317 2
40-
CLK_KBC14_3R
41 VSSIREF
4
9
15
20
31
36
47
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DOT 38
REF 56
ICS_950810_TSSOP_56P
CLK_SIO14_3
1
R1366
10K_5%
2
PM_VGATE
11-
Q1040 3
D
2G
S
NDS7002A 1
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:30 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
CLOCK_GENEATOR
VER
A02
Model Number
PC8803
Sheet
15
of
67
CN19
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
GTLDQS5/15-4/12
H_ADSTB#0
22-
GTL4/8
AGP4/8
GTL4/8
H_STPCLK#
H_INTR
H_NMI
H_SMI#
37-,5373737-
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTLDQS5/15-4/12
H_ADSTB#1
22-
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB#1
C2 A20M#
D3 FERR#
A3 IGNNE#
GTL4/8
GTL4/8
C6
D1
D4
B4
STPCLK#
LINT0
LINT1
SMI#
GTL4/8
N2
L1
J3
232323-
L4
H2
M2
232323-
H_ADS#
H_BNR#
H_BPRI#
GTL4/8
GTL4/8
+VCCP
1
GTL4/8
H_DEFER#
H_DRDY#
H_DBSY#
GTL4/8
GTL4/8
GTL4/8
N4
23-
A4
B5
R261
56_5%
2
H_BR0#
GTL4/8
59-,37-
H_INIT#
GTL4/8
J2
23-
H_LOCK#
GTL4/8
GTL4/8
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM#0
BPM#1
BPM#2
BPM#3
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
B11
H1
K1
L2
M3
22-,19-
GTL4/8
H_CPURST#
GTL4/8
23-
H_RS#(0)
H_RS#(1)
H_RS#(2)
23-
H_TRDY#
GTL4/8
2323-
H_HIT#
H_HITM#
GTL4/8
C8
B8
A9
C9
A10
B10
A13
C12
A12
C11
B13
A7
A15
ITP_CLK1 A16
ITP_CLK0 B14
BCLK1 B15
BCLK0
H_RS#(0:2)
GTL4/8
K3
K4
B17
PROCHOT# B18
THERMDA
A18
THERMDC C17
THERMTRIP#
GTL4/8
GTL4/8
BR0#
IERR#
INIT#
LOCK#
ITP SIGNALS
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
GTL4/8
GTL4/8
GTL4/8
DEFER#
DRDY#
DBSY#
GTL4/8
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
373737-
GTL4/8
GTL4/8
22-
H_A20M#
H_FERR_S#
H_IGNNE#
GTL4/8
ADS#
BNR#
BPRI#
ADDR GROUP 1
H_A#(17:31)
22-
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB#0
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
THERM
H_REQ#(4:0)
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
U3
R2
P3
T2
P1
T1
CONTROL
GTL4/8
H_CLK
22-
ADDR GROUP 0
GTL4/8
H_A#(3:16)
+VCCP
191919191919-
H_BPM0_ITP#
H_BPM1_ITP#
H_BPM2_ITP#
H_BPM3_ITP#
H_BPM4_PRDY#
H_BPM5_PREQ#
19191938-,19-
THERM10/10
THERM10/10
H_THERMDA
H_THERMDC
PM_THRMTRIP#
CLK4/4_25A
CLK4/4_25A
19-
H_TCK
POWER15/5
R1140
150_5%
2
19-
TDI_FLEX
LAYOUT NOTES
1
R1120
680_5%
2
1515-
H_TCK
H_TDO
H_TMS
H_TRST#
ITP_DBRESET#
TP1
202038-
1
19-
H_TCK FORKS
AT CPU PIN
POWER15/5
CLK_CPU_BCLK#
CLK_CPU_BCLK
AMP_MPGA479M_C_1376756_479P_BANIAS
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:36 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
BANIAS-1
VER
A02
Model Number
PC8803
Sheet
16
of
67
H_D#(16:31)
22-
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
222222TP570
TP571
TP572
2
1
R241
2K_1%
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
K24
L24
J26
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#
AC1
G1
E26
AD26
GTLREF3
GTLREF2
GTLREF1
GTLREF0
C14
C3
AF7
C16
E1
2
11-
1
R1088 2
0_5%
1
RSVD1
RSVD2
RSVD3
TEST3
PSI#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
DATA GRP 2
DATA GRP 0
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#
A1 NC0
B2 NC1
LAYOUT NOTES : PLACE R1275 , R1276 CLOSE TO CN1008
PSI#
CN19
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
DATA GRP 3
222222-
H_DSTBN#1
H_DSTBP#1
H_DINV#1
R242
1K_1%
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
C23
C22
D25
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
+VCCP
1
22-
DATA GRP 1
H_D#(0:15)
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
W25
W24
T24
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
AE24
AE25
AD20
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
R244 1
R243 1
R1093 1
R1091 1
COMP0 P25
COMP1 P26
COMP2 AB2
COMP3 AB1
DPSLP#
DPWR#
PWRGOOD
SLP#
TEST1
TEST2
B7
C19
E4
A6
222222-
H_DSTBN#2
H_DSTBP#2
H_DINV#2
22-
H_D#(48:63)
222222-
H_DSTBN#3
H_DSTBP#3
H_DINV#3
27.4_1%
54.9_1%
27.4_1%
54.9_1%
+VCCP
37-,21213737-
H_DPSLP#
H_DPWR#
H_PWRGD
H_CPUSLP#
C5
F23
AMP_MPGA479M_C_1376756_479P_BANIAS
1
R1141
OPEN
2
H_D#(32:47)
2
2
2
2
R11181330_5% 2
MISC
22-
1
R260
OPEN
R1147
OPEN
2
2
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:41 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
BANIAS-2
VER
A02
Model Number
PC8803
Sheet
17
of
67
+VCC_CORE
+VCC_CORE
CN19
1 C252
1 C1130
2
2
10UF_K_6.3V
1 C267
1 C1114
1 C284
2
2
10UF_K_6.3V 10UF_K_6.3V
2
10UF_K_6.3V
10UF_K_6.3V
1 C272
1 C1109
2
2
10UF_K_6.3V
1 C265
1 C1131
2
2
10UF_K_6.3V 10UF_K_6.3V
1 C271
2
10UF_K_6.3V
10UF_K_6.3V
1 C264
1 C1093
2
2
10UF_K_6.3V
1 C283
1 C1138
1 C1105
2
2
10UF_K_6.3V 10UF_K_6.3V
2
10UF_K_6.3V
10UF_K_6.3V
1 C1129
1 C1113
2
2
10UF_K_6.3V
1 C1128
1 C1110
2
2
10UF_K_6.3V 10UF_K_6.3V
1 C1083
2
10UF_K_6.3V
10UF_K_6.3V
1 C1084
1 C1106
2
2
10UF_K_6.3V
1 C268
1 C273
2
2
10UF_K_6.3V 10UF_K_6.3V
1 C1091
2
10UF_K_6.3V
10UF_K_6.3V
1 C1092
1 C269
2
2
10UF_K_6.3V
1 C266
1 C282
1 C1137
2
2
10UF_K_6.3V 10UF_K_6.3V
2
10UF_K_6.3V
10UF_K_6.3V
AA11
AA13
AA15
AA17
AA19
AA21
AA5
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC9
AD10
AD12
AD14
AD16
AD18
AD8
AE11
AE13
AE15
AE17
AE19
AE9
AF10
AF12
AF14
AF16
AF18
AF8
D18
D20
D22
D6
D8
E17
E19
E21
E5
E7
E9
F18
F20
F22
F6
F8
G21
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
G5
H22
H6
J21
J5
K22
U5
V22
V6
W21
W5
Y22
Y6
+V1.8S
+V1.5S
+VCCA
VCCSENSE
VSSSENSE
1 C1112
2
2
10UF_K_6.3V
1 C270
2
2
10UF_K_6.3V 10UF_K_6.3V
10UF_K_6.3V
0.01UF_16V
2
0.01UF_16V
1 C295
1 C245
1 C1073
1 C294
1 C243
1 C293
1 C1071
1 C1072
2
2
2
2
2
2
2
2
10UF_K_6.3V
0.01UF_16V
10UF_K_6.3V
0.01UF_16V
+VCCP
C1134
0.1UF_16V
1 C1090
2
1 C1088
2
1 C1136
1 C1135
1
1 C1132
2
2
2
2
0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V
1 C1085
2
0.1UF_16V 0.1UF_16V
100UF_2.5V_METAL
1 C1089
E2
F2
F3
G3
G4
H4
111111111111-
1 C1087
1 C1133
C1108
1
C1086
1
2
2
0.1UF_16V 0.1UF_16V 0.1UF_16V
2
100UF_2.5V_METAL
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
AE7
AF6
1
1
2
2
R258
OPEN
1 C1139
1 C1082
R246
OPEN
2
P23
VCCQ0 W4
VCCQ1
VID0
VID1
VID2
VID3
VID4
VID5
1
R247
0
10UF_K_6.3V
F26
VCCA0 B1
VCCA1 N1
VCCA2
AC26
VCCA3
D10
VCCP0 D12
VCCP1 D14
VCCP2
D16
VCCP3 E11
VCCP4 E13
VCCP5
E15
VCCP6 F10
VCCP7 F12
VCCP8
F14
VCCP9 F16
VCCP10 K6
VCCP11
L21
VCCP12 L5
VCCP13 M22
VCCP14
M6
VCCP15 N21
VCCP16 N5
VCCP17 P22
VCCP18 P6
VCCP19 R21
VCCP20 R5
VCCP21 T22
VCCP22
T6
VCCP23 U21
VCCP24
AMP_MPGA479M_C_1376756_479P_BANIAS
1 C1111
1
R259
OPEN
2
10UF_K_6.3V
10UF_K_6.3V
NOTES : INSTALL 54.9_1% FOR TESTING
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:46 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
BANIAS-3
VER
A02
Model Number
PC8803
Sheet
18
of
67
CN19
A2
A5
A8
A11
A14
A17
A20
A23
A26
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
In-Target Probe
+VCCP
+VCCP
1
1
R1105
54.9_1%
+VCCP
1 C1074
2 0.1UF_16V
1
R1124
54.9_1%
R1123
39.2_1%
+V3A
POWER15/5
2
TDI_FLEX
H_TMS
H_TCK
H_TDO
H_TRST#
H_CPURST#
1616161616-
2
2
R11251
2 22.6_1%
R11221
2 22.6_1%
GTL4/8
22-,16-
POWER15/5
1
2
5
7
3
CN1002
1
2
5
7
3
12 12
H_TCK
16-
11 11
CLK_ITP#
CLK_ITP
1515-
8 8
9 9
CLK4/4_25A
CLK4/4_25A
10
14
16
18
20
22
1
R1121
27.4_1%
2
10
14
16
18
20
22
1
27 27
28 28
26 26
R1106
240_5%
POWER15/5
2
25 25
24 24
38-,16-
23
21
19
17
15
13
161616161616-
23
21
19
17
15
13
ITP_DBRESET#
H_BPM0_ITP#
H_BPM1_ITP#
H_BPM2_ITP#
H_BPM3_ITP#
H_BPM4_PRDY#
H_BPM5_PREQ#
4 4
6 6
MLX_52435_2891
LAYOUT NOTES : H_CPURST# PIN OF MCH_M FORK OUT INTO TWO BRANCHES ON CPU AND ITP CONNECTOR
Engineer
AMP_MPGA479M_C_1376756_479P_BANIAS
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:53:51 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
BANIAS-4
VER
A02
Model Number
PC8803
Sheet
19
of
67
+V5
CN20
3
1 C296
2 1UF_10V
FAN_PWM_3
TEMP_WARN#_3
40-
1 5
38-,20-
2
BAT54
U17
4
R262
1
NC7SZ00M5
MLX_53398_0390_3P
Q13 3
D
1G
2
1K_5%
3
1 VCC
2 GND
3
REFENCE
1
D5
+V3S
1 C1060
2 0.01UF_16V
S
FDV303N 2
+V3S
1 C111
2 0.1UF_16V
1 C285
2 0.1UF_16V
+V3S
ICH_SMCLK_3
ICH_SMDAT_3
1616-
H_THERMDC
H_THERMDA
37-,26-,25-,1537-,26-,25-,15-
C287
1 2
2200PF_50V
DMINUS
30-
DPLUS
30-
C286
1 2
OPEN
6
16
15
9
10
U15
VCC
SCL
SDA
D1-_NT1
D+
11 D212 D2+
PWM_OUT1
TACH1_AIN1
PWM_OUT2
TACH2_AIN2
1
2
3
4
THERM#
FAN_FAULT#
INT#_NTO
ADD
GND
7
8
14
13
5
1
R1435
2.2K_5%
2
38-,2037-
TEMP_WARN#_3
THERM_SCI#
ANLG_ADM1031ARQ_QSOP_16P
Engineer
LAYOUT NOTES: PUT THE THERMAL SENSOR CLOSE TO CPU
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Wednesday, August 13, 2003
Time Changed
10:20:09 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
THERMAL&FAN CONTROLLER
VER
A02
Model Number
PC8803
Sheet
20
of
67
AGP_AD(31:0)
AGP_CBE#(3:0)
AGPREF
AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_REQ#
AGP_GNT#
1 C1165
2 0.1UF_16V
2929292929292929-
CLK_MCH66
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
1529292929-
AGP_SBA(7:0)
29-
1
R237
8.2K_1%
2
AGP_SBSTB
AGP_SBSTB#
2929-
AGP_RBF#
AGP_WBF#
2929-
AGP_ST0
AGP_ST1
AGP_ST2
292929-
29-
1
EE2
Changed by
+V1.8S
1
R1167
36.5_1%
Date Changed
Thursday, July 31, 2003
R227 40.2_1%
2
+V1.5S
10:54:07 am
Time Changed
M_RCOMP
21212121-
SBS0
SBS1
SCS#0
SCS#1
SCS#2
SCS#3
HUB
M_RAS#
2
M_CS3
M_CS2
M_CS1
M_CS0
28-,27-,26-
M_WE#
28-,27-,26-
M_CAS#
28-,27-,26-
M_RAS#
2
2
2
2
25252525-
10_5%
R1228 2
MEMORY
MEMORY
29-
21212121-
55-,48-,37-,29-
QA CHK
2
2
2
2
28-,27-,26-
M_BS1#
28-,27-,2628-,2628-,2628-,2528-,25-
M_BS0#
M_CKE3_R#
M_CKE2_R#
M_CKE1_R#
M_CKE0_R#
373737-
R&D CHK
ITL_ODEM_BGA_593P
10_5%
10_5%
10_5%
10_5%
SDREF0 J21
SDREF1 J9
27-,28-,26-
Y8 DPWR#
J25
K25
G5
F5
G24
E24
G25
J24
G6
G7
K23
J23
M_CAS#
V8 DPSLP#
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
M_WE#
AD26 NC0
AD27 NC1
J28 SMRCOMP
G15RCVENIN#
G14RCVENOUT#
G12
G13
E9
F7
F9
E7
SCKE0
SCKE1
SCKE2
SCKE3
AGP
2
2
2
G23
E22
H23
F23
1
1
1
1
SWE# G11
SCAS# G8
SRAS# F11
R1161
R1170
R1191
R1205
M_DQS5
M_DQS6
M_DQS7
M_DQS0
M_DQS1
M_DQS2
M_DQS3
M_DQS4
1
F26
C26
C23
B19
D12
C8
C5
E3
E15
M_DATA(63:0)
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8
R1143 10_5%
R1155 10_5%
R1156 10_5%
M_CS0
M_CS1
M_CS2
M_CS3
HI_0
HI_1
HI_2
HI_3
HI_4
HI_5
HI_6
HI_7
HI_8
HI_9
HI_10
HI_STB
HI_STB#
HLRCOMP
HI_REF
RBF#
WBF#
PIPE#
ST0
ST1
ST2
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
1
1
1
J27 RSTIN#
H27 RSVD1
H26 TESTIN#
P25
P24
N27
P23
M26
M25
L28
L27
M27
N28
M24
N25
N24
P27
P26
AE22
AE23
AF22
AG25
AF24
AG26
AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25
AF27
AF26
R24
R23
AC27
AC28
28-,26-,25-
M_BS0#
M_BS1#
HUB_RCOMP
GRCOMP
GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#
GRCOMP
AGPREF
66IN
G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E4
C3
D3
F4
F3
B2
C2
E2
G4
C16
D16
B15
C14
B17
C17
C15
D14
E12
F17
E16
G17
G18
E18
F19
G20
G19
F21
F13
E20
G21
G22
27-
Y24
W28
W27
W24
W23
W25
AG24
AH25
AD25
AA21
P22
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71
SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
RSVD2
M_A(12)
M_A(11)
M_A(10)
M_A(9)
M_A(8)
M_A(7)
M_A(6)
M_A(5)
M_A(4)
M_A(3)
M_A(2)
M_A(1)
M_A(0)
GCBE0#
GCBE1#
GCBE2#
GCBE3#
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
U16
M_A(12:0)
V25
V23
Y25
AA23
R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
AA28
AB25
AB27
AA27
AB26
Y23
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24
M_DQS_R(7:0)
TP544
TP545
M_CLK_DDR1
M_CLK_DDR1#
M_CLK_DDR2
M_CLK_DDR2#
26262626TP546
TP547
M_CLK_DDR4
M_CLK_DDR4#
M_CLK_DDR5
M_CLK_DDR5#
SM_VREF
C1148
M_RCVIN
100MILS(+-5MILS)
1737-,17-
HUB_PSTRB#
HUB_PSTRB
David Du
David Du
Drawn by
Engineer
DOC CTRL CHK
MFG ENGR CHK
VER
A02
1
1 C1180
26-,25-,12-
2
2
R253 R254 R252 R251
0_5% 0_5% 0_5% 0_5%
1 28-,26M_CS3_R#
1 28-,26M_CS2_R#
1 28-,25M_CS1_R#
1 28-,25M_CS0_R#
MCH_TEST#
C1190
1
2
0.01UF_16V
PC8803
Model Number
1
SM_VREF
0.1UF_16V 0.1UF_16V
TP540
TP539
H_DPWR#
H_DPSLP# +V1.25S
1 C218 30_1%
1 R2282
2 0.1UF_16V
+V1.5S
+V1.8S
R229
OPEN
2
1
2
Sheet
R1169
150_1%
PCI_RESET1#_3
HUB_VREF_MCH
1 C1191
2 0.1UF_16V
1
2
21
R1168
150_1%
HUB_PD(10:0)
TITLE
INVENTEC
DIAMOND
Size
A3
ODEM-1
of
67
17-
H_REQ#(4:0)
U6
T5
R2
U3
R3
P7
T3
P4
P3
P5
R6
N2
N5
N3
J3
M3
M4
M5
L5
K3
J2
N6
L6
L2
K5
L3
L7
K4
J5
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
U2
T7
R7
U5
T4
R5
N7
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#
K8
J8
AC13
AD13
AC2
AA7
BCLK#
BCLK
HRCOMP1
HSWNG1
HRCOMP0
HSWNG0
171717171717171717171717-
AD4
AF6
AD11
AC15
AD3
AG6
AE11
AC16
AD5
AG5
AH9
AD15
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
DBI0#
DBI1#
DBI2#
DBI3#
19-,1619-,16-
AE17 CPURST#
16-
+VCCP
1
2
H_ADSTB#0
1 C1140
H_ADSTB#1
R1149 2 0.1UF_16V
CLK_MCH_BCLK#
301_1%
CLK_MCH_BCLK
HYRCOMP
HYSWING
HXRCOMP
16161515-
1
R1148
150_1%
1
2
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
1
R1160
27.4_1%
2
R1142
27.4_1%
2
HYSWING, HXSWING 12 mil trace, 10 mil space
+VCCP
LAYOUT NOTES
1
R1150
301_1%
1 C1142
2 0.1UF_16V
H_CPURST# FORKS
H_CPURST#
H_CPURST#
AT ODEM PIN
2
MCH_GTLREF
HXSWING
H_D#(63:0)
U16
16-
M7
P8
AA9
AB12
AB16
HOST
H_A#(31:3)
HVREF0
HVREF1
HVREF2
HVREF3
HVREF4
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AE5
AF3
AC6
AC3
AF4
AE2
AG4
AG2
AE7
AE8
AH2
AC7
AG3
AD7
AH7
AE6
AC8
AG8
AG7
AH3
AF8
AH5
AC11
AC12
AE9
AC10
AE10
AD9
AG9
AC9
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16
1
ITL_ODEM_BGA_593P
R1151
150_1%
2
+VCCP
1
R1152
49.9_1%
2
1
1 C308
1 C309
1 C1144 1 C1166 1 C1143
1 C310
R1153 2
2 220P_25V 2 220P_25V 2 220P_25V 2 220P_25V
100_1% 1UF_10V2
2
220P_25V
CLOSE TO MCH
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:13 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ODEM-2
VER
A02
Model Number
PC8803
Sheet
22
of
67
+V1.5S
1 C1211
1 C1168
1 C1172
1 C214
2
2
2
2
10UF_K_6.3V
1 C1163
1 C1210
1 C1167
1 C233
1 C1171
2
2
2
2
2
0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V
10UF_K_6.3V
+V1.2_MCH
0.22UF_K_10V
1 C1176
1 C1174
1 C1173
1 C1175
1 C1169
2 0.047UF_10V
2
2 0.022UF_16V
2 0.01UF_16V
2
0.015UF
1 C1146
2
POWER15/5
2.2UF_0805_16V
1 C1192
100UF_2.5V_METAL
C1178
1
C1170
1
100UF_2.5V_METAL
1 C1177
1 C1214
+V1.8S
1C1179
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
2
AA22
AA26
R22
R29
U22
U26
W22
W29
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
L25
L29
M22
N23
N26
10UF_K_6.3V
ETS#
+V1.8S
25-
G16
G10
G9
H7
H4
H3
G3
G2
VCCAGP0
VCCAGP1
VCCAGP2
VCCAGP3
VCCAGP4
VCCAGP5
VCCAGP6
VCCAGP7
VCCAGP8
VCCAGP9
VCCAGP10
VCCAGP11
VCCAGP12
VCCAGP13
VCCAGP14
VCCAGP15
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCCHL0
VCCHL1
VCCHL2
VCCHL3
VCCHL4
RSVD3
RSVD4
RSVD5
RSVD6
ETS#
RSVD7
RSVD8
RSVD9
T17 VCCGA
T13 VCCHA
POWER15/5
C1213 1
0.01UF_16V 2
1
C1212
2 10UF_K_6.3V
HOST
U16
POWER15/5
10UF_K_6.3V
ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BR0
BNR#
BPRI#
DBSY#
RS0#
RS1#
RS2#
U7
V4
W2
Y4
Y3
Y5
W3
V7
V3
Y7
V5
W7
W5
W6
1616161616161616161616-
H_ADS#
H_TRDY#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
16-
H_RS#(2:0)
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
GTL4/8
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
AB10
AB14
AB18
AB20
AB8
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
M8
T8
+VCCP
C234
0.1UF_16V
100UF_2.5V_METAL
1
C246
1
C247
1 C248
1 C249
1 C1145
1 C1141
1
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V 2 0.1UF_16V 2
100UF_2.5V_METAL
1 C1147
1 C235
1 C1164
POWER15/5
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
A13
A17
A21
A25
A5
A9
C1
C29
D11
D15
D19
D23
D25
D7
E5
F10
F14
F16
F18
F22
G1
G29
H10
H12
H14
H16
H18
H20
H22
H24
H5
H8
J6
K22
K24
K26
K7
L23
+V2.5
1 C215
1 C1193
1 C216
1 C1150
1 C1149
1 C1184
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1
C278
1 C253
1 C1182
1 C1183
1 C1181
1 C1194
1 C236
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
150UF_4V_METAL
1 C250
1 C1115
POWER15/5
1 C276
1
C1215
1 C277
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1 C275
2 10UF_K_6.3V2 10UF_K_6.3V
POWER15/5
150UF_4V_METAL
ITL_ODEM_BGA_593P
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:19 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ODEM-3
VER
A02
Model Number
PC8803
Sheet
23
of
67
U16
A11
A15
A19
A23
A27
A3
A7
AA1
AA29
AA4
AA8
AB11
AB13
AB15
AB17
AB19
AB22
AB6
AB9
AC1
AC18
AC20
AC21
AC23
AC26
AC4
AD10
AD12
AD14
AD16
AD19
AD22
AD6
AD8
AE1
AE18
AE20
AE29
AE4
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AF5
AF7
AF9
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ11
AJ13
AJ15
AJ17
AJ27
AJ3
AJ5
AJ7
AJ9
D13
D17
D21
D5
D9
E1
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
E14
E26
E29
F12
F15
F20
F24
F6
F8
G26
H11
H13
H15
H17
H19
H21
H6
H9
J1
J22
J26
J29
J4
J7
K27
K6
L1
L22
L24
L26
L4
L8
M23
M6
N1
N13
N15
N17
N22
N29
N4
N8
P14
P16
P6
R1
R13
R15
R17
R26
R4
R8
T14
T16
T22
T6
U1
U13
U15
U17
U29
U4
U8
V22
V6
W1
W26
W4
W8
Y22
Y6
ITL_ODEM_BGA_593P
POWER15/5
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:24 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ODEM-4
VER
A02
Model Number
PC8803
Sheet
24
of
67
M_A_FR_(12:0)
28-,27-,26-
27-
M_DATA_R_(63:0)
CN15
M_CLK_DDR2
M_CLK_DDR2#
M_CLK_DDR1#
M_CLK_DDR1
M_CKE0_R#
M_CKE1_R#
M_CAS_FR#
M_RAS_FR#
M_WE_FR#
M_CS0_R#
M_CS1_R#
1
R1172
OPEN
2
ICH_SMCLK_3
ICH_SMDAT_3
M_DQS_R(7:0)
28-,26-,21-
21212121-
28-,2128-,2127272728-,2128-,21-
37-,26-,20-,1537-,26-,20-,15-
12
26
48
62
134
148
170
184
78
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
11
25
47
61
133
147
169
183
77
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CN15
1 C1187
2 0.1UF_16V
1 C1198
2 0.1UF_16V
1 C1116
2 0.1UF_16V
1 C1117
2 0.1UF_16V
1 C1185
2 0.1UF_16V
1 C1186
2 0.1UF_16V
1 C1197
2 0.1UF_16V
1
C1241
C181
C311
1
1
150UF_4V_METAL
150UF_4V_METAL
+V3S
SM_VREF
SM_VREF
26-,21-,12-
1 C176
2 0.1UF_16V
GG
9
21
33
45
57
69
81
93
113
131
143
155
157
167
179
191
10
22
34
36
46
58
70
82
92
94
114
132
144
156
168
180
192
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
199
197
1
2
VDDID
VDDSPD
VREF1
VREF2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
3
15
27
39
51
63
75
87
103
125
137
149
159
161
173
185
4
16
28
38
40
52
64
76
88
90
104
126
138
150
162
174
186
DU1
DU2
DU3
DU4
85
123
124
200
AMP_1473005_1_200P
+V2.5
+V3
1
SO DIMM 0
U14
1
SCK/SCK#(0)=SCK/SCK#(1)=SCK/SCK#(2)
1
R248
10K_5%
DQ=CB=DQS
SCK(2:0) be longer than DQS 1"~2"
1 C1151
2 0.1UF_16V
150UF_4V_METAL
AMP_1473005_1_200P
SCK/SCK#(3)=SCK/SCK#(4)=SCK/SCK#(5)
201
202
BA0
BA1
BA2_DU
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0
CK0#
CK1#
CK1
CK2
CK2#
CKE0
CKE1
CAS#
RAS#
WE#
S0#
S1#
SA0
SA1
SA2
SCL
SDA
RESET_DU
+V2.5
2
R1154
10K_5%
VCC 5
R1171
OPEN
2
117
116
98
71
73
79
83
72
74
80
84
35
37
158
160
89
91
96
95
120
118
119
121
122
194
196
198
195
193
86
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
SET
OUT#
4 HYST
1
2727-
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13_DU
5
7
13
17
6
8
14
18
19
23
29
31
20
24
30
32
41
43
49
53
42
44
50
54
55
59
65
67
56
60
66
68
127
129
135
139
128
130
136
140
141
145
151
153
142
146
152
154
163
165
171
175
164
166
172
176
177
181
187
189
178
182
188
190
2 GND
M_BS0_FR#
M_BS1_FR#
+V2.5
112
111
110
109
108
107
106
105
102
101
115
100
99
97
3
23-
ETS#
MAX_MAX6509HAUK_T_SOT23_5P
SCK(5:3) be longer than DQS 1"~2"
SDQ(63:0) from MCH to DIMM0 2"~3.5"
SCS#,SCKE from MCH to DIMM0 2"~4.5"
SMA(12:0),SBS(1:0),SRAS#,SCAS#,SWE# 2"~3.5"
SCK 3"~6.5"
Engineer
LAYOUT NOTES : LOCATION MUST BE CENTER OF BOTTON SODIMM 0
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:29 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
DDR-SDRAM-1
VER
A02
Model Number
PC8803
Sheet
25
of
67
27-,28-,21-
M_A(12:0)
28-,27-,25-
M_DATA_R_(63:0)
CN16
M_BS0#
M_BS1#
+V2.5
1
R240
OPEN
2
1
R239
OPEN
+V3S
2
M_CLK_DDR5
M_CLK_DDR5#
M_CLK_DDR4#
M_CLK_DDR4
M_CKE2_R#
M_CKE3_R#
M_CAS#
M_RAS#
M_WE#
M_CS2_R#
M_CS3_R#
ICH_SMCLK_3
ICH_SMDAT_3
M_DQS_R(7:0)
28-,25-,21-
21212121-
28-,2128-,2128-,27-,2128-,27-,2128-,27-,2128-,2128-,21-
37-,25-,20-,1537-,25-,20-,15-
28-,27-,2128-,27-,21-
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13_DU
117
116
98
71
73
79
83
72
74
80
84
35
37
158
160
89
91
96
95
120
118
119
121
122
194
196
198
195
193
86
BA0
BA1
BA2_DU
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0
CK0#
CK1#
CK1
CK2
CK2#
CKE0
CKE1
CAS#
RAS#
WE#
S0#
S1#
SA0
SA1
SA2
SCL
SDA
RESET_DU
12
26
48
62
134
148
170
184
78
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
11
25
47
61
133
147
169
183
77
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
13
17
6
8
14
18
19
23
29
31
20
24
30
32
41
43
49
53
42
44
50
54
55
59
65
67
56
60
66
68
127
129
135
139
128
130
136
140
141
145
151
153
142
146
152
154
163
165
171
175
164
166
172
176
177
181
187
189
178
182
188
190
+V2.5
201
202
112
111
110
109
108
107
106
105
102
101
115
100
99
97
CN16
1 C1196
2 0.1UF_16V
1 C217
2 0.1UF_16V
1 C1195
2 0.1UF_16V
1 C1152
2 0.1UF_16V
1 C1153
2 0.1UF_16V
1 C1118
2 0.1UF_16V
1 C254
2 0.1UF_16V
1 C1216
2 0.1UF_16V
C1312
1
C313
1
150UF_4V_METAL
150UF_4V_METAL
+V3S
SM_VREF
25-,21-,12-
9
21
33
45
57
69
81
93
113
131
143
155
157
167
179
191
10
22
34
36
46
58
70
82
92
94
114
132
144
156
168
180
192
GG
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
1 C177
2 0.1UF_16V
3
15
27
39
51
63
75
87
103
125
137
149
159
161
173
185
4
16
28
38
40
52
64
76
88
90
104
126
138
150
162
174
186
85
DU1
DU2 123
DU3 124
200
DU4
199
VDDID
197 VDDSPD
1 VREF1
2
VREF2
SM_VREF
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
AMP_C_1279284_1_DDR_SODIMM_200P
AMP_C_1279284_1_DDR_SODIMM_200P
SO DIMM 1
SCK(2:0) be longer than
SCS(1:0),CKE(1:0)
SMA(12:0),SBS(1:0)
RAS#,CAS#,WE#
1"~3"
SCK(5:3) be longer than
SCS(3:2),CKE(3:2)
SMA(12:0),SBS(1:0)
RAS#,CAS#,WE#
1"~3"
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:35 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
DDR-SDRAM-2
VER
A02
Model Number
PC8803
Sheet
26
of
67
28-,26-,25-
10_5%
RS1030
DDR4/8
1
2
3
4
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
1
2
3
4
DDR4/8
10_5%
RS1025
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1008
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
DDR4/8
close to DIMM1<750 mil
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1009
DDR4/8
DDR4/8
8
7
6
5
1
2
3
4
8
7
6
5
DDR4/8
DDR4/8
10_5%
RS1005
1
2
3
4
DDR4/8
DDR4/8
1
2
3
4
DDR4/8
DDR4/8
10_5%
RS1024
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1010
DDR4/8
1
2
3
4
DDR4/8
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1029
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
1
2
3
4
1
2
3
4
DDR4/8
DDR4/8
M_DATA_R_(63:0)
DDR4/8
8
7
6
5
M_A(12:0)
28-,26-,21-,27-
DDR4/8
DDR4/8
DDR4/8
DDR4/8
RS1015 10
DDR4/8
M_A(12)
M_A(11)
M_A(5)
M_A(9)
4
2
1
3
1
2
3
4
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1020
1
2
3
4
10_5%
RS1004
DDR4/8
8
7
6
5
1
2
3
4
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1003
DDR4/8
DDR4/8
DDR4/8
8
7
6
5
DDR4/8
M_A(8)
M_A(4)
M_A(6)
M_A(7)
3
1
2
4
DDR4/8
1
2
3
4
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
1
2
3
4
DDR4/8
DDR4/8
DDR4/8
DDR4/8
RS1011 10
28-,26-,21-
M_A(10)
M_A(3)
M_A(1)
4
3
1
2
DDR4/8
DDR4/8
DDR4/8
M_A(0)
1 R1162 2
1
2
3
4
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
M_A_FR_(0)
10_5%
DDR4/8
DDR4/8
DDR4/8
DDR4/8
M_A_FR_(10)
M_A_FR_(3)
M_A_FR_(1)
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
8
7
6
5
DDR4/8
DDR4/8
DDR4/8
DDR4/8
DDR4/8
M_BS0#
M_BS1#
M_CAS#
M_A(2)
M_RAS#
21-
DDR4/8
1 R1163 2
28-,26-,21-
25-
M_BS0_FR#
252525-,2725-
M_BS1_FR#
M_CAS_FR#
M_A_FR_(2)
M_RAS_FR#
10_5%
RS13 10
DDR4/8
M_DATA(63:0)
M_WE_FR#
25-
5
6
8
7
DDR4/8
8
7
6
5
DDR4/8
8
7
6
5
M_A_FR_(8)
M_A_FR_(4)
M_A_FR_(6)
M_A_FR_(7)
DDR4/8
DDR4/8
M_WE#
10_5%
RS1001
1
2
3
4
10_5%
RS1000
10_5%
RS1019
DDR4/8
DDR4/8
8
7
6
5
DDR4/8
6
8
7
5
DDR4/8
DDR4/8
DDR4/8
M_A_FR_(12:0)
10
RS10
DDR4/8
DDR4/8
10_5%
RS1014
DDR4/8
1
2
3
4
M_A_FR_(12)
M_A_FR_(11)
M_A_FR_(5)
M_A_FR_(9)
DDR4/8
DDR4/8
DDR4/8
10_5%
RS1021
DDR4/8
25-,27-
DDR4/8
5
7
8
6
DDR4/8
28-,26-,2128-,26-,2128-,26-,21-,2728-,26-,21-
3
1
4
2
DDR4/8
DDR4/8
DDR4/8
DDR4/8
6
8
5
7
DDR4/8
DDR4/8
DDR4/8
close to DIMM0<750 mil
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:40 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
DDR-SDRAM-3
VER
A02
Model Number
PC8803
Sheet
27
of
67
1 2 3 4
5 6 7 8
4 3 2 1
RS1002
56
5 6 7 8
4 3 2 1
1 2 3 4
RS16
56
RS11
56
8 5 7 6
8 5 7 6
1
4 3 2 1
RS17
56
RS1012
56
RS14
56
2
RS12
56
M_DATA_R_(63:0)
5 6 7 8
8 7 6 5
5 6 7 8
8 7 6 5
8 7 6 5
5 6 7 8
5 6 7 8
3 4 2 1
1 1 1 1
RS1016
56
6 5 7 8
2 2 2 2
2
2
2
1
1 3 2 4
2
8 7 6 5
1
56_5%
56_5%
56_5%
56_5%
1 4 2 3
1 4 2 3
RS5
56
8 7 6 5
5 6 7 8
4 3 2 1
RS1007
56
1 2 3 4
RS1031
56
R1193
R1192
R1206
R1235
4 3 2 1
RS7
56
8 7 6 5
1 2 3 4
RS15
56
RS1006
56
1 2 3 4
RS1026
56
8 7 6 5
1 2 3 4
RS18
56
4 3 2 1
RS8
56
+V1.25S
1
1
1
1 2 4 3
RS1013
56
4 3 2 1
R249
56_5%
8 7 6 5
1 2 3 4
RS1027
56
R1158 56_5%
5 6 7 8
4 3 2 1
RS9
56
26-,2126-,21-
R1157 56_5%
1 2 3 4
RS1022
56
M_CKE2_R#
M_CKE3_R#
R1164 56_5%
4 3 2 1
M_DQS_R(7:0)
25-,2125-,21-
R1145 56_5%
27-,26-,25-,28-
27-,26-,21-,28-
R1173
56_5%
M_DATA_R_(63:0)
M_A(12:0)
M_CKE0_R#
M_CKE1_R#
RS1017
56
2
8 6 7 5
5 6 7 8
8 7 5 6
27-,26-,25-,28-
M_A(12:0)
M_DQS_R(7:0)
27-,26-,21-,2826-,25-,21-,28-
close to DIMM1< 800mil
M_CS2_R#
M_CS3_R#
26-,2126-,21-
M_CS0_R#
M_CS1_R#
25-,2125-,21-
M_BS0#
M_BS1#
+V1.25S
1 C221
1 C1158
1 C279
1 C1200
1 C193
1 C180
1 C1188
1 C259
1 C220
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1 C1155
1 C241
1 C240
1 C219
1 C195
1 C192
1 C178
1 C1156
1 C1154
27-,26-,2127-,26-,21-
M_WE#
27-,26-,21-
M_RAS#
27-,26-,21-
M_CAS#
27-,26-,21-
Close to DDR as passible
1 C255
1 C260
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1 C1157
1 C1201
1 C239
1 C223
1 C194
1 C191
1 C258
1 C257
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1 C1159
1 C1199
1 C237
1 C222
1 C196
1 C179
1 C6031
1 C6033
1 C6036
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V 2 100PF_50V 2 100PF_50V 2 100PF_50V
1 C256
1 C251
1 C238
1 C224
2 100PF_50V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1 C6032
1 C6034
2 100PF_50V 2 100PF_50V
1 C6035
1 C6037
2 100PF_50V 2 100PF_50V
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:46 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
DDR-SDRAM-4
VER
A02
Model Number
PC8803
Sheet
28
of
67
USED M9+X R184 , R181 OPEN
USED M10 R184 , R181, R177, R188 PULL UP 10K
U11
1
2
10_5% AGP_WBF#_R
1
1
1
1
2
2
2
2
10_5% AGP_REF#_R
10_5% AGP_ADSTB0_R
10_5%AGP_ADSTB1_R
10_5%AGP_SBSTB_R
AGP_SBA(0)
AGP_SBA(1)
AGP_SBA(2)
AGP_SBA(3)
AGP_SBA(4)
AGP_SBA(5)
AGP_SBA(6)
AGP_SBA(7)
212121-
AGP_SBSTB#
AGP_ADSTB0#
AGP_ADSTB1#
1 C1208
R1188
AD28
AD29
AC28
AC29
AA28
AA29
Y28
Y29
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
R1186 1
R1177 1
R1181 1
2
2
2
10_5%AGP_SBSTB#_R
10_5%AGP_ADSTB0#_R
10_5%AGP_ADSTB1#_R
47_5%
R1198
+V1.5ATIAGP
1
R1200
R1222 1
R1199 1
2 10UF_K_6.3V
+V3S
1
2
2
2
2
20K_5%
20K_5%
20K_5%
AB28 SB_STBS
M29 ADSTBS_0
V26
ADSTBS_1
M26 AGPREF
M27
AGPTEST
AB26 DBI_LO
AB25 DBI_HI
AC25 AGP8X_DET#
DVO / EXT TMDS / GPIO
AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2
2929TP559
1
VGA_GPIO(0)
VGA_GPIO(0)
VGA_GPIO(1)
VGA_GPIO(2)
VGA_GPIO(3)
R181
2
10K_1%
VGA_GPIO(1)
29-
1
R184
2
10K_1%
TP561
TP562
R1287
2
1
1K_1%
VGA_GPIO(2)
TP563
29-
1
R177
2
10K_1%
TP566
1
VGA_GPIO(3)
TP568
R188
2
10K_1%
930-
PWRPLAY
GPIO16
DVOMODE AE10
ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
AJ10
AK10
AJ11
AH11
3636363636-
R186
R183
R182
R189
R187
R185
R194
R1262
R1286
R1285
R1263
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
R1271
R1265
1
1
2
2
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
1K_1%
R1270
R1269
1K_1%
1K_1%
LCM_ID0
LCM_ID1
LCM_ID2
LCM_ID3
LCM_ID4
+V3S
1
1
1
2
2
R1275
10K_5%
10K_5%
10K_5%
2
LCDDATA20
1 OPEN 2
1 OPEN 2
1 OPEN 2
1
R193
R195
R196
R1266
1
1
1
1
2
2
2
2
1K_5%
1K_5%
1K_5%
1K_5%
1
R1268
OPEN
2
2
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
AK16
AH16
AH17
AJ16
AH18
AJ17
AK19
AH19
AK18
AJ18
AG16
AF16
AG17
AF17
AF18
AE18
AH20
AG20
AF19
AG19
R1274
R190
R1273
+V3S
1
R1267
OPEN
R1272
OPEN
1
2
R1277
3K_5%
VREFG AG4
AF29 ST0
AD27
ST1
AE28 ST2
212121-
AGP_ST0
AGP_ST1
AGP_ST2
2
0.1UF_16V
10_5% AGP_STOP#_R
10_5% AGP_DEVSEL#_R
10_5% AGP_TRDY#_R
10_5% AGP_IRDY#_R
10_5% AGP_FRAME#_R
AGP
4X
21-
AGP_SBA(7:0)
2
2
2
2
2
R1189
R1178
R1180
R1187
21212121-
AGP_RBF#
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB
1
1
1
1
1
LVDS
21-
AGP_WBF#
R1179
R1184
R1182
R1183
R1185
AGP2X
1555-,48-,37-,21212121212121212137-
CLK_AGPCONN
PCI_RESET1#_3
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_IRDY#
AGP_FRAME#
PIRQA#_3
C1232 1
N29
C_BE#0
U28 C_BE#1
P26 C_BE#2
U26
C_BE#3
AG30 PCICLK
AG28 RST#
AF28 REQ#
AD26 GNT#
M25 PAR
N26 STOP#
V29
DEVSEL#
V28 TRDY#
W29 IRDY#
W28
FRAME#
AE26 INTA#
AC26
WBF#
AE29 RBF#
M28
AD_STBF_0
V25 AD_STBF_1
AB29 SB_STBF
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
21-
AGP_CBE#(3:0)
AGPREF
AGP_CBE#(0)
AGP_CBE#(1)
AGP_CBE#(2)
AGP_CBE#(3)
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI / AGP
21-
H29
H28
J29
J28
K29
K28
L29
L28
N28
P29
P28
R29
R28
T29
T28
U29
N25
R26
P25
R27
R25
T25
T26
U25
V27
W26
W25
Y26
Y25
AA26
AA25
AA27
8X
AGP_AD(31:0)
AGP_AD(0)
AGP_AD(1)
AGP_AD(2)
AGP_AD(3)
AGP_AD(4)
AGP_AD(5)
AGP_AD(6)
AGP_AD(7)
AGP_AD(8)
AGP_AD(9)
AGP_AD(10)
AGP_AD(11)
AGP_AD(12)
AGP_AD(13)
AGP_AD(14)
AGP_AD(15)
AGP_AD(16)
AGP_AD(17)
AGP_AD(18)
AGP_AD(19)
AGP_AD(20)
AGP_AD(21)
AGP_AD(22)
AGP_AD(23)
AGP_AD(24)
AGP_AD(25)
AGP_AD(26)
AGP_AD(27)
AGP_AD(28)
AGP_AD(29)
AGP_AD(30)
AGP_AD(31)
+V3S
2
363636363636-
TXOUTL0TXOUTL0+
TXOUTL1TXOUTL1+
TXOUTL2TXOUTL2+
3636363636363636-
TXCLKOUTLTXCLKOUTL+
TXOUTU0TXOUTU0+
TXOUTU1TXOUTU1+
TXOUTU2TXOUTU2+
3636-
TXCLKOUTUTXCLKOUTU+
3636-
DIGON
BLON#
TP14
DIGON AE12
BLON AG12
1
R191
3K_5%
2
M9+X R1277, R191OPEN
M10 R1277, R191 USED 3K OHM
ATI_M9_M10_BGA_748P
LAYOUT NOTE : C1255 , C3 CLOSE TO M9+X
USED M9+X R1198 49.9 OHM
USED M10 R1198 47 OHM
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:54:52 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ATI-M10-P-1
VER
A02
Model Number
PC8803
Sheet
29
of
67
LAYOUT NOTES : R1359, R1361, R1360, R1362 CLOSE TO M9+X
U11
TP19
3636-
X1000
4
1 C1240
2 0.1UF_16V
VDD OUT
1 OE
3
GND 2
27MHZ
C1239
PWR_GOOD_3
SUS_STAT#_3
C3_STAT#
AGPBUSY#_3
R211
R210
1
1
1
2
2
0_5%
OPEN
1
AH27
E8
B6
AE25
R1202
120_5%
2
15PF
59-,40-,14-,11-
AK25
SSIN
AJ25 SSOUT
AH28
XTALIN
AJ29 XTALOUT
TP20
1 R1203 2
200_5%
2
R1201
1
R1226 2
330_5%
1
R1225 2
330_5%
R1276 2
330_5%
1
5757575757575757-
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
5757-
DVIDDCCLK
DVIDDCDATA
1
57-
HPD
R6026
2
1
M9+X USED R1203 120 OHM , R1202 100 OHM
M10 USED R1203 200 OHM , R1202 120 OHM
30-
27MHZ
+V3S
AJ13
AH14
AJ14
AH15
AJ15
AK15
AH13
AK13
DDC2CLK AE13
AE14
DDC2DATA
HPD1 AF12
1K_5% 2
59-,42-,40-,383838-
AG26
AH30
AH29
AG29
R1190
1
1K_5% 2
CLK
TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST
SUS_STAT#
STP_AGP#
AGP_BUSY#
RSTB_MSK
DAC1
LCM_DDCCLK
LCM_DDCDATA
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
TMDS
AJ23 C_R
AJ22 Y_G
AK22
COMP_B
AJ24 H2SYNC
AK24
V2SYNC
AG23 DDC3CLK
AG24
DDC3DATA
DAC2
57-,35-
CHROMA_C57-,35LUMA_Y
57COMP_B
R1227 2
330_5%
1
AK21 R2SET
2
R AK27
AJ27
G
B AJ26
AG25
HSYNC
VSYNC AH25
SS
R192
715_1%
575757-
RSET AH26
AF25
DDC1DATA
DDC1CLK AF24
1
R6027
R
G
B
1
1
AF11
DPLUS
DMINUS AE11
2020-
3535-
HSYNC R6028
VSYNC
3535-
DDCDATA
DDCCLK
2
75_1%
R209 2
499_1%
1
THERM
75_1%
75_1%
2
1
AF261 R208 2
AUXWIN
10K_5%
PWR
MAN
1
DPLUS
DMINUS
R1319 2
10K_5%
+V3S
R1318 2
10K_5%
+V3S
ATI_M9_M10_BGA_748P
20K_5%
2
1
+V3S
R1436
+V3S
OPEN
2
1
R64
+V3S
1 L1015 2 C1326 0.1UF_16V
BLM21A121S
1 2
+V1.5ATIAGP
FOR EMI
+V3S C1325
1
1
2 R1290 1
(20/5)
10K_5%
1
10UF_10V_METAL
R164
OPEN
U10
2
0_5% 1 R163 2
+V3S
2
VDD
GND
7 S0
SSCC
6 S1 XIN_CLK
8
XOVT SSCLK
3
5
1
4
R1197
1K_1%
AGPREF
2
(20/5)
1 R1288 2
30-
27MHZ
33_5%
29-
1
GPIO16
R1176
1K_1%
CYS_IMISM560BZT_SOIC_8P
2
OPEN
1
R162
10K_5%
10K_5% 1 R161 2
2
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, August 21, 2003
Time Changed
11:32:01 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ATI-M10-P-2
VER
A02
Model Number
PC8803
Sheet
30
of
67
GMDB(0)
GMDB(1)
GMDB(2)
GMDB(3)
GMDB(4)
GMDB(5)
GMDB(6)
GMDB(7)
GMDB(8)
GMDB(9)
GMDB(10)
GMDB(11)
GMDB(12)
GMDB(13)
GMDB(14)
GMDB(15)
GMDB(16)
GMDB(17)
GMDB(18)
GMDB(19)
GMDB(20)
GMDB(21)
GMDB(22)
GMDB(23)
GMDB(24)
GMDB(25)
GMDB(26)
GMDB(27)
GMDB(28)
GMDB(29)
GMDB(30)
GMDB(31)
GMDB(32)
GMDB(33)
GMDB(34)
GMDB(35)
GMDB(36)
GMDB(37)
GMDB(38)
GMDB(39)
GMDB(40)
GMDB(41)
GMDB(42)
GMDB(43)
GMDB(44)
GMDB(45)
GMDB(46)
GMDB(47)
GMDB(48)
GMDB(49)
GMDB(50)
GMDB(51)
GMDB(52)
GMDB(53)
GMDB(54)
GMDB(55)
GMDB(56)
GMDB(57)
GMDB(58)
GMDB(59)
GMDB(60)
GMDB(61)
GMDB(62)
GMDB(63)
D7
F7
E7
G6
G5
F5
E5
C4
B5
C5
A4
B4
C2
D3
D1
D2
G4
H6
H5
J6
K5
K4
L6
L5
G2
F3
H2
E2
F2
J3
F1
H3
U6
U5
U3
V6
W5
W4
Y6
Y5
U2
V2
V1
V3
W3
Y2
Y3
AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3
31-
3434343434343434-
F6
B3
K6
G1
V5
W1
AC5
AD1
3434343434343434-
R2
GDQMB(0)
GDQMB(1)
GDQMB(2)
GDQMB(3)
GDQMB(4)
GDQMB(5)
GDQMB(6)
GDQMB(7)
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
31-
DDR_RASB#
T5
31-
DDR_CASB#
WEB# T6
31-
DDR_WEB#
RASB#
CASB#
CSB0#
CSB1#
R5
31-
DDR_CSB0#
R6
31-
DDR_CSB1#
CKEB
R3
31-
DDR_CKEB
CLKB0
CLKB0#
N1
N2
3131-
DDR_CLKB0
DDR_CLKB0#
3131-
DDR_CLKB1
DDR_CLKB1#
CLKB1 T2
T3
CLKB1#
DIMB_0 E3
AA3
DIMB_1
ROMCS# AF5
MEMVMODE_0
MEMVMODE_1
C6
C7
MEMTEST
C8
R1258
LAYOUT NOTES:
R237, R238 CLOSE TO U2163
ONLY ELPIDA MEMORY TO INSTALL
R1281
R1284
OPEN
1
2
1
2 4.7K_5%
1
1
2
2
RS3
3131313131313131-
R1257
1
2
OPEN
R1259
47_5%
GMAB(0)
31-
GMAB(6)
31-
GMAB(8)
GMAB(13)
GMAB(12)
DDR_CSB1#
GMAB(7)
DDR_CSB0#
DDR_RASB#
DDR_CASB#
3131313131313131-
R173
R1585
1
1
3434343434343434-
2 10_5%
34-
GMAB_R(0)
34-
GMAB_R(6)
3434343434343434-
GMAB_R(8)
GMAB_R(13)
GMAB_R(12)
DDR_CSB1#_R
GMAB_R(7)
DDR_CSB0#_R
DDR_RASB#_R
DDR_CASB#_R
210_5%
GMAB_R(11)
GMAB_R(10)
GMAB_R(9)
GMAB_R(3)
GMAB_R(4)
GMAB_R(2)
GMAB_R(5)
GMAB_R(1)
near the ATI
3131-
R1283
R174
13
12
15
16
14
11
10
9
1
1
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
J25
F29
E25
A27
F15
C15
C11
E11
J27
F30
F24
B27
E16
B16
B11
F10
Layout Note:
CLOSE TO ATI
RASA# A19
CASA# E18
E19
WEA#
CSA0# E20
USED ELPIDA MEMORY R1253 & R1256 CHANGE TO 732 OHM
CSA1# F20
B19
CKEA
+VRAM_VCC
CLKA0 B21
CLKA0# C20
TP66
TP67
CLKA1 C18
CLKA1# A18
TP68
TP69
1
R1255
1K_1%
2
MVREFD B7
MVREFS B8
1
DIMA_0 D30
DIMA_1 B13
TP70
TP71
R1253
1K_1%
1 C1301
1 C1298
2 0.1UF_16V2 10UF_K_6.3V
2
R1260
4.7K_5%
IF USED ELPIDA MEMORY R134 R135 ADD 4.7K
+VRAM_VCC
LAYOUT NOTES : R176 R175 CLOSE TO ATI
DDR_CLKB1#
31-
DDR_CLKB1
31-
1
R175
34-
DDR_CLKB1#_R
2
34-
DDR_CLKB1_R
10_5%
1
R176
THEN R145 R1370 OPEN
2
10_5%
1
R145
56_5%
2
1
R144
56_5%
1 C125
1
R1254
1K_1%
2
2
Layout Note:
CLOSE TO MEMORY
2 470PF_50V
1
R1256
1K_1%
1 C1299
1 C1300
2 0.1UF_16V2 10UF_K_6.3V
C120 , C125 USED M9+X 0.01UF , M10 470PF
LAYOUT NOTES : R171 R172 CLOSE TO ATI
DDR_WEB#
DDR_CKEB
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
10
RS1033
4
5
2
1
3
6
7
8
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
DQA0
DQA1
DQA2
DQA3
DQA4
DQA5
DQA6
DQA7
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA18
DQA19
DQA20
DQA21
DQA22
DQA23
DQA24
DQA25
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA52
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA61
DQA62
DQA63
2
Layout note:
place these componts
U11
ATI_M9_M10_BGA_748P
1
2
9
10
11
12
13
16
14
15
DIMB_0
DIMB_1
+V1.8S
R1261
10
8
7
6
5
4
1
3
2
3434-
+V1.8S
2
GMAB(11)
GMAB(10)
GMAB(9)
GMAB(3)
GMAB(4)
GMAB(2)
GMAB(5)
GMAB(1)
0_5%
0_5%
TP28
1
ATI_M9_M10_BGA_748P
L25
L26
K25
K26
J26
H25
H26
G26
G30
D29
D28
E28
E29
G29
G28
F28
G25
F26
E26
F25
E24
F23
E23
D22
B29
C29
C25
C27
B28
B25
C26
B26
F17
E17
D16
F16
E15
F14
E14
F13
C17
B18
B17
B15
C13
B14
C14
C16
A13
A12
C12
B12
C10
C9
B9
B10
E13
E12
E10
F12
F11
E9
F9
F8
TP25
DQMB#0 E6
B2
DQMB#1
DQMB#2 J5
DQMB#3 G3
W6
DQMB#4
DQMB#5 W2
DQMB#6 AC6
AD2
DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
GMAB(13:0)
GMAB(0)
GMAB(1)
GMAB(2)
GMAB(3)
GMAB(4)
GMAB(5)
GMAB(6)
GMAB(7)
GMAB(8)
GMAB(9)
GMAB(10)
GMAB(11)
GMAB(12)
GMAB(13)
MAB0 N5
M1
MAB1
MAB2 M3
MAB3 L3
L2
MAB4
MAB5 M2
MAB6 M5
P6
MAB7
MAB8 N3
MAB9 K2
MAB10 K3
MAB11 J2
P5
MAB12
MAB13 P3
MAB14 P2
DQB0
DQB1
DQB2
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB9
DQB10
DQB11
DQB12
DQB13
DQB14
DQB15
DQB16
DQB17
DQB18
DQB19
DQB20
DQB21
DQB22
DQB23
DQB24
DQB25
DQB26
DQB27
DQB28
DQB29
DQB30
DQB31
DQB32
DQB33
DQB34
DQB35
DQB36
DQB37
DQB38
DQB39
DQB40
DQB41
DQB42
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB49
DQB50
DQB51
DQB52
DQB53
DQB54
DQB55
DQB56
DQB57
DQB58
DQB59
DQB60
DQB61
DQB62
DQB63
MEMORY INTERFACE B
33-
MEMORY INTERFACE A
U11
GMDB(63:0)
210_5%
210_5%
3434-
DDR_CLKB0#
31-
DDR_CLKB0
31-
2
1
R172
R171
34-
DDR_CLKB0#_R
34-
DDR_CLKB0_R
10_5%
1
210_5%
1
R143
56_5%
2
1
R142
2
56_5%
1 C120
2 470PF_50V
DDR_WEB#_R
DDR_CKEB_R
PLEASE OPEN ON M9+X
Engineer
INVENTEC
David Du
Layout Note:
CLOSE TO MEMORY
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:55:09 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ATI-M10-P-3
VER
A02
Model Number
PC8803
Sheet
31
of
67
VDD_MEM2.5
1 C1309
2 0.1UF_16V
1 C1230
1 C1308
2 0.1UF_16V
2 0.1UF_16V
C167
1
22UF_6.3V
1 C1256
2 0.1UF_16V
1 C1302
2 0.01UF_16V
2 1000PF_0402
1 C1303
1 C1254
2 0.01UF_16V
2 1000PF_0402
1 C1229
1 C1228
2 0.01UF_16V
2 1000PF_0402
1
+V1.8S
USED M9+X OPEN L18 , USED M10 OPEN L1005
INSTALL L1005 VDD_PNLIO2.5 INSTALL L18
1 L1005 2
+V2.5S
OPEN
1 C1238
1 L1012 2
BLM11A121S
+V1.8S
1 C1236
2 10UF_K_6.3V 2 0.01UF_16V
L18
1
2
BLM21A121S
VDD_PNLIO1.8
1 C1278
1 C1277
2 0.1UF_16V
2 0.01UF_16V
VDD_PNLPLL1.8
1 L1011 2
BLM11A121S
2
1 C1281
2
10UF_K_6.3V
1 C1280
2 0.01UF_16V
3
D6008
1
BAT54C_OPEN
USED M9+X OPEN L1011 , USED M10 OPEN D6008
INSTALL D6008 ,
INSTALL L1011
+VRAM_VCC
1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
1 L1008 2
VDDC
VDDC
VDDC
VDDC
VDDC
AC13
AD13
AD15
AC15
AC17
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
P8
Y8
AC11
AC20
Y23
L23
H20
H11
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
AD7
AD19
AD21
AD22
AC22
AC21
AC19
AC8
VDDR4
VDDR4
VDDR4
VDDR4
VDDR4
AG7
AD9
AC9
AC10
AD10
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
J30
AF27
AE30
AC27
AC23
AB30
AA24
AA23
Y27
W30
V23
V24
M23
M24
N30
P23
P27
T23
T24
T30
U27
AVSSQ
LVSSR
LVSSR
LVSSR
LVSSR
+V1.5S
1 C1259
2 0.01UF_16V
1 C1258
2 10UF_K_6.3V
1 L1013 2
BLM21A121S
1 L1009 2
OPEN
1 C1275
2 0.01UF_16V
L17
1
2
BLM11A121S
1 C1279
2 0.01UF_16V
1 C174
F18 VDDRH0
N6 VDDRH1
AG21 A2VDD
AH21 A2VDD
1 C190
1 C1234
+V1.8S
AF22 A2VDDQ
2 0.01UF_16V
2
10UF_K_6.3V
+V1.8S
AF13 TXVDDR
AF14 TXVDDR
VDD_DAC1.8
L1004
BLM11A121S
1
2
L1007
1
2
BLM11A121S
LVDDR_25
LVDDR_25
LVDDR_18
LVDDR_18
AJ20 LPVDD
AK12 TPVDD
VDD_DAC2.5
2
10UF_K_6.3V
+V1.8S
C1324
1 C1322
2 0.01UF_16V
22UF_6.3V
1 C1310
1 C1276
1 C1311
1 C1321
1 C1271
AH24
AVDD
AE24 VDD1DI
AE22
VDD2DI
AK28 PVDD
VDD_PLL1.8
VDD_MEMPLL1.8
A7 MPVDD
1 C1253
1 C1237
1 C1235
2 10UF_K_6.3V
2 0.01UF_16V
2 10UF_K_6.3V
2 0.01UF_16V
1
2
5
6
D
G
FDC638P
SLP_S3_5R
1 C1323
2 0.01UF_16V 2 0.01UF_16V 2 0.01UF_16V 2 0.01UF_16V 2 0.01UF_16V 2 0.01UF_16V
+V1.5ATIAGP
1 C1267
1 C1233
1 C1231
C1207
1 C1270
C1209
1
2 1000PF_04022 0.01UF_16V 2 0.01UF_16V 2 0.1UF_16V
+V1.5S
L1003
1
22UF_6.3V
2
4
1
1 C1266
1 C1272
1 C1263
22UF_6.3V 2 0.1UF_16V 2 1000PF_04022
AF20
AE19
AE16
AF15
1000PF_0402
C1268
1 C1273
AJ19
LPVSS
TPVSS AJ12
1 C1262
1 C1274
2 0.1UF_16V 2 0.01UF_16V 2
68UF_4V_METAL
TXVSSR AH12
TXVSSR AG13
TXVSSR AG14
VSSRH0 F19
VSSRH1 M6
A2VSSN AH22
A2VSSN AJ21
A2VSSQ
AF23
AVSSN AH23
VSS1DI AE23
AE21
VSS2DI
PVSS AJ28
MPVSS A6
L1010
USED M10 PLEASE OPEN THIS SYMBOL
1
U11
J10
J12
J14
J15
J16
J17
J19
J21
K9
K22
M9
M22
P9
P22
R9
R22
T9
T22
U9
U22
V9
V22
Y9
Y22
AB9
AB22
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
2 NFM41P11C204
4
3
1000PF_0402
1 C1306
1 C1265
2 0.1UF_16V 2 0.01UF_16V
C1260 1 C1307
1
1 C1264
2
1 C1261
1 C1269
22UF_6.3V2 0.1UF_16V 2 0.01UF_16V 2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J9
J11
J13
J18
J20
J22
L9
L22
N9
N22
W9
W22
AA9
AA22
1000PF_0402
A2
A10
A16
A22
A29
C1
C3
C28
C30
D27
D24
D21
D18
D15
D12
D9
D6
D4
F27
G9
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
H9
H8
H4
K30
K27
K24
K23
AG15
AD12
AE27
AG5
AG9
AG11
AG18
AG22
AG27
E4
AB4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDC1 W16
VDDC1 M15
VDDC1 R19
VDDC1 T12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K8
K7
K1
L4
M30
M8
M7
N23
N24
N27
P4
R7
R8
R23
R24
R30
T27
T1
U4
U8
U23
V30
W7
W8
W23
W24
W27
Y4
AA30
AB27
AB24
AB23
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD30
AD25
AD18
AK2
AK29
AJ30
AJ1
D10
D25
INVENTEC
David Du
Drawn by
David Du
ATI_M9_M10_BGA_748P
Thursday, August 14, 2003
Time Changed
8:32:25 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
Date Changed
Size
TITLE
MFG ENGR CHK
Changed by
M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16
ATI_M9_M10_BGA_748P
Engineer
R&D CHK
EE2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ATI_M9_M10_BGA_748P
U11
22UF_6.3V
1000PF_0402
C1304
1
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
NFM41P11C204
3
AD24
ATI_M9_M10_BGA_748P
1 C1251
+V3S
S
3
1
49-,13-
M9 INNER ROWS
1 L16 2
BLM11A121S
AE17
AE20
AE15
AF21
Q6006
4
1
1 C1305
1 C1257
2 0.01UF_16V 2 0.01UF_16V
2
10UF_K_6.3V
+V2.5S
+V1.8S
NOTES: USED+V1.8S FOR M9+X INSTALL L1009 OPEN L1013
NOTES: USED+V1.5S FOR M10 INSTALL L1013 OPEN L1009
+AGP_V3S
BLM11A121S
1 C1255
P17
P18
P19
U12
U13
U14
U17
U18
U19
V19
V18
V17
V14
V13
V12
N18
N17
N14
W17
W18
W12
W13
W14
N13
N19
M19
M18
M12
N12
M13
M14
P12
P13
P14
M17
W19
+VGAVCC
M10 CENTER ARRAY
22UF_6.3V
1 C1252
T7
R1282 2 R4
0_5% R1
N8
N7
M4
L27
L8
J24
J23
J8
J7
J4
J1
H10
H13
H15
H17
T8
V4
V7
V8
AA1
AA4
AA7
AA8
A3
A9
A15
A21
A28
B1
B30
D26
D23
D20
D17
D14
D11
D8
D5
E27
F4
G7
G10
G13
G15
G19
G22
G27
H22
H19
AD4
T4
N4
R1221 D19
2
D13
0_5%
I / O POWER
C168
1
U11
U11
NFM41P11C204
3
4
+V1.8S
USED M9+X PLEASE OPEN THIS SYMBOL
R1282,R1221 USED M9+X IS OPEN , USED M10 CHANGE TO 0 OHM
2
CORE GND
+VRAM_VCC
L11
1
ATI-M10-P-4
VER
A02
Model Number
PC8803
Sheet
32
of
67
LAYOUT NOTES : THIS IS DEPEND RESISTOR NEED CLOSE TO VIDEO RAM
GMDB_R(1)
GMDB_R(0)
GMDB_R(2)
GMDB_R(3)
34343434-
2
4
3
1
GMDB_R(5)
GMDB_R(7)
GMDB_R(4)
GMDB_R(6)
34343434-
3
1
4
2
RS1037
7
5
6
8
31313131-
GMDB(1)
GMDB(0)
GMDB(2)
GMDB(3)
GMDB_R(32)
GMDB_R(33)
GMDB_R(34)
GMDB_R(35)
34343434-
4
2
3
1
6
8
5
7
31313131-
GMDB(5)
GMDB(7)
GMDB(4)
GMDB(6)
GMDB_R(36)
GMDB_R(37)
GMDB_R(38)
GMDB_R(39)
34343434-
4
3
2
1
22
RS1038
1
3
2
4
GMDB_R(12)
GMDB_R(13)
GMDB_R(14)
GMDB_R(15)
34343434-
4
3
2
1
22
RS1034
31313131-
GMDB(10)
GMDB(8)
GMDB(11)
GMDB(9)
GMDB_R(42)
GMDB_R(41)
GMDB_R(40)
GMDB_R(43)
34343434-
1
4
3
2
5
6
7
8
31313131-
GMDB(12)
GMDB(13)
GMDB(14)
GMDB(15)
GMDB_R(46)
GMDB_R(45)
GMDB_R(44)
GMDB_R(47)
34343434-
2
3
4
1
4
3
2
1
GMDB_R(21)
GMDB_R(20)
GMDB_R(23)
GMDB_R(22)
34343434-
4
3
1
2
5
6
7
8
31313131-
GMDB(36)
GMDB(37)
GMDB(38)
GMDB(39)
8
5
6
7
31313131-
GMDB(42)
GMDB(41)
GMDB(40)
GMDB(43)
22
RS1040
7
6
5
8
31313131-
GMDB(46)
GMDB(45)
GMDB(44)
GMDB(47)
6
8
7
5
31313131-
GMDB(49)
GMDB(51)
GMDB(50)
GMDB(48)
5
7
6
8
31313131-
GMDB(53)
GMDB(54)
GMDB(52)
GMDB(55)
8
7
6
5
31313131-
GMDB(63)
GMDB(62)
GMDB(61)
GMDB(60)
8
6
7
5
31313131-
GMDB(59)
GMDB(57)
GMDB(58)
GMDB(56)
22
RS1046
RS1039
34343434-
GMDB(32)
GMDB(33)
GMDB(34)
GMDB(35)
RS1041
8
6
7
5
22
GMDB_R(16)
GMDB_R(17)
GMDB_R(18)
GMDB_R(19)
31313131-
22
RS1047
34343434-
5
7
6
8
22
RS1045
22
GMDB_R(10)
GMDB_R(8)
GMDB_R(11)
GMDB_R(9)
RS1044
5
6
7
8
31313131-
GMDB(16)
GMDB(17)
GMDB(18)
GMDB(19)
GMDB_R(49)
GMDB_R(51)
GMDB_R(50)
GMDB_R(48)
34343434-
3
1
2
4
5
6
8
7
31313131-
GMDB(21)
GMDB(20)
GMDB(23)
GMDB(22)
GMDB_R(53)
GMDB_R(54)
GMDB_R(52)
GMDB_R(55)
34343434-
4
2
3
1
22
RS1048
22
RS1049
22
22
RS1043
GMDB_R(24)
GMDB_R(25)
GMDB_R(26)
GMDB_R(27)
34343434-
4
3
2
1
GMDB_R(28)
GMDB_R(29)
GMDB_R(30)
GMDB_R(31)
34343434-
4
2
3
1
RS1035
5
6
7
8
31313131-
5
7
6
8
31313131-
GMDB(24)
GMDB(25)
GMDB(26)
GMDB(27)
22
RS1036
GMDB(28)
GMDB(29)
GMDB(30)
GMDB(31)
GMDB_R(63)
GMDB_R(62)
GMDB_R(61)
GMDB_R(60)
34343434-
1
2
3
4
GMDB_R(59)
GMDB_R(57)
GMDB_R(58)
GMDB_R(56)
34343434-
1
3
2
4
22
RS1042
22
22
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:55:23 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
VGA DEPEND RESISTOR
VER
A02
Model Number
PC8803
Sheet
33 of 67
2
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
M13 MCL
+VRAM_VCC
DIMB_0
PLACE CLOSE
TO THE MOMORY
31-
1
R1320
1K_1%
1 C1343
2
10UF_K_6.3V
DDR4/8
R1321
1K_1%
DDR_CSB1#_R
31-,34-
1 C1342
N13 VREF
2 0.1UF_16V
M10 RFU
2
L9 RFU
DDR_CLKB0#_R
DDR_CSB0#_R
31-,34-
N2 CS#
DDR_RASB#_R
31-,34-
M2 RAS#
DDR_CASB#_R
31-,34-
L2 CAS#
DDR_WEB#_R
31-,34-
L3 WE#
GDQMB_R(3)
34-
B12 DM3
GDQMB_R(2)
34-
H3 DM2
GDQMB_R(1)
34-
H12 DM1
GDQMB_R(0)
34-
B3 DM0
DDR_CLKB0_R
31-
M11 CLK
31-,34-
N12 CKE
QSB3_R
34-
B13 DQS3
QSB2_R
34-
H2 DQS2
QSB1_R
34-
H13 DQS1
QSB0_R
34-
B2 DQS0
DDR_CKEB_R
R1295 22_5%
R1299 22_5%
R1293 22_5%
M12 CLK#
31-
R1296 22_5%
GDQMB(3)
31-
1
2
34-
GDQMB_R(3)
GDQMB(2)
31-
1
2
34-
GDQMB_R(2)
GDQMB(1)
31-
1
2
34-
GDQMB_R(1)
GDQMB(0)
31-
1
2
34-
GDQMB_R(0)
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
R1294 22_5%
R1298 22_5%
R1292 22_5%
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
D7
D8
E4
E11
L4
L7
L8
L11
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
R1297 22_5%
SAM_K4D263238A_GC40_FBGA_144P
QSB3
31-
1
2
QSB2
31-
1
2
QSB1
31-
1
2
QSB0
31-
1
2
34-
QSB3_R
GMDB_R(31)
GMDB_R(30)
GMDB_R(29)
GMDB_R(28)
GMDB_R(27)
GMDB_R(26)
GMDB_R(25)
GMDB_R(24)
GMDB_R(23)
GMDB_R(22)
GMDB_R(21)
GMDB_R(20)
GMDB_R(19)
GMDB_R(18)
GMDB_R(17)
GMDB_R(16)
GMDB_R(15)
GMDB_R(14)
GMDB_R(13)
GMDB_R(12)
GMDB_R(11)
GMDB_R(10)
GMDB_R(9)
GMDB_R(8)
GMDB_R(7)
GMDB_R(6)
GMDB_R(5)
GMDB_R(4)
GMDB_R(3)
GMDB_R(2)
GMDB_R(1)
GMDB_R(0)
GMAB_R(12)
GMAB_R(13)
GMAB_R(11)
GMAB_R(10)
GMAB_R(9)
GMAB_R(8)
GMAB_R(7)
GMAB_R(6)
GMAB_R(5)
GMAB_R(4)
GMAB_R(3)
GMAB_R(2)
GMAB_R(1)
GMAB_R(0)
+VRAM_VCC
DIMB_1
DDR_CSB1#_R
31-,34-
R1323
1K_1%
2
1 C1347
1
C124
1
C122
1 2
C143 0.1UF_16V
A11
A10
A9
A8_AP
A7
A6
A5
A4
A3
A2
A1
A0
C4
C11
H4
H11
L12
L13
M3
M4
N3
NC
NC
NC
NC
NC
NC
NC
NC
NC
N13 VREF
2 0.1UF_16V
M10 RFU
2
0.1UF_16V C1349
1
2
0.1UF_16V
2
0.1UF_16V
47UF_6.3V_METAL
2
0.1UF_16V
2
0.1UF_16V
PLACE IN
2
MOMORY SECTION
0.1UF_16V
2
0.1UF_16V
2
R1303 22_5%
0.1UF_16V
C1344
2
R1306 22_5%
1
0.1UF_16V
2
R1300 22_5%
2
R1304 22_5%
0.1UF_16V
M7
L6
M8
N11
N10
N9
M9
N8
N7
M6
N6
N5
M13 MCL
1
1 C1346
L9 RFU
M12 CLK#
31-
DDR_CSB0#_R
31-,34-
N2 CS#
DDR_RASB#_R
31-,34-
M2 RAS#
DDR_CASB#_R
31-,34-
L2 CAS#
DDR_WEB#_R
31-,34-
L3 WE#
B12 DM3
GDQMB_R(7)
34-
GDQMB_R(6)
34-
H3 DM2
GDQMB_R(5)
34-
H12 DM1
GDQMB_R(4)
34-
B3 DM0
M11 CLK
31-
DDR_CLKB1_R
31-,34-
N12 CKE
QSB7_R
34-
B13 DQS3
QSB6_R
34-
H2 DQS2
QSB5_R
34-
H13 DQS1
QSB4_R
34-
B2 DQS0
DDR_CKEB_R
GDQMB(7)
31-
1
2
34-
GDQMB_R(7)
GDQMB(6)
31-
1
2
34-
GDQMB_R(6)
GDQMB(5)
31-
1
2
34-
GDQMB_R(5)
GDQMB(4)
31-
1
2
34-
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9
GDQMB_R(4)
22UF_6.3V
1 2
C123 0.1UF_16V
1 2
R1302 22_5%
QSB7
31-
1
2
34-
QSB7_R
R1307 22_5%
QSB6
31-
1
2
34-
QSB6_R
R1301 22_5%
QSB5
31-
1
2
34-
QSB5_R
R1305 22_5%
QSB4
31-
1
2
34-
QSB4_R
34-
QSB2_R
R1322
1K_1%
2
+VRAM_VCC
+V2.5S
DDR4/8
31-
1
PLACE CLOSE
TO THE MOMORY
10UF_K_6.3V
DDR_CLKB1#_R
C146
1
C142
1
C144
1
C140
1
C139
1
C121
1
C141
1
C145
U1019
N4 BA0
M5 BA1
31-,34-
GMDB_R(31:0)
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
TH_GND
33-
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
B8
C9
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
K12
K13
E2
D2
D3
C2
B5
B6
C6
B7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
D7
D8
E4
E11
L4
L7
L8
L11
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
GMDB_R(63)
GMDB_R(62)
GMDB_R(61)
GMDB_R(60)
GMDB_R(59)
GMDB_R(58)
GMDB_R(57)
GMDB_R(56)
GMDB_R(55)
GMDB_R(54)
GMDB_R(53)
GMDB_R(52)
GMDB_R(51)
GMDB_R(50)
GMDB_R(49)
GMDB_R(48)
GMDB_R(47)
GMDB_R(46)
GMDB_R(45)
GMDB_R(44)
GMDB_R(43)
GMDB_R(42)
GMDB_R(41)
GMDB_R(40)
GMDB_R(39)
GMDB_R(38)
GMDB_R(37)
GMDB_R(36)
GMDB_R(35)
GMDB_R(34)
GMDB_R(33)
GMDB_R(32)
+V1.8S
+V2.5S
+V1.8S FOR ELPIDA MEMORY
C151
1
C131
1
C152
1
C147
1
C148
1
C127
1
C128
1
C149
0.1UF_16V
2
0.1UF_16V
2
1 C1348
0.1UF_16V
2 22UF_6.3V
2
0.1UF_16V
2
0.1UF_16V
PLACE IN
2
MOMORY SECTION
0.1UF_16V
2
0.1UF_16V
2
0.1UF_16V
+V2.5S
1 2
C129 0.1UF_16V
1 2
C126 0.1UF_16V
1 C1345
2 22UF_6.3V
1 2
C130 0.1UF_16V
1 2
C150 0.1UF_16V
1 2
Engineer
INVENTEC
David Du
QSB1_R
Drawn by
34-
David Du
QSB0_R
R&D CHK
Thursday, July 31, 2003
Time Changed
10:55:28 am
QA CHK
A3
DIAMOND
MFG ENGR CHK
Date Changed
Size
TITLE
DOC CTRL CHK
Changed by
+VRAM_VCC
SAM_K4D263238A_GC40_FBGA_144P
34-
EE2
GMDB_R(63:32)
POWERPAD_2
A11
A10
A9
A8_AP
A7
A6
A5
A4
A3
A2
A1
A0
B8
C9
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
K12
K13
E2
D2
D3
C2
B5
B6
C6
B7
PAD1002
M7
L6
M8
N11
N10
N9
M9
N8
N7
M6
N6
N5
GMAB_R(11)
GMAB_R(10)
GMAB_R(9)
GMAB_R(8)
GMAB_R(7)
GMAB_R(6)
GMAB_R(5)
GMAB_R(4)
GMAB_R(3)
GMAB_R(2)
GMAB_R(1)
GMAB_R(0)
GMAB_R(13:0)
33-
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
POWERPAD_2
GMAB_R(12)
GMAB_R(13)
PAD1001
U1018
N4 BA0
M5 BA1
31-,34-
GMAB_R(13:0)
VIDEO RAM-2
VER
A02
Model Number
PC8803
Sheet
34
of
67
R_CRT
57-
1
R6037 2
0
USBVCC1
1 C6020
2 OPEN
1
1 C114
2 0.1UF_16V2
G_CRT
57-
1
R6038 2
C115
10UF_10V
0
1 C6022
2 OPEN
DOCK_HSYNC
HSYNC
R6039 2
0
1
R151
10K_5%
1 C6021
2 OPEN
DOCK_VSYNC
57-
2
1
R140
R139
2.2K_5% 2.2K_5%
2
2
+V3
+V3S
VSYNC
U1017
301
R152
10K_5%
2
DDCDATA
DDCCLK
3030-
3
8
4
9
5
10
19
21
16
17
7
6
126_VCC
2
12
1
11
23
SYNC_OUT1 20
SYNC_IN1
SD2 24
SYNC_IN2 SYNC_OUT2 22
DDC_OUT1 15
DDC_IN1
DDC_IN2
DDC_OUT2 18
VCC3 14
AGND
VBIAS 13
DGND
1 C1341
1 C119
CMD_VGA200_QSOP_24P
2
2 0.1UF_16V
0.1UF_16V
VIDEO1
TERM1
VIDEO2
TERM2
VIDEO3
TERM3
VCC1
VCC2
VCC4
PWRUP
SD1
USBVCC1
D2
1
1N4148
2
(10/5)
LUMA_Y
SYN_7519S_15G2
5757-
CN6
GND
GND
Y
C
DOCK_DDCDATA
DOCK_DDCCLK
G 5
G 6
SIN_2MJ_1572_005
(10/5)
1 L10 2
LS_1MH_1.8U
57-,30-
CN5
1
2
3
4
5
6
7
8
9
10
11
12 G 16
13 G 17
14
15
1 C113
2 0.1UF_16V
1
2
3
4
+V3
SVIDEO CN
1
R155
75_1%
1 C153
2 82PF
2 82PF
2
2
1 C154
(10/5)
57-,30-
(10/5)
1 L12 2
LS_1MH_1.8U
+V3
1
1
R167
75_1%
1 C157
1 C156
2 82PF
2 82PF
2
BAV99 D1022
CHROMA_C
BAV99 D1023
1
2
1
3
57-
126_VCC
1
3
B_CRT
57-
30-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Friday, August 1, 2003
Time Changed
1:31:54 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
CRT& SVEDIO CONN
VER
A02
Model Number
PC8803
Sheet
35
of
67
+V3S
+V3S
1
R1400
47K_5%
2
1
R1401
100_5%
DIGON
29-
Q1049
5
S1
1
G1
6
D1
D2 4
3 G2
2
S2
NDC7002N
+V3S
(20/5)
2
G
1
7
6
3
S
D
2
5
1
8
FDR840P Q1050
4
1 C1399
2 0.01UF_16V
C1416
2 10UF_K_6.3V
1 C1400
2 0.1UF_16V
Place as passible as close to connector
LCM_ID0
LCM_ID1
LCM_ID2
LCM_ID3
1
R1402
100_5%
(20/5)
TXOUTL0TXOUTL0+
TXOUTL1TXOUTL1+
TXOUTL2TXOUTL2+
TXCLKOUTLTXCLKOUTL+
2929292929292929-
TXOUTU0TXOUTU0+
TXOUTU1TXOUTU1+
TXOUTU2TXOUTU2+
TXCLKOUTUTXCLKOUTU+
2929292929292929-
LCM_DDCCLK
3030-
+V5
1
R1396
OPEN
BLON#
29-
1
0_5%
Q1051 3
D
2G
S
2N7002_OPEN 1
1
OPEN
R1417 2
OPEN
1
R1414
0_5%
1
1
R1416 R14152 C1417 0.1UF_16V
4.7K_5%4.7K_5%
1 2
2
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
C1396
100UF_10V
INV_PWM_3
2
R1403 2
29-
1
2
3
4
1 L1028 2 BLM41P800S
1
1
8
7
6
5
(20/5)
LCM_DDCDATA
+V3S
LCM_ID4
2
RS1055
29292929-
R1395 2
100_5%
1 C1397
1 C1395
2 0.1UF_16V
2 1000PF_04022 0.1UF_16V
1 C1401
CN2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37 G 41
38 G 42
39
40
IPEX_20265_040E
USED M9+X OPEN R1403 , USED M10 OPEN R1396 , Q1051
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:55:39 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
LCD CONN
VER
A02
Model Number
PC8803
Sheet
36
of
67
+V3S
+V3S
+V3A
PIRQF#_3
1 R113 2
59-,51-,42-,40-,37-
1
R53
2 51-,37-
55-,37-
1
CBREQ2#_3
PIRQG#_3
8.2K_5%
8.2K_5%
8.2K_5%
1 R81 2
NICREQ1#_3
REQ4#_3
R54
+V5S
8.2K_5%
R56 2
R59
POWER15/5
2
1
37-
8.2K_5%
1 R72 2
1
PCI_CBE#(3:0)
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
J2
K4
M4
N4
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
54-,51-,55PCI_CBE#(0)
PCI_CBE#(1)
PCI_CBE#(2)
PCI_CBE#(3)
MPCIGNT0#_3
NICGNT1#_3
CBGNT2#_3
GNT3#_3
GNT4#_3
MPCIREQ0#_3
NICREQ1#_3
CBREQ2#_3
REQ3#_3
REQ4#_3
CLK_ICHPCI_3R
PCI_DEVSEL#_3
PCI_FRAME#_3
RUNSCI0#_3
THERM_SCI#
DMA_GNTA#_3
DMA_GNTB#_3
PCI_IRDY#_3
PCI_PAR_3
PCI_PME#_3
PCI_PERR#_3
55-,54-,51-,37- PCI_LOCK#_3
54-,3755-,3751-,373737-
C1
E6
A7
B7
D6
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
54-,3755-,3751-,373737-
B1
A2
B3
C7
B6
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
1555-,54-,51-,3755-,54-,51-,3740-,3720-,37-
P5
M3
F1
B5
A6
E8
C5
L5
G1
L4
M2
W2
U5
K5
F3
F2
CLK4/16
3737-
55-,54-,51-,3755-,54-,5155-,54-,51-,3737-
PCI_SERR#_3
PCI_STOP#_3
PCI_TRDY#_3
55-,54-,51-,40-,3755-,54-,51-,3755-,54-,51-,37-
SM_INTRUDER# W6
AC3
AB1
AC4
AB4
AA5
SMB_ALERT#/GPIO11
CPU_A20GATE Y22
CPU_A20M# AB23
CPU_DPSLP# U23
CPU_FERR# AA21
CPU_IGNNE# W21
CPU_INIT# V22
CPU I/F CPU_INTR AB22
CPU_NMI V21
CPU_PWRGOOD Y23
CPU_RCIN# U22
CPU_SLP# U21
CPU_SMI# W23
CPU_STPCLK# V23
SMLINK0
System
Management SMLINK1
SMB_CLK
I/F
SMB_DATA
PCI
I/F
HUBLINK
I/F
5-,37-
HUB_PSTRB#
HUB_PSTRB
HUB_RCOMP
HUB_VREF
HUB_VSWING
INT_APICCLK
INT_APICD0
INT_APICD1
INT_PIRQA#
Interrupt INT_PIRQB#
INT_PIRQC#
I/F
INT_PIRQD#
INT_PIRQE#/GPIO2
INT_PIRQF#/GPIO3
INT_PIRQG#/GPIO4
INT_PIRQH#/GPIO5
INT_IRQ14
INT_IRQ15
INT_SERIRQ
EEPROM
I/F
GTL4/8
LAN
I/F
+V3S
GTL4/8
GTL4/8
HUB_PD(0)
HUB_PD(1)
HUB_PD(2)
HUB_PD(3)
HUB_PD(4)
HUB_PD(5)
HUB_PD(6)
HUB_PD(7)
HUB_PD(8)
HUB_PD(9)
HUB_PD(10)
1
R111
2
GTL4/8
2
16-
56_5%
GTL4/8
59-,16-
+V3S
U1039
3
1
5
4
59-,54-,51-,42-,40PCI_RESET2#_3
FAIR_NC7WZ17_SC70_6P
2
R74
2
8.2K_5%
1 R60 2
8.2K_5%
8.2K_5%
29-,37-
PIRQA#_3
PCI_FRAME#_3
+V3S
1
ICH_SMDAT_3
26-,25-,20-,15-
ICH_SMCLK_3
26-,25-,20-,15-,37- 1
R37
2
2.2K_1%
R63 2
2.2K_1%
R71 2
1
40-,37-
10K_5%
+V_RTC
POWER15/5
HUB4/8
INTRUDER#_3
HUB4/8
37-
+V1.8S
HUB4/8
HUB4/8
1
R41
2
100K_5%
HUB4/8
1
15-
CLK_ICHHUB
2121-
HUB_PSTRB#
HUB_PSTRB
R1386
36.5_1%
2
+VS_HUBREF
POWER15/5
R1390
150_1%
2
HUB_VREF_ICH
1
LAYOUT NOTES : R1749 , C179 , C158 , R222
CLOSE TO ICH4
2
+V3S
1 0_5%
1 10K_5%
1 10K_5%
C1390
POWER15/5
1 C1389
1
2
2
0.01UF_16V
R1389
150_1%
0.01UF_16V
2
PIRQA#_3
PIRQB#_3
PIRQC#_3
PIRQD#_3
+V1.8S
1
R86
10K_5%
1
55-
1
PIRQE#_3
R1387
150_1%
PIRQF#_3
PIRQG#_3
PIRQH#_3
IRQ14_3
IRQ15_3
SERIRQ_3
+VS_HUBVSWING
2
POWER15/5
1 C1387
+V3A
2 0.01UF_16V
1
R1388
150_1%
POWER15/5
2
+V3S
PCI_PME#_3
55-,54-,51-,37-
1
R1356 2
10K_5%
R40
1K_1%
+V3S
55-,54-,51-,37-
1
R48
2
1
R6955-,54-,51-,40-,372
PIRQB#_3
PCI_IRDY#_3
55-,54-,51-,37-
PIRQC#_3
PCI_TRDY#_3
55-,54-,51-,37-
1
55-,54-,51-,37-
8.2K_5%
1 R49 2
8.2K_5%
1 R1439 2
8.2K_5%
8.2K_5%
8.2K_5%
8.2K_5%
R50
8.2K_5%
1 R47 255-,54-,51-,37-
2
1
R67
255-,54-,51-,37-
2
1
1
R91
1
54-,37- 1
NICGNT1#_3
55-,37- 1
CBGNT2#_3
51-,37- 1
PCI_SERR#_3
37-
R52
8.2K_5%
R70 2
MPCIGNT0#_3
2
37-
PCI_STOP#_3
H_FERR_S#
H_INIT#
HUB4/8
51-,37-
PIRQD#_3
ICH_SMDAT_3
HUB4/8
8.2K_5%
1 R68 2
51-,37-
26-,25-,20-,15-
RUNSCI0#_3
GNT4#_3
2
POWER15/5
10K_5%
HUB4/8
HUBST5/10/15-4/8/12
J19
R83 2
H19
R84 2
K20
R98 2
D5
29-,37C2
37B4
51-,37A3
51-,37C8
D7
54-,37C3
51-,37C4
37AC13
48-,37AA19
49-,37J22
59-,51-,42-,40-,37-
1 C26
2 0.1UF_16V
ICH_SMCLK_3
HUB_PD(10:0)
2 FAIR_NC7WZ17_SC70_6P
R76
STBY_SWIN#_3
2.2K_1%
R39 2
HUB4/8
1
8.2K_5%
1 R51 2
1
POWER15/5
PCI_RESET1#_3
1
5-,37-
2.2K_1%
R1431 2
R1119
56_5%
1
21-
HUB4/8
HUBST5/10/15-4/8/12
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_JCLK
LAN_RSTSYNC
LAN_RST#
1
HUB4/8
CLK4/16
A10
A9
A11
B10
C10
A12
C11
B11
Y5
1
126-,25-,20-,15-,37-
H_INTR
H_NMI
H_PWRGD
KBCPURST#_3
H_CPUSLP#
H_SMI#
H_STPCLK#
GTL4/8
N20
P21
R23
M23
R22
D10
D11
A8
C12
1
37-
+VCCP
H_IGNNE#
GTL4/8
3
Q1055
2N7002
GTL4/8
16161740171616-,5-
L19
L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21
T21
EER_CS
EER_DIN
EER_DOUT
EER_SHCLK
3
A20GATE_3
H_A20M#
H_DPSLP#
GTL4/8
16-
R1428 2
STBY_SWIN#_3
401621-,17-
ITL_ICH4_M_BGA_421P
55-,48-,29-,21-
6
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PD11
HUB_CLK
37-
ALERT_DAT_3
R1429 2
33_5%
INTRUDER#_3
ALERT_CLK_3
ALERT_DAT_3
GTL4/8
PCI_CLK
PCI_DEVSEL#
PCI_FRAME#
PCI_GPIO0/REQA#
PCI_GPIO1/REQB#/REQ5#
PCI_GPIO16/GNTA#
PCI_GPIO17/GNTB#/GNT5#
PCI_IRDY#
PCI_PAR
PCI_PERR#
PCI_LOCK#
PCI_PME#
PCI_RST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
U1039
5
373737-
GTL4/8
+V3S
1
2
G
1
H5
J3
H3
K1
G5
J4
H4
J5
K2
G2
L1
G4
L2
H2
L3
F5
F4
N1
E5
N2
E3
N3
E4
M5
E2
P1
E1
P2
D3
R1
D2
P4
R1421 2
33_5%
U1037
Q1053
2 2N7002
2
2
8.2K_5%
8.2K_5%
PCI_AD(0)
PCI_AD(1)
PCI_AD(2)
PCI_AD(3)
PCI_AD(4)
PCI_AD(5)
PCI_AD(6)
PCI_AD(7)
PCI_AD(8)
PCI_AD(9)
PCI_AD(10)
PCI_AD(11)
PCI_AD(12)
PCI_AD(13)
PCI_AD(14)
PCI_AD(15)
PCI_AD(16)
PCI_AD(17)
PCI_AD(18)
PCI_AD(19)
PCI_AD(20)
PCI_AD(21)
PCI_AD(22)
PCI_AD(23)
PCI_AD(24)
PCI_AD(25)
PCI_AD(26)
PCI_AD(27)
PCI_AD(28)
PCI_AD(29)
PCI_AD(30)
PCI_AD(31)
1
R1418 R1427
10K_5% 10K_5%
55-,51-,54-
PCI_AD(31:0)
ALERT_CLK_3
POWER15/5
1
51-,37-
8.2K_5%
8.2K_5%
+V3A
2
G
54-,37-
1
S
8.2K_5%
R94 2
54-,37-
D
1
MPCIREQ0#_3
S
37-
48-,37-
IRQ15_3
1
REQ3#_3
IRQ14_3
49-,37-
8.2K_5%
R92 2
1
SERIRQ_3
R1397 2
1
37-
D
R73
2
PIRQH#_3
R77
2 20-,37-
8.2K_5%
R85 2
37-
R75
THERM_SCI#
DMA_GNTA#_3
2
37-
DMA_GNTB#_3
8.2K_5%
1 R90 2
8.2K_5%
1 R93 2
37-
GNT3#_3
8.2K_5%
8.2K_5%
8.2K_5%
8.2K_5%
2
PCI_DEVSEL#_3
Engineer
INVENTEC
David Du
PCI_PERR#_3
Drawn by
David Du
37-
R&D CHK
PCI_LOCK#_3
Date Changed
Thursday, July 31, 2003
Time Changed
10:55:45 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
MFG ENGR CHK
Changed by
EE2
Size
TITLE
ICH4-1
VER
A02
Model Number
PC8803
Sheet
37
of
67
+V3S
+V3S
+V3A
+V3S
+V3A
1
2
PM_PWROK
40-
1
2
R2
Y3
AB2
T3
1 R1430 2
AC2
33_5%
V20
AA1
1 R1420 2
AB6
0_5%
Y1
40-,14AA6
VCC1_POR#_3
15W18
SLP_S1#_3R
59-,47-,45-,40-,13-,12-,9-,7Y4
R6020 SLP_S3#_3R
2 OPEN
R1433 1
Y2
10K_5%
1
2 0_5% AA2
13SLP_S5#_3R
W19
15-,11- R1432
CPUSTOP#_3
Y21
15PCISTOP#_3
TP550 AA4
59-,42-,40-,30AB3
SUS_STAT#_3
20V1
TEMP_WARN#_3
3019-,16403059-,55-,54-,51-,42-,401159-,57-,40-
AGPBUSY#_3
ITP_DBRESET#
LOW_BAT#_3
C3_STAT#
CLKRUN#_3
PM_DPRSLPVR
PWR_SWIN#_3
+V3S
1
BITCLK_3_ICH
CODEC_RST#_ICH
SDATA_IN0_ICH
SDATA_IN1_ICH
4559-,454559-
SDATA_OUT_ICH
FRAME_SYNC_ICH
59-,4559-,45-
R44
OPEN
4259-
+V5A
R87
10K_5%
1
+V5A
5050575758-
USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN0
USB_PN1
USB_PN2
USB_PN3
USB_PN4
USB_PN5
1
R88
2
2
T2
R4
T4
U2
U3
U4
T5
59-,42-,40-
LPC_FRAME#_3
+V5A
B8
C13
D13
A13
B13
D9
C9
59-,42-,4059-,42-,4059-,42-,4059-,42-,40-
LPC_AD(0)
LPC_AD(1)
LPC_AD(2)
LPC_AD(3)
2
J21
Y20
V19
11-
SB_VGATE
LPC_DRQ0#
LPC_DRQ1#
U1037
5050575758-
USB_OC#0
USB_OC#1
10K_5%
R89
210K_5%
1
+V3S
R1398
2
1
22.6_1%
R82
1
2 OPEN
R1391 1
2 OPEN
VMEM_CFG0
VMEM_CFG1
VMEM_CFG2
+V3S
VMEM_CFG3
PP_FDD_SMI
2
OPEN
2
OPEN
OPEN
R114
R119
1
2
1
2
2
1
1 R1393 2
2
R115
R118
R1392
2
GPIO[34:36,42] VMEM_CFG(3:0)-Memory type
5959-
SER_SHD#_3
SHUTDOWN
47-
42-
R116
R117
OPEN
FWH_WP#_3
FWH_TBL#_3
PM_AGPBUSY#/GPIO6
PM_SYSRST#
PM_BATLOW#
PM_C3_STAT#/GPIO21
PM_CLKRUN#/GPIO24
PM_DPRSLPVR
PM_PWRBTN#
PM_PWROK
Power
PM_RI#
Management
PM_RSMRST#
PM_SLP_S1#/GPIO19
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PM_STPCPU#/GPIO20
PM_STPPCI#/GPIO18
PM_SUS_CLK
PM_SUS_STAT#_LPCPD#
PM_THRM#
PM_GMUXSEL/GPIO23
PM_CPUPERF#/GPIO22
PM_VGATE/VRMPWRGD
AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAIN2
AC_SDATAOUT
AC_SYNC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ0#
LPC_DRQ1#
LPC_FRAME#
C20
A21
C18
A19
C16
A17
D20
B21
D18
B19
D16
B17
USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN0#
USB_PN1#
USB_PN2#
USB_PN3#
USB_PN4#
USB_PN5#
B15
C14
A15
B14
A14
D14
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
A23
B23
USB_RBIAS
USB_RBIAS#
J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
8.2K_5%
5
2
8.2K_5%
3
1
U1031
4
00h
Samsung 64MB
08
08h
Infineon 32MB
01h
Samsung 128MB
09
09h
TBD
02
02h
Hynix 64MB
10
Ah
TBD
03
03h
Hynix 128MB
11
Bh
TBD
Infineon 64MB
Misc
D1
1
WAKEUP0#_3
MBAY_ATTACHED#
LID_SW#_3
MBAY_DISABLE
3
57-,56-,43-
PREP
BAT54
IDE_PDCS1#
IDE_PDCS3#
IDE_SDCS1#
IDE_SDCS3#
Y13
AB14
AB21
AC22
48484949-
PDCS1#_3
PDCS3#_3
SDCS1#_3
SDCS3#_3
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2
AA13
AB13
W13
AA20
AC20
AC21
484848494949-
PDA(0)
PDA(1)
PDA(2)
SDA(0)
SDA(1)
SDA(2)
IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15
IDE_PDDACK#
IDE_SDDACK#
IDE_PDDREQ
IDE_SDDREQ
IDE_PDIOR#
IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#
IDE_PIORDY
IDE_SIORDY
Clocks
40495957-
CLK_14
CLK_48
RTCRST#
CLK_RTCX1
CLK_RTCX2
CLK_VBIAS
AB11
AC11
Y10
AA10
AA7
AB8
Y8
AA8
AB9
Y9
AC9
W9
AB10
W10
W11
Y11
W17
AB17
W16
AC16
W15
AB15
W14
AA14
Y14
AC15
AA15
Y15
AB16
Y16
AA17
Y17
48494849484948494849-
Y12
AB19
AA11
AB18
AC12
Y18
W12
AA18
AB12
AC19
J23
F19
W7
AC7
AC6
Y6
1515-
PDDACK#_35
SDDACK#_35
PDDRQ_35
SDDRQ_35
PDIOR#_3
SDIOR#_3
PDIOW#_3
SDIOW#_3
PDIORDY_35
SDIORDY_35
1
2
1
4
3
R1422
10M_5%
1
R1139
56_5%
R112
56_5%
2
2
C1403
1
1
1
2
C45
0.1UF_16V
D1026
BAT54C
2
R66
OPEN
1UF_10V
2
RTCBAT
2
NPCI_RESET
1
2
X1004
C1418
1
15PF_50V
32.768KHZ
1
SDD(15:0)
R65
180K_1%
C1419
1
49-
+V3L
CLK_ICH14_3R
CLK_ICH48_3R
SPKR H23
THRMTRIP# W20
PDD(15:0)
+V_RTC
+VCCP
42-
48-
PDD(0)
PDD(1)
PDD(2)
PDD(3)
PDD(4)
PDD(5)
PDD(6)
PDD(7)
PDD(8)
PDD(9)
PDD(10)
PDD(11)
PDD(12)
PDD(13)
PDD(14)
PDD(15)
SDD(0)
SDD(1)
SDD(2)
SDD(3)
SDD(4)
SDD(5)
SDD(6)
SDD(7)
SDD(8)
SDD(9)
SDD(10)
SDD(11)
SDD(12)
SDD(13)
SDD(14)
SDD(15)
R1405
15PF_50V
2
2 1K_5%
C1405
1
0.047UF_10V 2
1
1
2
R1406
C1404
0.1UF_16V
2 10M_5% 1
45-
PCSPKR_ICH_3
16-
PM_THRMTRIP#
GPIO[34:36,42] VMEM_CFG(3:0)-Memory type
01
04h
USB
I/F
R3
V4
V5
W3
V2
W1
W4
TC7S04F
00
04
IDE
I/F
LPC
I/F
GPIO
1
8.2K_5%
Unmuxed
GPIO
IST
AC’97
I/F
GPIO_7
GPIO_8
GPIO_12
GPIO_13
GPIO_25
GPIO_27
GPIO_28
ITL_ICH4_M_BGA_421P
1
1
R46
100K_5%
1
2
2
+V3S
8.2K_5%
2
R43
10K_5%
2
2
2
3
R1434
10K_5%
1
R38
8.2K_5%
R45
OPEN
1
1
1
12
Ch
$V
Engineer
05h
Infineon 128MB
13
Dh
TBD
06
06h
Samsung 32MB
14
Eh
TBD
07
07h
Hynix 32MB
15
Fh
TBD
INVENTEC
David Du
Drawn by
David Du
TBD
05
RTC CIRCUITRY
1 C6039
2 0.1UF_16V
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, August 21, 2003
Time Changed
11:35:30 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ICH4-2
VER
A02
Model Number
PC8803
Sheet
38
of
67
+V1.5A
+V1.5A_ICH
U1037
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
G19
G21
H1
J6
K3
K11
K13
K19
K23
L10
L11
L12
L13
L14
L21
M1
M11
M12
M13
M20
M22
N5
N10
N11
N12
N13
N14
N19
N21
N23
P3
P11
P13
P20
P22
R5
R18
R21
T1
T19
T23
U20
V3
V15
V17
W5
W8
W22
Y7
Y19
ITL_ICH4_M_BGA_421P
1 C1391
1 C81
1 C66
1 C47
2
2
2
2
L1031
1
2
BLM21A121S
U1037
10UF_K_6.3V
+V1.5S
0.1UF_16V
+V3S
1 C82
2
+V3S
+V5S_ICHREF
1
BAT54 2
R1423 2
1K_1%
1
C1422
2
1UF_16V
C1407
R1408 2
F6 VCCLAN1.5_0
F7 VCCLAN1.5_1
1 C68
3
+V5L
1
0.1UF_16V
E9 VCCLAN3.3_0
F9 VCCLAN3.3_1
1
C51
0.1UF_16V 2
E7 VCC5REF1
V6 VCC5REF2
1K_1%
1
+V3A
E15 VCC5REFSUS1
1UF_16V 2
BAT54
1
VCCSUS1.5_0
VCCSUS1.5_1
VCCSUS1.5_2
VCCSUS1.5_3
VCCSUS1.5_4
VCCSUS1.5_5
VCCSUS1.5_6
VCCSUS1.5_7
1
D1031
+V5S
E12
E13
E20
F14
G18
R6
T6
U6
POWER
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS
A1
A4
A16
A18
A20
A22
AA3
AA9
AA12
AA16
AA22
AB7
AB20
AC1
AC5
AC10
AC14
AC18
AC23
B9
B12
B16
B18
B20
B22
C6
C15
C17
C19
C21
C23
D1
D4
D8
D12
D15
D17
D19
D21
D22
D23
E10
E14
E16
E17
E18
E19
E21
E22
F8
G3
G6
+V3S
0.1UF_16V 0.1UF_16V 0.1UF_16V
L1025
1
2
BLM21B121SD
0.1UF_16V
1 C67
2
L23
M14
P18
T22
+V1.8S
3
D1027
VCCHI_0
VCCHI_1
VCCHI_2
VCCHI_3
2
2
1 C76
1
2
2
C95
1
C75
2
0.1UF_16V 0.1UF_16V
0.1UF_16V
VCC1.5_0
VCC1.5_1
VCC1.5_2
VCC1.5_3
VCC1.5_4
VCC1.5_5
VCC1.5_6
VCC1.5_7
K10
K12
K18
K22
P10
T18
U19
V14
1
2
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
C56
C48
C79
C58
C49
C1420
C59
C50
C1439
0.1UF_16V 0.1UF_16V0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V 10UF_K_6.3V
C55
1
2
1
C61
2
+V1.5S
1
1
1
2 C57
2 C74
2 C62
0.1UF_16V 0.1UF_16V
0.1UF_16V
1
1
2 C78
0.1UF_16V
2 C1421
10UF_K_6.3V
VCCRTC AB5
P14 VCC_CPU_IO_0
U18 VCC_CPU_IO_1
AA23 VCC_CPU_IO_2
10UF_K_6.3V
0.1UF_16V
A5
B2
H6
H18
J1
J18
K6
M10
P6
P12
U1
V10
V16
V18
AC8
AC17
VCCSUS3.3_0
VCCSUS3.3_1
VCCSUS3.3_2
VCCSUS3.3_3
VCCSUS3.3_4
VCCSUS3.3_5
VCCSUS3.3_6
VCCSUS3.3_7
VCCSUS3.3_8
VCCSUS3.3_9
C22 VCCPLL
1 C1388 1 C94
VCC3.3_0
VCC3.3_1
VCC3.3_2
VCC3.3_3
VCC3.3_4
VCC3.3_5
VCC3.3_6
VCC3.3_7
VCC3.3_8
VCC3.3_9
VCC3.3_10
VCC3.3_11
VCC3.3_12
VCC3.3_13
VCC3.3_14
VCC3.3_15
E11
F10
F15
F16
F18
K14
V7
V8
V9
F17
+V_RTC
1
2
ITL_ICH4_M_BGA_421P
C44
0.1UF_16V
+V1.5S
+V3A_ICH
C77
+V3A
1
2
0.01UF_16V
1 L1027 2
BLM21A121S
+VCCP
1
R245
0_5%
2
C244
C60
1
1
2
2
1UF_16V
1
C1386
2
1
1
1
1
1
2 C46
2 C80
2 C64
2 C63
2 C65
2 C1406
0.1UF_16V 0.1UF_16V 10UF_K_6.3V
0.1UF_16V 0.1UF_16V 0.1UF_16V
1
0.1UF_16V
0.1UF_16V
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:55:59 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
ICH4-3
VER
A02
Model Number
PC8803
Sheet
39
of
67
+V3S
+V3A_MSIO
1 C98
2 0.1UF_16V
11
67
81
94
VCC1
VCC1
VCC1
VCC1
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
414157575757-
26
27
29
31
32
33
IMCLK
IMDAT
KCLK
KDAT
EMCLK
EMDAT
59-,55-,54-,51-,42-,38-
44
46
43
59
CLKRUN#
SER_IRQ
PCI_CLK
EC_SCI#
59-,51-,42-,37153859-,38-,42-
+V3S
1 R127 2
59-,42-,38-,30-
LAD3
LAD2
LAD1
LAD0
41 LFRAME#
42 LRESET#
34 LPCPD#
59-,42-,3859-,54-,51-,42-,37-
2
3
+V_RTC
1 C1412
1 C1411
2 15PF
2 15PF
GND
GND
GND
GND
GND
GND
GND
4
98
97
96
95
93
GPIO2
GPIO3
GPIO4_KSO14
GPIO5_KSO15
62
63
64
66
63736205-
TP574
D1030
BAT54
1
58-,54-
3
AIRACIN2
XMIT_OFF#
VOL_DN
VOL_UP
+V3A
C315
22PF_50V
1 2
2100K_1%
+V3A
210K_5%
R1410 1
R99 1 100K_5% 2
SCROLL_LED#_3
59-,40-
NUM_LED#_3
6-
6376-,559-,47-,45-,38-,13-,12-,9-,7-
6657-,657-,6-
1
R62
2
1
PCI_SERR#_3
AIRACIN#
SLP_S3#_3R
R106
2 10K_5%
402 OPEN
2 1K_1%
2 OPEN
2 OPEN
2 1K_1%
R103 1
R107 1
R108 1
R101 1
R100 1
PWRGD
FAIR_NC7WZ17_SC70_6P
FAIR_NC7WZ17_SC70_6P
R13991
15- CLK_KBC14_3R
52-,51-S_CLK
PM_PWROK
1
38-,14-
R105
PWR_GOOD_3
2
2
40-
D1065
PWRGD
5
+V3A
BAT_LED#_3
PWR_LED#_3
CAPS_LED#_3
NUM_LED#_3
FOR FINE-TUNE SEQUENCE TIME
59-,30-,14-,11-
10K_5%
5959-,5759-
+V3S
OPEN
VCC1_POR#_3
1K_5%
TP576
THM_MAIN#
A20GATE_3
+V3A_MSIO
SDA_MBAY
SCL_MBAY
38-
THM_MBAY#
55-,54-,51-,37-
SDA_MAIN
SCL_MAIN
1
2
3
4
5
6
CN1006
1
2
G 7
3
G 8
4
5
6
1
U1045
6
1
1
2
R279
5
3
2
150K_1%
2
C314 0.1UF_16V
1 2
1N4148
1 C316
2
0.1UF_16V
U1045
4
2
MLX_67451_0006
R1413
300_5%
2 0.1UF_16V
2
59-
1
1 C1413
1
BATSTAT#
AB1B_DATA 84
AB1B_CLK 85
91
88
90
89
2
55-
R1 1
AB1A_DATA 86
AB1A_CLK 87
DMS_LED#
BAT_LED#
PWR_LED#_8051TX
FDD_LED#_8051RX
1
PWR_SWIN#_3
2
1
10K_5%
ACIN#
LOW_BAT#_3
5386-
56
82
83
48
58
49
61
60
50
1
57
CHGCTRL_3
5959R1411
71
72
73
74
75
76
77
PGM
FWP#
EA#
CLOCK
32KHZ_OUT
RESET_OUT#
PWRGD
VCC1_PWRGD
24MHZ_OUT
TEST_PIN
MODE
BATSELB_A#
KBCPURST#_3
INV_PWM_3
FAN_PWM_3
59-,57-,38-
GPIO7_PWM3 68
GPIO8_RXD 69
GPIO9_TXD 70
GPIO11_AB2A_DATA
GPIO12_AB2A_CLK
GPIO13_AB2B_DATA
GPIO14_AB2B_CLK
GPIO15_FAN_TACH1
GPIO16_FAN_TACH2
GPIO17_A20M
RUNSCI0#_3
TP573
92
79
65
45
36
28
8
1
XTAL1
XTAL2
VCC0
XOSEL
55 AGND
53
54
51
52
X1003
32.768KHZ
RTC
OPEN
OUT7_SMI#
OUT8_KBRST
OUT9_PWM2
OUT10_PWM0
OUT11_PWM1
37-
GPIO20_PS2CLK 78
GPIO21_PS2DAT 80
Miscellaneous
LPC_FRAME#_3
PCI_RESET2#_3
2
SUS_STAT#_3
40
39
37
35
LPC_AD(3)
LPC_AD(2)
LPC_AD(1)
LPC_AD(0)
R128
10K_5%
LPC Bus
LPC_AD(3:0)
1
BLM21A121S
1 C84
2 0.1UF_16V
1 C85
2
+V3A
OUT0 99
OUT1_IRQ8# 100
SMSC_LPC47N250_TQFP_100P
25
24
23
22
21
20
19
18
SCAN_IN(0)
SCAN_IN(1)
SCAN_IN(2)
SCAN_IN(3)
SCAN_IN(4)
SCAN_IN(5)
SCAN_IN(6)
SCAN_IN(7)
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12_OUT8_KBRST
KSO13_GPIO18
Keyboard/Mouse Interface
17
16
15
14
13
12
10
9
7
6
5
4
3
2
Power Mgmt
SIRQ
TP129
41-,59-
CLKRUN#_3
SERIRQ_3
CLK_KBCPCI_3R
WAKEUP0#_3
10UF_K_6.3V
1 C99
2
0.1UF_16V
U1033
SCAN_OUT(0)
SCAN_OUT(1)
SCAN_OUT(2)
SCAN_OUT(3)
SCAN_OUT(4)
SCAN_OUT(5)
SCAN_OUT(6)
SCAN_OUT(7)
SCAN_OUT(8)
SCAN_OUT(9)
SCAN_OUT(10)
SCAN_OUT(11)
C1392
0.1UF_16V
SCAN_OUT(11:0) 59-,41-
IM_CLK_5
IM_DAT_5
KB_CLK_5
KB_DAT_5
EM_CLK_5
EM_DAT_5
1
20K_5%
1 C97
2 0.1UF_16V
R104
0.1UF_16V
1 C83
2
General Purpose I/O Interface
C1409
10UF_K_6.3V
1 C1410
2
Access Bus Interface
2
SCAN_IN(7:0)
1 L1023 2
0.1UF_16V
1
VCC2 30
VCC2 38
VCC2 47
1 L1029 2
BLM21A121S
+V3S_MSIO
20K_5%
R102
+V3A
2
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:09 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
KBC
VER
A02
Model Number
PC8803
Sheet
40
of
67
+V3A
1
R230
OPEN
2
1
SCAN_OUT(5)
SCAN_OUT(2)
SCAN_OUT(0)
SCAN_OUT(11)
2
OPEN
SCAN_OUT(9)
SCAN_OUT(1)
SCAN_OUT(10)
SCAN_OUT(6)
SCAN_OUT(7)
SCAN_OUT(4)
SCAN_OUT(8)
SCAN_OUT(3)
R212
KSCAN_IN(9)
KSCAN_IN(11)
KSCAN_IN(13)
SCAN_IN(7)
KSCAN_IN(6)
KSCAN_IN(5)
KSCAN_IN(3)
KSCAN_IN(1)
KSCAN_IN(2)
KSCAN_IN(4)
KSCAN_IN(0)
KSCAN_IN(10)
KSCAN_IN(12)
KSCAN_IN(8)
KSCAN_IN(14)
41414159-,40-,414159-,41-
4159-,4141414141414141-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ROHM_UMP11_SSOP_6P
CN13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ROHM_UMP11_SSOP_6P
41-
KSCAN_IN(0)
40-,41-
4
3
6
2
41-
1
5
40-,41-
SCAN_IN(5)
59-,41-
59-,41-
KSCAN_IN(5)
2
6
KSCAN_IN(1)
41-
KSCAN_IN(13)
1
KSCAN_IN(9)
U1028
U1030
ROHM_UMP11_SSOP_6P
ROHM_UMP11_SSOP_6P
40-,41-
41-
KSCAN_IN(2)
4
3
4
SCAN_IN(2)
SCAN_IN(6)
3
41-
KSCAN_IN(14)
41-
KSCAN_IN(10)
40-,41-
41-
KSCAN_IN(6)
5
5
41-
40-,41-
SCAN_IN(3)
6
2
41-
1
6
KSCAN_IN(3)
2
1
KSCAN_IN(11)
U1027
MLX_52610_3094_30P
U1029
59-,40-
SCAN_IN(4)
3
41-
KSCAN_IN(12)
5
40-,41-
SCAN_IN(1)
4
SCAN_IN(0)
41-
KSCAN_IN(8)
40-,41-
41-
KSCAN_IN(4)
+V5S
SCAN_OUT(11:0)
L14
1
2
BLM21A121S
1
R1279
4.7K_5%
4.7K_5%
2
C173 1
680PF 2
1
R1278
+5VS_IM
2
1
2
3
4
5
6
7
8
9
10
11
12
(15/5)
IM_DAT_5
+V3A
4040-
IM_CLK_5
5 1 2 3
4
$V
RS1
47K
KSCAN_IN(0)
SCAN_IN(1)
KSCAN_IN(2)
SCAN_IN(3)
6 7 8 9 10
4140-,41-
4140-,41-
4
3
2
1
RS1056
5
6
7
8
40-,41-
59-,4140-,41-
41-
SCAN_IN(0)
KSCAN_IN(1)
CN8
1
2
3
4
5
9 G
6
10 G
7
8
SCAN_IN(2)
KSCAN_IN(3)
OPEN
1
2
3
4
5
6
7
8
CN10
1
2
3
4
5
6
7
8
9
10
11
12
TOUCH PAD
G
G
G
G
13
14
15
16
MLX_52559_1292_12P
MLX_52559_0890_8P
SCAN_IN(0)
SCAN_IN(1)
SCAN_IN(2)
SCAN_IN(3)
SCAN_IN(4)
SCAN_IN(5)
SCAN_IN(6)
SCAN_IN(7)
KSCAN_IN(4)
SCAN_IN(5)
KSCAN_IN(6)
4140-,41-
41-
$V
4
3
1
2
RS1057
5
6
8
7
40-,41-
59-,4140-,41-
SCAN_IN(4)
KSCAN_IN(5)
SCAN_IN(6)
OPEN
POINT STICK
Engineer
59-,40-,41-
SCAN_IN(7:0)
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:18 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
INT.KBC/POINT DEVICES
VER
A02
Model Number
PC8803
Sheet
41
of
67
+V5S
SRXD_3
STXD_3
SDSR#_3
SRTS_3
SCTS_3
SDTR#_3
RI#_3
SDCD#_3
4357-,434357-,434357-,434343-
57-,4457-,4457-,4457-,4457-,4457-,4457-,44-
+V3S
STRB#_5
ALF#_5
ERROR#_5
ACK#_5
BUSY_5
PE_5
SLCT_5
+V3S
1
R135
100K_1%
2
+V3S
R1362 2
R1363 2
R1364 2
R1365 2
1
1
1
1
Q1045
10K_5%
10K_5%
10K_5%
10K_5%
2
44-,42-
PTF
D1
S1
5
2
R1381
4
D2
3
49-,48-,424949-
1
10K_5%
DIR#_3
STEP#_3
WDATA#_3
WGATE#_3
HDSEL#_3
FE_INDEX#_5
FE_TRK0#_5
FE_WPROT#_5
FE_RDATA#_5
494949494949494949TP537
15-
CLK_SIO14_3R
LPC_AD(0)
LPC_AD(1)
LPC_AD(2)
LPC_AD(3)
59-,40-,3838-
PDATA(7:0)
PDATA(7)
PDATA(6)
PDATA(5)
PDATA(4)
PDATA(3)
PDATA(2)
PDATA(1)
+V3S
PDATA(0)
57-,44SLCTIN#_5
57-,44PINIT#_5
44-,425959594242424242424242-
+V3S
GP13_IRQIN1
+V3S
PTF
IR_SD_3
IR_TX_3
IR_RX_3
GP22
GP21
GP20
GP16
GP17
GP15
RS1052
+V3S
GP15
GP16
GP22
2
R125
1
+V3S
R120
GP37
GP36
GP35
GP34
42424242-
+V3S
10
6
7
8
9
1
2
3
4
5
2
42424242-
GP33
GP32
GP31
GP30
10K
47K_5%
+V3S
R123
OPEN
MB_FDD_IDE#
2
R122
1
10K_5%
2
4849-
1
10K_5%
+V3S
GP43
GP44
GP45
GP46
GP47
GP10
SYSOPT
PP_FDD_SMI
RS1053
+V3S
R124
GP17
GP20
GP21
GP14_IRQIN2
10K
OPEN
2
42424242-
1
R121
GP10
SYSOPT
GP47
GP44
42424242-
+V3S
10
9
6
7
1
3
2
4
8
5
424242-
GP43
GP46
GP45
10K
2
47K_5%
1
HDD_RESET#
MB_RESET
59-,54-,51-,40-,37-
+V3S
10
1
8
7
4
RS1054
1
GP30
GP31
GP32
GP33
GP34
GP35
GP36
GP37
PCI_RESET2#_3
42-
3
9
2
6
5
4242424242424238-
1
49-
R126
0_5%
4242424242424242-
2
59-,55-,54-,51-,40-,381559-,51-,40-,37-
38-
4242-
GP14_IRQIN2
GP13_IRQIN1
+V3S
NPCI_RESET
2 R1394 1
42-
10K_5%
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
LPC_FRAME#_3
LPC_DRQ0#
CLKRUN#_3
CLK_SIOPCI_3R
SERIRQ_3
59-,38-,40-
44-,57-
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
PD7
PD6
PD5
PD4
PD3
PD2
PD1
U1026
PD0
NSLCTIN
SMSC_LPC47N227_STQFP_100P
NINIT
VCC
GP23_FDC_PP
IRMODE_IRRX3
IRTX2
IRRX2
VSS
GP22
GP21
GP20
GP16
GP17
GP15
VCC
GP14_IRQIN2
GP13_IRQIN1
59-,40-,38-,30-
LPC_AD(3:0)
DRVDEN0
DRVDEN1
NMTR0
NDSKCHG
NDS0
GP24
VSS
NDIR
NSTEP
NWDATA
NWGATE
NHDSEL
NINDEX
NTRK0
NWRTPRT
NRDATA
NIO_PME
VTR
CLOCKI
LAD0
LAD1
LAD2
LAD3
NLFRAME
NLDRQ
SUS_STAT#_3
+V3S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
NDTR2
NCTS2
NRTS2
NDSR2
TXD2
RXD2
NDCD2
VCC
NRI2
NDCD1
NRI1
NDTR1
NCTS1
NRTS1
NDSR1
TXD1
RXD1
NSTROBE
NALF
NERROR
NACK
BUSY
PE
SLCT
VSS
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
MTR0#_3
FE_DSKCHG#_5
DS0#_3
49-
1 C117
FDG6301N_SC70_6
NPCI_RESET
NLPCPD
NCLKRUN
PCI_CLK
SER_IRQ
VSS
GP30
GP31
GP32
GP33
GP34
GP35
GP36
GP37
GP40
GP41
GP42
GP43
GP44
GP45
GP46
GP47
GP10
GP11_SYSOPT
GP12_NIO_SMI
DRVDEN0_3
1 C1364
1 C112
2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
MTR0#_3
1
S2
G2
+V3S
1 C96
6 49-,48-,42-
G1
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:25 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SUPER I/O
VER
A02
Model Number
PC8803
Sheet
42
of
67
+V3S
0.1UF_16V
C1360
1
2
+V3S
26
VCC
C1359
1
R138
100K_5%
2
STXD_3
57-,42-
SRTS_3
57-,42-
SDTR#_3
57-,42-
1
2
1
2
C1362
0.1UF_16V
28
C1+
24 C11
C2+
2 C2-
42-,43-
RI#_3
SDSR#_3
T2IN
12 T3IN
SCTS_3
+V3S
SDCD#_3
42-,4342-,4342-,43-
+V3S
1
T1OUT 9
43-
T1OUT
T2OUT 10
43-
T2OUT
T3OUT 11
43-
T3OUT
R1IN 4
43-
R1IN
R2IN 5
43-
R2IN
R3IN 6
43-
R3IN
R4IN 7
43-
R4IN
R5IN 8
43-
R5IN
RS1050
1
2
3
4
43434343-
R5IN
T1OUT
T2OUT
T3OUT
16 R4OUT
15
R5OUT
23 FORCEON
8
7
6
5
43434343-
R5IN_R
T1OUT_R
T2OUT_R
T3OUT_R
330PF_50V 330PF_50V 330PF_50V 330PF_50V
22 FORCEOFF#
INVALID# 21
GND
25
C1101
1
2
MAX_3243E_SSOP_28P
2
57-,56-,38-
R1IN_R
R2IN_R
R3IN_R
R4IN_R
33
R1360
10K_5%
PREP
43434343-
33
19 R1OUT
18
R2OUT
17 R3OUT
42-,43-
C116 0.1UF_16V
1 2
C1361 0.1UF_16V
V- 3
1 2
V+ 27
8
7
6
5
U1023
14 T1IN
13
20 R2OUTB
SRXD_3
RS1051
1
2
3
4
43434343-
R1IN
R2IN
R3IN
R4IN
0.1UF_16V
R5IN_R
R3IN_R
R1IN_R
T1OUT_R
T3OUT_R
R4IN_R
T2OUT_R
R2IN_R
Q1044 3
D
2G
S
NDS7002A 1
C1103
C1102
1
2
1
2
1
2 C1104
CN17
1
6
2
7
3
8
4
9
5
4343434343434343-
1
2
1
C1125 2
330PF_50V
1
2
1
2
G
G
TP578
TP579
SYN_7517P_09G2T
C1124
330PF_50V
C1126
C1127
330PF_50V 330PF_50V
+V5S
SCTS_3R
SCTS_3
SDSR#_3R
SDSR#_3
5742-,435742-,43-
+V5S
+V5
U1014
VCC 16
1 NC
2 BE0 BE3 15
A3 14
3 A0
B3 13
4 B0
5 BE1 BE2 12
6 A1
A2 11
B2 10
7 B1
NC 9
8 GND
+V5
U1015
5742-,435742-,43-
RI#_3R
RI#_3
SDCD#_3R
SDCD#_3
SRXD_3R
SRXD_3
57-
1
A
VCC 5
2 B
42-,43-
3 GND
+V5S
OE 4
FAIR_NC7SZ66P5X_SC70_5P
PER_PI5C3126Q_QSOP_16P
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:30 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SERIAL PORT&IR
VER
A02
Model Number
PC8803
Sheet
43
of
67
+V5S
57-,42-
SLCTIN#_5
57-,42-
PDATA(3)
PDATA(4)
PDATA(5)
PDATA(6)
PDATA(7)
ACK#_5
BUSY_5
PE_5
SLCT_5
10_5%
RS1023
RS1018
4
3
2
1
1
2
3
4
8
7
6
5
5
6
7
8
10_5%
2
C1297
C1295
2
100PF_50V
1
C1296
100PF_50V
C1249
1
44-
100PF_50V
2
100PF_50V
C1246
100PF_50V
1
100PF_50V
2
C1248
100PF_50V
1
C1250
C1247
C1226
C1224
C1225
C1206
C1203
C1227
100PF_50V
100PF_50V
2
2
1
2
3
4
444457-,42-,444457-,42-,444457-,42-,444457-,42-,44-
STRB#_5R
ALF#_5R
PDATA(0)_R
ERROR#_5R
PDATA(1)_R
PINIT#_5R
PDATA(2)_R
SLCTIN#_5R
PDATA(3)_R
57-,42-,44-
PDATA(4)_R
10_5%
57-,42-,44-
PDATA(5)_R
57-,42-,44-
PDATA(6)_R
57-,42-,44-
PDATA(7)_R
10_5%
1
57-,42-
RS1028
1
1
2
2
R234
10_5%
RS6
10
9
8
7
6
4
3
2
1
5
PDATA(7:0)
44-
ACK#_5R
44-
BUSY#_5R
44-
PE_5R
44-
SLCT_5R
+V5S
STRB#_5R
57-,42-,44PDATA(0)_R
57-,42-,44PDATA(1)_R
57-,42-,44PDATA(2)_R
57-,42-,44PDATA(3)_R
57-,42-,44PDATA(4)_R
57-,42-,44PDATA(5)_R
57-,42-,44PDATA(6)_R
57-,42-,44PDATA(7)_R
44ACK#_5R
44BUSY#_5R
44PE_5R
44SLCT_5R
44ALF#_5R
44ERROR#_5R
44PINIT#_5R
44SLCTIN#_5R
R1196
10K_5%
PTF42-,44-
2
PINIT#_5
2
1
2
100PF_50V
ERROR#_5
1
1
2
1
PDATA(2)
2
1
2
100PF_50V
57-,42PDATA(1)
1
1
2
100PF_50V
PDATA(0)
1
2
5
6
7
8
8
7
6
5
1
2
100PF_50V
RS1032
4
3
2
1
57-,4257-,42-
STRB#_5
ALF#_5
1
C1204
2
100PF_50V
1
2
100PF_50V
C228
1
100PF_50V
4.7K
C1205
10
6
7
8
9
4
3
2
1
5
BAT54
1
D1010
3
100PF_50V
RS4
EXTFDD_VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
CN9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22 G 26
23 G 27
24
25
SYN_7518S_25G2
57-,42-,44-
4.7K
4.7K_5%
1
R233
2
C229
1
47UF_6.3V_METAL
1
2
C227
0.1UF_25V
EXTFDD_VCC
+V5
(20/5)
4
+V5
3
1 C1202
Q1018
S
D
G
2 4.7UF_10V
1
R1165
47K_5%
Q9
42-,44-
2
B
FDC638P
1
2
PTF
(20?5)
1
2
5
6
R1174
47K_5%
2
LAYOUT NOTES : PUT THESE CIRCUIT CLOSE TO PARALLER PORT
3
C
E
DTC124EK
1
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:35 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
PARALLER PORT
VER
A02
Model Number
PC8803
Sheet
44
of
67
+V5
+V3S
AUDIO_VCC
(20/5)
1
C1468
R1586
OPEN
1
2
Q1061 3
D
2G
R12
2
1
OPEN
R13
2
R11
1
OPEN
2
46-,45-
59-,47-,40-,38-,13-,12-,9-,7-
SLP_S3#_3R
S
2N7002_OPEN 1
1
C12
1
2
OPEN
2
1
C10
1
U1044
1 IN
OUT 5
2 GND
ADJ 4
3 EN
22UF_10V
PHONE_AMP
OPEN
1
22UF_6.3V
1 C1462
2
2 0.1UF_16V
1
0_1206_1/4W
OPEN
C1464
R1462
49.9K_1%
R1464
1 C1465
143K_1%
2 0.01UF_16V
MIC_MIC5205BM5_SOT23_5P
R1466
2
2
AVDD
AUDIO_VCC
+V3S
LAYOUT NOTES : R697 MUST BE PLACED ACROSS DIGITAL & ANALOG GROUND
1 L1036 2
BLM21A121S
1
C1461
10UF_10V
C1460
1 C29
1 C17
1 C18
2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V
1
1
C1458
2
C14592
0.1UF_16V 0.1UF_16V
1 C1463
2 0.1UF_16V
1
10UF_10V
AC97_BIT_CLK
SDATA_OUT_ICH
BITCLK_3_ICH
SDATA_IN0_ICH
FRAME_SYNC_ICH
CODEC_RST#_ICH
ADI48M
U1043
59-
R22
R21
R20
R19
59-,38383859-,3859-,38-
5
6
8
10
11
LINE_IN_L 23
C31 1
2 270PF_50V
30 AFILT2
31
AFILT3
32 AFILT4
LINE_IN_R 24
C1437 1
2 270PF
LINE_OUT_L 35
34
42
45
46
47
48
57-
PHONE_IN 13
NC
ID0#
ID1#
EAPD
SPDIF
R1460
1K_1%
2
R1459
1K_1%
2
1
C14332
1UF_10V
R1456
2
4.7K_5%
1
C1454 2.2UF_0805_16V
1 2
1
R1457
R1455
49-
A_CD_L
49-
A_CD_GND
49-
A_CD_R
2
2
2.7K_5%
1
HPSENSE
R1452
2
2.7K_5%
2
C1455 2.2UF_0805_16V
1 2
OPEN
1
R1454
2
4.7K_5%
1
R1453
2
4.7K_5%
C1431 2.2UF_0805_16V
1 2
C1432 2.2UF_0805_16V
1 2
1
C1438
C1457 1 2 OPEN
OPEN
47-
A_LEFT
47-
A_RIGHT
54-
2
46-,45-
A_MPCI_IN
1 2
1
R14
46-
MIC1
1
C1430 1 2 1UF_10V
46-
MIC2
R1458
OPEN
PHONE_AMP
2
OPEN
C1453 1 2 1UF_10V
+V3S
1
HP_OUT_R 41
47-
HPL
3 D Q1059
G 2
OPEN
1
AD_1981B_TQFP_48P
C16 0.1UF_16V
1 2
1 C14
2 0.1UF_16V
R18
2
C28 1 2 0.1UF_16V
4.7K_5%
R17
1K_5%
C15 1 2 0.1UF_16V
1
1
2
2
57-
LINEINR
1
51-
R1440
4.7K_5%
PCSPKB_3
2
S
HPR
NC 12
R1441
4.7K_5%
2
1 C27
2 OPEN
1 C13
1 C11
2 OPEN 2
1
R280
10K_5%
2
47-
LINEINL
R1437
4.7K_5%
MIC2 22
AUX_R 15
57-
1
MIC1 21
HP_OUT_L 39
R1438 2
4.7K_5%
AUX_L 14
26 AVSS1
40 AVSS2
44 AVSS3
2
47-
MONO_OUT 37
AVDD4
R23
4.7K_5%
1
2
1
4.7K_5%
LINE_OUT_R 36
33 AVSS4
C32 0.1UF_16V
1 2
2
C1456 2.2UF_0805_16V
1 2
CD_R 20
29 AFILT1
2 270PF
C1434
1 0.1UF_16V1
CD_GND_REF 19
1
1
VREF 27
VREFOUT 28
2 270PF_50V
C1436 1
1
OPEN
C30 1
59-,47-
SPDIF
C1435
R15
2
1
JS1 16
2.2K_5%
17
JS0
R16
CD_L 18
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC
RESET#
2 XTL_IN
3 XTL_OUT
15-
AVDD
EAPD
2 33_5%
2 33_5%
2 33_5%
2 33_5%
1
1
1
1
AVDD1 25
AVDD2 38
AVDD3 43
AUDIO_VREF
DVDD1 1
DVDD2 9
54-
1
4 DVSS1
7 DVSS2
MPCI_PWM
1 100PF_50V
2 C1466
1
C1467
2
1UF_10V
2N7002
+V3S
1
R281
10K_5%
2
3 D Q1060
G 2
38-
PCSPKR_ICH_3
S
1
Engineer
2N7002
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:56:41 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
AC97 CODEC
VER
A02
Model Number
PC8803
Sheet
45
of
67
C1423 100PF_50V
1 2
AUDIO_VCC
AUDIO_VREF AUDIO_VCC
C23
1 C6
2
6 -
EXT_MIC1
U1
OUT 7
INT_MIC_SW
46-
C40
0.22UF_K_10V
1 2
46-
C41
2 OPEN
C42
R30
C4
U1
1
2
13 -
2
4700PF
10K_5%
1 R31 2
4700PF
1
1 2
1 C8
1
1
2
4
OUT
0.1UF_16V
45-
14
MIC1
MAX4492AUD
11
100PF_50V
0.01UF_16V
100K_5%
1 2
R32
C25 100PF_50V
1 2
2
100K_5%
1
R35
2
AUDIO_VREF AUDIO_VCC 100K_5%
1 C7
2 OPEN
1
R1426 2
100K_5%
12 +
4
MAX4492AUD
11
1
2
PHONE_AMP
45-
5 +
0.01UF_16V
1
C6042
AUDIO_VREF
C6043
R34
0_5%
1
2
PHONE
C24
1 2
OPEN
59-,54-
1
R36
U1
2
4
10 +
2
OPEN
EXT_MIC2
46-
C43 0.22UF_K_10V
1 2
R33
2
9 -
1
10K_5%
OUT
100PF_50V
45-
8
MIC2
MAX4492AUD
11
AUDIO_VCC
1
C22
1 2
1
AUDIO_VCC
AUDIO_VREF
R29
AUDIO_VCC
1
0.01UF_16V
INT_MIC_CN
1
1
2
2
OPEN
R27
3K_5%
2
1
R26
3K_5%
1 C19
2 1UF_10V
2
C21
1
R28
1 C1441
1
4
OUT
U1
1
46-
1 C1442
R1443
3.9K_1%
2
2 -
1 2
10K_5%
0.22UF_16V
1
R1442
2 4.7UF_K_6.3V 3.92K_1%
2 0.1UF_16V
3 +
2
2
2
1 C3
46-
R24
470_5%
2
100K_5%
C6041
C5
1
R25
470_5%
680PF_50V
2 4.7UF_K_6.3V
2
INT_MIC
1 C1440
2 470PF_50V
MAX4492AUD
11
JACKGND
1 C1443
46-
1
EXT_MIC1
EXT_MIC2
INT_MIC_SW
INT_MIC
3 G
4 G
CN3
1 1
2 2
46-
L1034
2
46-
BLM21A121S
L1033
46-
BLM21A121S
1
2
46-
2 470PF_50V
1
2
6
3
4
5
7
8
JACK1
JA9033L_1F0
INT_MIC_CN
JST_BM2B_SRSS
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Friday, August 15, 2003
Time Changed
1:50:14 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
EQ&MIC JACK
VER
A02
Model Number
PC8803
Sheet
46
of
67
LAYOUT NOTES : C1568 C1973 C1565 CLOSE TO PIN 6
1
LAYOUT NOTES : C1971 C1972 C1566 CLOSE T0 PIN 15
R1446 2 OPEN
+V5
C9
45-
A_LEFT
0.047UF_16V
1
1
C6017
R1447 2 0_5%
1
1UF_10V
C1425 1
2
1 C1426
10UF_K_6.3V
1R1450
45- C1452
1 C1427
2
A_RIGHT
+V3A
1
2
1UF_16V
C6018
2
1
0_5%
0.047UF_16V
1UF_10V
2
2
5
U1040
4
TC7S08F
OPEN
+V3A
1 R1465 2
59-,45-
1
R10
2
1
OPEN
R9
2
3
16
VDD
PVDD 15
PVDD 6
LOUT- 8
LOUT+ 4
14
ROUT- 18
ROUT+
GND 20
13
GND 11
GND 1
GND
47474747-
1
2
0.1UF_16V
4.7UF_K_6.3V
C1449
1
C1424
C1450
1
C1429
1
2
1000PF_0402
150UF_10V
150UF_10V
0.1UF_16V
SPK_OUT_LSPK_OUT_L+
INTERNAL SPEAKER
SPK_OUT_RSPK_OUT_R+
(LEFT)
4747-
SPK_OUT_LSPK_OUT_L+
C34
1
2
3
4
1
1
100PF_50V 2
2
100PF_50V
1
2
100PF_50V
C35
CN1005
1
2
3
4
MLX_53398_0490
+V5
2
0_5%
4.7UF_K_6.3V
C1448
0_5%
4
TC7S02F
1
R1449 2
1
0_5%
R1448 2
2
R1463
(RIGHT)
4747-
SPK_OUT_RSPK_OUT_R+
OPEN
OPEN
C36
1
100PF_50V 2
C37
2
AUDIO_VCC
R55
AUDIO_VCC
1
100K_5%
1
R57
100K_5%
EARPHONE
2
1
R58
2
PR_HPSENSE#
57-
1
C33
2
OPEN
AUDIO_VCC
2
100K_5%
57-
HPL
HPR
451
150UF_10V
C1
451
1
150UF_10V
1
R1445 2
33
R2
L1035
1
2
BLM11A121S
L1
1
2
BLM11A121S
2
33
1
1
R1444
R3
1K_1% 1K_1%
2
PR_AOUTL
1 C1445
1 C2
2 470PF_50V2 470PF_50V
R1461
Q1056 5
S1
G1
6
D1
D2 4
3 G2
2
S2
NDC7002N
1
2
6
3
4
5
7
8
JACK2
JA9033L_1F0
57-
C6019
1
1
LACATE AT JACK
LACATE IN AUDIO
C1446
1
EAPD
2
1
SHUTDOWN
U1041
1 5
38-
1
2
TI_TPA6017A2_PWP_20P
+V5
1
2
3
C1428
0.47UF_10V
1
2
17
RIN7 RIN+
1 C1451
2
2
SLP_S3#_3R
1
19
SHUTDOWN#
10 BYPASS
2 GAIN0
3
12 GAIN1
NC
R1451
59-,45-,40-,38-,13-,12-,9-,7-
5 LIN9 LIN+
2
2
0.47UF_10V2
U1042
1 C1447
100K_5%
45-
HPSENSE
1UF_10V
PR_AOUTR
JACKGND
2
C6040
1 2
0.01UF_16V
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Wednesday, August 13, 2003
Time Changed
10:34:34 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
AUDIO AMP & HP JACK
VER
A02
Model Number
PC8803
Sheet
47
of
67
+V3S
CN7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
U1025
4
R146 2
PDD(7)
PDD(8)
PDD(6)
PDD(9)
PDD(5)
PDD(10)
PDD(4)
PDD(11)
PDD(3)
PDD(12)
PDD(2)
PDD(13)
PDD(1)
PDD(14)
PDD(0)
PDD(15)
1
42-
2
55-,37-,29-,21PCI_RESET1#_3
38-
HDD_RESET#
TC7S08F
3
PDD(15:0)
+V3S
38-
PDDRQ_35
38-
1
R165 2
4.7K_5%
PDIOW#_3
38-
PDIOR#_3
38-
R166 1
5
33_5%
2 470_5%
38-
PDIORDY_35
PDDACK#_35
37-
IRQ14_3
38-
PDA(1)
PDA(2:0)
PDA(0)
PDA(2)
383859-,48-
PDCS1#_3
PDCS3#_3
HDDASP#_5
+V5S
(20/5)
1 C1333
2
1 C1327
2 0.1UF_16V
SYN_200227MB044S414ZA_44P
1 C6028
1 C6029
1 C1332
2 180PF_50V
2 180PF_50V
2 1000PF_0402
0.1UF_16V
LAYOUT NOTES : THE WIDTH NEED 20 MILS
+V5S
1
R1587
47K_5%
HDDASP#_5
59-,48-
2
+V5S
1
R1291
47K_5%
MTR0#_3
MBDASP#_5
49-,4249-
2
1
+V5S
5
U1016
4
2
3
59-
MBLED#_3
TC7S08F
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:01 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
HDD CONN
VER
A02
Model Number
PC8803
Sheet
48
of
67
+V5S_MB
+V5S
IRQ15_3R
2
3 D Q1027
G 2
IRQ15_3
0.1UF_16V
38-
SDD(15:0)
37-
+V3S
+V3A
1
MB_FDD_IDE#
MBAY_ATTACHED#
4238-,49-
2
SDA(2:0)
1
R1280
10K_5%
SDIORDY_35
+V5S_MB
S
1 NDS7002A
38-,49-
2
4.7K_5%
1
49-
R200
1
C1285
SDD(15)
SDD(14)
SDD(13)
SDD(12)
SDD(11)
SDD(10)
SDD(9)
SDD(8)
SDD(7)
SDD(6)
SDD(5)
SDD(4)
SDD(3)
SDD(2)
SDD(1)
SDD(0)
18
16
14
12
10
8
6
4
3
5
7
9
11
13
15
17
SDA(2)
SDA(1)
SDA(0)
36
33
35
38-
R42
10K_5%
2
20
58
32
FE_RDATA#_5
FE_WPROT#_5
DRVDEN0_3
FE_TRK0#_5
WGATE#_3
WDATA#_3
STEP#_3
HDSEL#_3
DIR#_3
MTR0#_3
FE_DSKCHG#_5
DS0#_3
FE_INDEX#_5
66
64
55
53
62
61
59
57
68
56
54
51
50
48
70
42-,4942-,494242-,49424242424248-,4242-,494242-,49-
+V5S_MB
0.1UF_16V
C1315 C1316(20/5)
1
CN11
1
SD15 VCC_LOGIC 41
SD14 VCC_MOTOR 42
SD13
VCC 49
SD12
GND 19
SD11
GND 22
SD10
GND 24
SD9
GND 26
SD8
MPBID0 52
SD7
SD6
DMARQ 21
SD5
IORDY 27
SD4
CSEL 28
SD3
DMACK 29
SD2
DASP# 39
SD1
CS1# 38
SD0
CS0# 37
RST# 1
SA2
IOW# 23
SA1
IOR# 25
SA0
IRQ 31
PDIAG# 34
MPBID1
MPBID2
LOUT 44
NC
LRTN 45
RRTN 46
RDATA
ROUT 47
WRPRO#
DEN0
GND 2
MID0
GND 60
TRK0#
GND 63
WGATE#
GND 65
WDATA
GND 30
STEP#
GND 40
HDSEL#
GND 43
DIR
MOTORON#
GND 67
DCHANGE#
G 69
DS0#
INDEX#
G
2
2
0.1UF_16V
+V5S
1
R1239
10K_5%
3838-,49-
SDDRQ_35
SDIORDY_35
1
38483838-
C1283
1
2
R201 2
470_5%
SDDACK#_35
MBDASP#_5
SDCS3#_3
SDCS1#_3
1 R1238 2
383849-
2
SDIOW#_3
SDIOR#_3
IRQ15_3R
U1013
6
5
1
1
U1013
4
R1237 2
2
FAIR_NC7WZ17_SC70_6P
A_CD_L
45-
3
1K_5%
33_5%
45-
0.1UF_16V
5
45-
2
FAIR_NC7WZ17_SC70_6P
C1284
1
2
0.1UF_16V
A_CD_GND
+V5S
A_CD_R
42-,49-
FE_WPROT#_5
R136
1
2
330_5%
3 D Q1026
G 2
42-
MB_RESET
RS2
42-,4942-,4942-,4942-,49-
FE_RDATA#_5
FE_DSKCHG#_5
FE_INDEX#_5
FE_TRK0#_5
S
1 NDS7002A
4
1
2
3
5
8
7
6
1K
MLX_SD_87537_6873_68P
+V5A
C183
1
(20/5)
22UF_10V
+V5A
Q4
4
LAYOUT NOTES :
1
1
3
D
G
1
2
5
6
+V5S_MB
(20/5)
FDC638P
R198
47K_5%
470K_5%
2
1 C184
NFM41R11C223
2
L1006 1
4
(20/5)
C1313
3
2 0.047UF_16V
2
1 C1314
1
2 0.1UF_16V
2
1
10UF_K_6.3V
R197
100_5%
38-,49-
2
2
MBAY_ATTACHED#
2
220K_5%
1
R215
R199
S
Q8
D1020
3
2
SLP_S3_5R
5
32-,13-
D1
S1
1
BAT54C
G1
1
R1240
6
Q5 3
D
1
2G
S2 4
S
NDS7002A 1
G2
D2 3
FDG6301N
100K_5%
2
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:06 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
MULTIBAY CONN
VER
A02
Model Number
PC8803
Sheet
49
of
67
USBVCC1
+V5A
U3
7 VIN
2 0.01UF
VOUT 8
VOUT 6
5 VIN
1 C1414
+V5
(20/5)
2 OC#
ILIM 4
1 EN
GND 3
(20/5)
C69
R79
1
1
2
150UF_6.3V_S18_METAL
115_1%
1 C1394
1 C1393
2 0.1UF_16V
2 1UF_10V
MIC_MIC2545A_1BM_SOP_8P
USB_PN1
USB_PP1
L1030
1
38-
4
38-
2
USB_PN1_B
3
USB_PP1_B
CN1
DLW21SN900SQ2L
1
2
3
4
5
6
7
8
VCC
DD+
GND
VCC
DD+
GND
9
GND
GND 10
SYN_020122MR008SX20ZU_8P+2G
USBVCC0
U2
+V5A
7 VIN
5 VIN
+V5
1 C1415
2 OC#
1 EN
2 0.01UF
(20/5)
VOUT 8
VOUT 6
ILIM 4
GND 3
(20/5)
C20
1
R80
1
2
150UF_6.3V_S18_METAL
76.8_1%
1 C39
1 C38
2 0.1UF_16V
2 1UF_10V
MIC_MIC2545A_1BM_SOP_8P
USB_PN0
38-
USB_PP0
38-
L1032
1
4
2
USB_PN0_B
3
USB_PP0_B
DLW21SN900SQ2L
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:19 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
USB&IR CONN
VER
A02
Model Number
PC8803
Sheet
50
of
67
1 C1029
1 C1023
1 C1031
C1026
1
2
2
2
2
0.1UF_16V 0.1UF_16V 0.1UF_16V
0.1UF_16V 0.1UF_16V
0.1UF_16V
+V3
1
2
2
0.1UF_16V
10UF_10V
55-,54-,37-,51-
PCI_AD(31:0)
PCI_AD(31)
PCI_AD(30)
PCI_AD(29)
PCI_AD(28)
PCI_AD(27)
PCI_AD(26)
PCI_AD(25)
PCI_AD(24)
PCI_AD(23)
PCI_AD(22)
PCI_AD(21)
PCI_AD(20)
PCI_AD(19)
PCI_AD(18)
PCI_AD(17)
PCI_AD(16)
PCI_AD(15)
PCI_AD(14)
PCI_AD(13)
PCI_AD(12)
PCI_AD(11)
PCI_AD(10)
PCI_AD(9)
PCI_AD(8)
PCI_AD(7)
PCI_AD(6)
PCI_AD(5)
PCI_AD(4)
PCI_AD(3)
PCI_AD(2)
PCI_AD(1)
PCI_AD(0)
55-,54-,37-
PCI_CBE#(3)
55-,54-,37PCI_CBE#(2)
55-,54-,37PCI_CBE#(1)
55-,54-,37PCI_CBE#(0)
PCI_AD(22)
CLK_CBPCI_3R
PCI_DEVSEL#_3
PCI_FRAME#_3
PCI_IRDY#_3
PCI_TRDY#_3
PCI_STOP#_3
+V5S
PCI_PAR_3
PCI_PERR#_3
PCI_SERR#_3
Q6005 3
CBREQ2#_3
D
CBGNT2#_3
2G
PIRQC#_3
S
PIRQD#_3
PCI_RESET2#_3
1
2N7002
PIRQG#_3
59-,54-,42-,40-,374
+V3
1
R1010
10K_5%
U1003
5
2
3
TI_SN74LVC1G17DBVR_SOT_5P
GRST#
1555-,54-,3755-,54-,3755-,54-,3755-,54-,3755-,54-,3755-,54-,3755-,54-,3755-,54-,40-,373737373737-
1
52-
R1008 2
0_5%
2
0.01UF_16V
PCI_PME#_3
CLKRUN#_3
SERIRQ_3
PCSPKB_3
55-,54-,3759-,55-,54-,42-,40-,3859-,42-,40-,3745-
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
G1
K3
M3
R1
C_BE3#
C_BE2#
C_BE1#
C_BE0#
U2054
O2_OZH31B_MINI_BGA_224P
H5
E3
L3
K6
L1
L2
L5
M2
L6
M1
G6
F5
B5
F6
V5
D1
N18
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#
REQ#
GNT#
INTA#
INTB#_IRQ4_A_VPP_PGM
INTC#_LOCK#
RST#
GRST#
E6
F19
IRQ7_B_VPP_PGM_EXT_REQ#
IRQ10_B_VPP_VCC_PGM_EXT_GNT#
B14
A4
C5
V9
K19
IRQ12_PME#
IRQ14_CLKRUN#
IRQ5_SERIRQ#
IRQ15_RI_OUT#
SPKR_OUT#
5353535353535353-
SD_PWREN#
53-
52525252-
A_CCBE3#
A_CCBE2#
A_CCBE1#
A_CCBE0#
A_CCLK
A_CFRAME#
A_CIRDY#
A_CTRDY#
A_CDEVSEL#
A_CSTOP#
A_CPAR
A_CPERR#
A_CSERR#
A_CREQ#
A_CGNT#
A_CINT#
A_CBLOCK#
A_CCLKRUN#
A_CRST#
A_R2_D2
A_R2_D14
A_R2_A18
A_CVS1
A_CVS2
A_CCD1#
A_CCD2#
A_CAUDIO
A_CSTSCHG
V13
U14
P13
W14
U13
W13
R11
V12
R18
P17
R12
P12
U12
L17
P15
L19
V8
P11
W10
W16
V6
L14
M14
N19
525252525252525252525252525252525252525252525252-
A_CCLK
A_CFRAME#
A_CIRDY#
A_CTRDY#
A_CDEVSEL#
A_CSTOP#
A_CPAR
A_CPERR#
A_CSERR#
A_CREQ#
A_CGNT#
A_CINT#
A_CBLOCK#
A_CCLKRUN#
A_CRST#
A_D2
A_D14
A_A18
A_CVS1
A_CVS2
A_CCD1#
A_CCD2#
A_CAUDIO
A_CSTSCHG
SCLK_A_VCC_5#
SDATA_B_VCC_3#
SLATCH_B_VCC_5#
IRQ3_A_VCC_3#
IRQ9_A_VPP_VCC_PGM
K14
K15
K17
W12
P19
52-,40-
+V3S
1
R1004 2 20K_5%
G14
A16
A12
F9
B_CAD31
B_CAD30
B_CAD29
B_CAD28
B_CAD27
B_CAD26
B_CAD25
B_CAD24
B_CAD23
B_CAD22
B_CAD21
B_CAD20
B_CAD19
B_CAD18
B_CAD17
B_CAD16
B_CAD15
B_CAD14
B_CAD13
B_CAD12
B_CAD11
B_CAD10
B_CAD9
B_CAD8
B_CAD7
B_CAD6
B_CAD5
B_CAD4
B_CAD3
B_CAD2
B_CAD1
B_CAD0
B_CC_BE0#
B_CC_BE1#
B_CC_BE2#
B_CC_BE3#
B6
A6
B7
C7
A7
B8
A8
E9
B9
F10
E10
F11
C11
B11
A11
E14
D19
F15
E17
F14
G15
E19
F18
F17
G18
H15
H14
H17
H18
H19
J14
J17
F8
C8
C6
J15
A10
E18
C14
G17
F7
C10
A5
A14
F12
E13
C9
A9
A15
C15
C13
B13
A13
C12
B12
E12
SC_DET#_SD_DET#
SC_IO_SD_DATA0
SC_RSVD8_SD_DATA1
SC_RSVD4_SD_WP#
SC_RST#_SD_CMD
SC_CLK_SD_CLK
SD_DATA2
SC_OC#_SD_DATA3
SC_VCC5#
SC_VCC3#_SD_VCC3#
SC_VCC_SD_VCC
B_CSTSCHG
B_CAUDIO
B_CCD2#
B_CCD1#
B_CVS2
B_CVS1
B_R2_A18
B_R2_D14
B_R2_D2
B_CRST#
B_CCLKRUN#
B_CBLOCK#
B_CINT#
B_CGNT#
B_CREQ#
B_CSERR#
B_CPERR#
B_CPAR
B_CSTOP#
B_CDEVSEL#
B_CTRDY#
B_CIRDY#
B_CFRAME#
B_CCLK
52-
52525252525252525252525252525252525252525252525252525252-
B_SKT_VCC G19
B_SKT_VCC F13
B_SKT_VCC E7
C1020
B_CSTSCHG
B_CAUDIO
B_CCD2#
B_CCD1#
B_CVS2
B_CVS1
B_A18
B_D14
B_D2
B_CRST#
B_CCLKRUN#
B_CBLOCK#
B_CINT#
B_CGNT#
B_CREQ#
B_CSERR#
B_CPERR#
B_CPAR
B_CSTOP#
B_CDEVSEL#
B_CTRDY#
B_CIRDY#
B_CFRAME#
B_CCLK
B_CCBE0#
B_CCBE1#
B_CCBE2#
B_CCBE3#
1 C1005
2 10UF_K_6.3V
Engineer
INVENTEC
David Du
Drawn by
B_CAD(31:0)
David Du
R&D CHK
VCC_SD
1
2 0.1UF_16V
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:24 am
QA CHK
A3
DIAMOND
MFG ENGR CHK
Changed by
Size
TITLE
DOC CTRL CHK
EE2
S_LATCH
R1003 2 20K_5%
BCARDVCC
C1007 1
2
0.1UF_16V
52-
S_DATA
S_CLK
1
D2
B4
C16
C4
D3
B16
V16
U16
T18
T17
D17
R1009 2
SD_CD#
SD_DAT0
SD_DAT1
SD_WP
SD_CMD
SD_CLK
SD_DAT2
SD_DAT3
N15
V14
V11
W8
MS_DET#
MS_BS
MS_SDIO
MS_CLK
MS_VCC3#
MS_VCC
E5 NC
10K_5%
NOTS : U2054 WILL BE OZH31B IN THE FEATURE
A_CC_BE3#
A_CC_BE2#
A_CC_BE1#
A_CC_BE0#
D18
U4
T2
T3
V4
B15
1
A_SKT_VCC R7
A_SKT_VCC R13
52-
J19 LEDO#_SKTA_ACTV
E8 IRQ11_SKTB_ACTV
+V3S
1 C1012
2 0.1UF_16V 2 10UF_K_6.3V
GND
GND
GND
GND
GND
GND
GND
C1014 1
R1031 2 100_5%
E1
E2
F3
F1
G5
H6
G3
G2
H2
H1
J1
J2
J3
J6
K1
K2
M5
N2
N1
N3
N6
P1
P3
N5
P6
R2
R3
T1
W4
R6
U5
P7
1 C1011
E11
H3
K5
K18
P2
V15
W5
2
1
55-,54-,37-,51-
A_CAD(31:0)
ACARDVCC
B_CAD(31)
B_CAD(30)
B_CAD(29)
B_CAD(28)
B_CAD(27)
B_CAD(26)
B_CAD(25)
B_CAD(24)
B_CAD(23)
B_CAD(22)
B_CAD(21)
B_CAD(20)
B_CAD(19)
B_CAD(18)
B_CAD(17)
B_CAD(16)
B_CAD(15)
B_CAD(14)
B_CAD(13)
B_CAD(12)
B_CAD(11)
B_CAD(10)
B_CAD(9)
B_CAD(8)
B_CAD(7)
B_CAD(6)
B_CAD(5)
B_CAD(4)
B_CAD(3)
B_CAD(2)
B_CAD(1)
B_CAD(0)
1
52-
A_CAD(31)
A_CAD(30)
A_CAD(29)
A_CAD(28)
A_CAD(27)
A_CAD(26)
A_CAD(25)
A_CAD(24)
A_CAD(23)
A_CAD(22)
A_CAD(21)
A_CAD(20)
A_CAD(19)
A_CAD(18)
A_CAD(17)
A_CAD(16)
A_CAD(15)
A_CAD(14)
A_CAD(13)
A_CAD(12)
A_CAD(11)
A_CAD(10)
A_CAD(9)
A_CAD(8)
A_CAD(7)
A_CAD(6)
A_CAD(5)
A_CAD(4)
A_CAD(3)
A_CAD(2)
A_CAD(1)
A_CAD(0)
C1010
L18
M19
M18
M15
M17
N17
P18
R19
N14
R17
T19
R14
U15
P14
W15
U11
P10
W11
U10
V10
P9
R9
U9
W9
U8
R8
W7
V7
U7
W6
P8
U6
C1009
0.1UF_16V 10UF_10V
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
10UF_10V
2
CORE_VCC R10
CORE_VCC J18
CORE_VCC B10
1 C1022 1 C1025
2
AUX_VCC L15
2
2
F2
J5
M6
P5
1 C1024
2
1
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
C1027 1 C1030
+V3S
CARDBUS CONTROLLER
VER
A02
Model Number
PC8803
Sheet
51
of
67
CN18
+V12
+V5
+V3
ACARDVPP
U1001
15 3.3V_1
16 3.3V_2
17 3.3V_3
1 5V_1
2 5V_2
30 5V_3
7 12V_1
24 12V_2
GRST#
S_DATA
S_CLK
S_LATCH
515151-,4051-
AVPP 8
AVCC_1 9
AVCC_2 10
AVCC_3 11
19 NC
13 NC_1
18 OC#
BCARDVCC
BVCC_1 20
BVCC_2 21
BVCC_3 22
BVPP 23
6 RESET
14 RESET#
3 DATA
4 CLOCK
5 LATCH
ACARDVCC
NC_2
NC_3
NC_4
NC_5
BCARDVPP
25
26
27
28
NC_6 29
GND 12
+V3
1
C1001
1
1 C1002
1 C1006
2 0.1UF_16V2 0.1UF_16V2 4.7UF_K_25V
R1002 2
OPEN
O2_OZ2206_SSOP_30P
1 C1094
2 0.1UF_16V
NOTES: U2055 WILL BE OZ2216S IN THE FEATURE
1 C1096
1 C1097
1
C1004
ACARDVPP
1
1 C1098
2 0.1UF_16V 2 4.7UF_K_25V
ACARDVCC
C1008
2 0.1UF_16V2 0.1UF_16V2 4.7UF_K_25V
51-
A_CCLK
1
1 C289
2 0.1UF_16V
1
C1013
2 4.7UF_K_25V
ACARDVCC
R1131 2
51-,52-
1
A_CREQ#
51-,52-
22K_5%
1 R1130 2
A_CAUDIO
51-,52-
1
A_CDEVSEL#
51-,52-
1
A_CSTOP#
51-,52-
1
A_CPERR#
51-,52-
22K_5%
1 R1137 2
A_CINT#
51-,52-
1
51-,52-
22K_5%
1 R1127 2
A_CSERR#
A_CCLKRUN#
22K_5%
R1129 2
OPEN
R1135 2
22K_5%
R1136 2
22K_5%
R1134 2
22K_5%
A_CAD(6)
A_CAD(5)
A_D14
A_CAD(7)
A_CAD(8)
A_CCBE0#
A_CAD(10)
51515151515151-
A_CAD(9)
A_CVS1
A_CAD(11)
A_CAD(13)
A_CAD(12)
A_CAD(15)
A_CAD(14)
51515151515151-
A_CAD(16)
A_CCBE1#
A_A18
A_CPAR
A_CBLOCK#
A_CPERR#
A_CSTOP#
515151515151-,5251-,52-
A_CGNT#
A_CDEVSEL#
A_CINT#
5151-,5251-,52-
R1132 2
10_5%
1 C1095
2 0.1UF_16V
A_CCD1#
A_CAD(0)
A_CAD(2)
A_CAD(1)
A_CAD(4)
A_CAD(3)
515151515151-
A_CTRDY#
A_CIRDY#
5151-
A_CFRAME#
A_CCBE2#
A_CAD(17)
A_CAD(18)
A_CAD(19)
A_CAD(20)
A_CVS2
51515151515151-
A_CAD(21)
A_CRST#
A_CAD(22)
A_CSERR#
A_CAD(23)
A_CREQ#
A_CAD(24)
51515151-,525151-,5251-
A_CCBE3#
A_CAD(25)
A_CAUDIO
A_CAD(26)
A_CSTSCHG
A_CAD(27)
A_CAD(28)
515151-,5251515151-
BCARDVCC
R1110 2
51-,52-
1
B_CREQ#
51-,52-
22K_5%
1 R1109 2
B_CAUDIO
51-,52-
1
B_CDEVSEL#
51-,52-
1
B_CSTOP#
51-,52-
1
B_CPERR#
51-,52-
1
B_CINT#
51-,52-
1
B_CCLKRUN#
51-,52-
1
B_CSERR#
22K_5%
R1108 2
OPEN
R1113 2
A_CCLKRUN#
51-,52-
A_CAD(29)
A_CAD(30)
A_D2
A_CAD(31)
51515151-
A_CCD2#
51-
22K_5%
R1114 2
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
153
154
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
G14
G15
G16
22K_5%
R1115 2
22K_5%
R1112 2
22K_5%
R1107 2
22K_5%
75
GND9 74
GND10 73
B_CD1# 72
B_D3 71
B_D11 70
B_D4 69
B_D12 68
B_D5 67
GND11 66
B_D13 65
B_D6 64
B_D14 63
B_D7 62
B_D15 61
B_CE1# 60
B_CE2# 59
GND12 58
B_A10 57
B_RFSH 56
B_OE# 55
B_IORD# 54
B_A11 53
B_IOWR# 52
B_A9 51
GND13 50
B_A17 49
B_A8 48
B_A18 47
B_A13 46
B_A19 45
B_A14 44
B_A20 43
GND14 42
B_WE# 41
B_A21 40
A_RDY_BSY# B_RDY_BSY#
39
A_VCC
B_VCC 38
B_NONE 37
A_NONE
A_VPP1_VPP2 B_VPP1_VPP2
36
B_A16 35
A_A16
B_A22 34
A_A22
B_A15 33
A_A15
GND24
GND15 32
B_A23 31
A_A23
B_A12 30
A_A12
B_A24 29
A_A24
B_A7 28
A_A7
B_A25 27
A_A25
B_A6 26
A_A6
A_RFU
B_RFU 25
GND16 24
GND23
B_A5 23
A_A5
A_RESET B_RESET 22
B_A4 21
A_A4
B_WAIT# 20
A_WAIT#
B_A3 19
A_A3
A_INPACK#
B_INPACK#
18
B_A2 17
A_A2
GND17 16
GND21
B_REG# 15
A_REG#
A_A1
B_A1 14
A_BVD2
B_BVD2 13
A_A0
B_A0 12
B_BVD1 11
A_BVD1
B_D0 10
A_D0
B_D8 9
A_D8
GND7
GND18 8
A_D1
B_D1 7
A_D9
B_D9 6
A_D2
B_D2 5
B_D10 4
A_D10
B_WP 3
A_WP
A_CD2#
B_CD2# 2
GND8
GND22 1
GND26
GND19
155
GND27
GND29 156
GND28
GND30 G17
G1
G17 G18
G2
G18 G19
G3
G19 G20
G4
G20 G21
G5
G21 G22
G6
G22 G23
Screw G23 G24
G7
G8
G24 G25
G9 Ground G25 G26
G10
G26 G27
G11
G27 G28
G12
G28 G29
G13
G29 G30
G14
G30 G31
G15
G31 G32
G16
G32
GND1
GND2
A_CD1#
A_D3
A_D11
A_D4
A_D12
A_D5
GND3
A_D13
A_D6
A_D14
A_D7
A_D15
A_CE1#
A_CE2#
GND4
A_A10
A_RFSH
A_OE#
A_IORD#
A_A11
A_IOWR#
A_A9
GND5
A_A17
A_A8
A_A18
A_A13
A_A19
A_A14
A_A20
GND6
A_WE#
A_A21
515151515151-
B_CCD1#
B_CAD(0)
B_CAD(2)
B_CAD(1)
B_CAD(4)
B_CAD(3)
51515151515151-
B_CAD(6)
B_CAD(5)
B_D14
B_CAD(7)
B_CAD(8)
B_CCBE0#
B_CAD(10)
51515151515151-
B_CAD(9)
B_CVS1
B_CAD(11)
B_CAD(13)
B_CAD(12)
B_CAD(15)
B_CAD(14)
51B_CAD(16)
51B_CCBE1#
51B_A18
51B_CPAR
51B_CBLOCK#
51-,52- B_CPERR#
51-,52- B_CSTOP#
BCARDVCC
1
5151-
B_CTRDY#
B_CIRDY#
51515151515151-
B_CFRAME#
B_CCBE2#
B_CAD(17)
B_CAD(18)
B_CAD(19)
B_CAD(20)
B_CVS2
51515151-
B_CAD(29)
B_CAD(30)
B_D2
B_CAD(31)
51-
B_CCD2#
Engineer
INVENTEC
David Du
David Du
R&D CHK
Time Changed
10:57:30 am
QA CHK
Size
TITLE
A3
DIAMOND
MFG ENGR CHK
Thursday, July 31, 2003
B_CCLK
51-,52- B_CCLKRUN#
DOC CTRL CHK
Date Changed
51-
51B_CCBE3#
51B_CAD(25)
51-,52- B_CAUDIO
51B_CAD(26)
51B_CSTSCHG
51B_CAD(27)
51B_CAD(28)
Drawn by
Changed by
R1133 2
10_5%
51B_CAD(21)
51B_CRST#
51B_CAD(22)
51-,52- B_CSERR#
51B_CAD(23)
51-,52- B_CREQ#
51B_CAD(24)
AMP_C97_25852_EMI
EE2
BCARDVPP
51B_CGNT#
51-,52- B_CDEVSEL#
51-,52- B_CINT#
PC CARD SLOT
VER
A02
Model Number
PC8803
Sheet
52
of
67
+V3
VCC_SD
Q1000
4
1
D
S
3
C1017
G
1
2
5
6
FDC638P
1 C1021
1 C1019
1 C1018
2 0.01UF_16V 2 0.01UF_16V
2 10UF_K_6.3V
+V3
2 2.2UF_K_10V
1
R1025
47K_5%
2
+V3
1
SD_PWREN#
51-
VCC_SD
5
U1005
4
3
NC7SZ08M5
2
1
+V3
1
2
1
1
R1029
47K_5%
R1028
47K_5%
2
R1034
47K_5%
2
1
R1007
47K_5%
2
SD_WP
51-
U1004
6
SD_CD#
51-
1
2
2
5
1
2
NC7WZ14
SD_DAT3
SD_CMD
5151-
+V3
SD_CLK
51-
1
13
10
1
2
3
4
5
R1030 2
10_5%
U1004
4
1
R1027 R1033 R1032
47K_5% 47K_5% 47K_5%
2
GND
GND
GND
DAT2
DAT1
DAT0
VSS2
14
11
12
9
8
7
6
515151-
SD_DAT2
SD_DAT1
SD_DAT0
MLX_54786_0991_14P
1 C1028
2 10PF
5
3
2
CN1000
WP
CD
CD_DAT3
CMD
VSS1
VDD
CLK
NC7WZ14
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:35 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
SD CARD CONN
VER
A02
Model Number
PC8803
Sheet
53
of
67
+V3
+V3
+V5S
+V3
1 C1061 1 C1076 1 C1079 1 C1062
2
2
2
LAYOUT NOTES : +V3 15~20 mil
2
0.1UF_16V
0.1UF_16V 0.1UF_16V
0.1UF_16V
1 C1075
1 C1063
2 0.1UF_16V
2 0.1UF_16V
2 0.1UF_16V
2 0.1UF_16V
2 0.1UF_16V 2 0.1UF_16V
55-,51-,37-,54-
2 RING
37-,5459-,51-,42-,40-,37-
PCI_RESET2#_3
Q1009
37-
MPCIGNT0#_3
55-,51-,37-
PCI_PME#_3
1
3
D
NDS7002A
R1072
2
1
S
OPEN
PCI_AD(30)
1
G
2
+V3
R1069
47K_5%
CH_CLK
PCI_AD(28)
PCI_AD(26)
PCI_AD(24)
58-
2
55-,51-,37-,54-
PCI_AD(20)
1
R1111
PCI_AD(22)
PCI_AD(20)
2
100_5%
PCI_AD(18)
PCI_AD(16)
55-,51-,3755-,51-,3755-,51-,3755-,51-,37-
PCI_PAR_3
PCI_FRAME#_3
PCI_TRDY#_3
PCI_STOP#_3
55-,51-,37-
PCI_DEVSEL#_3
PCI_AD(15)
PCI_AD(13)
PCI_AD(11)
PCI_AD(9)
55-,51-,37-
PCI_CBE#(0)
PCI_AD(6)
PCI_AD(4)
PCI_AD(2)
PCI_AD(0)
PHONE
+V3S
1 R1116 2
+V3
10K_5%
1 C1077
1 C1081
CN1001
PCI_AD(31:0)
PIRQF#_3
1 C1080
1 C1078
59-,46-
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
TIP 1
8PMJ-1
8PMJ-3
8PMJ-2
8PMJ-6
8PMJ-7
8PMJ-4
8PMJ-8
8PMJ-5
LED2_YELP
LED1_GRNP
LED2_YELN
LED1_GRNN
RESERVED_0
CHSGND
INTB#
5V_0
INTA#
3.3V_0
RESERVED_1
RESERVED_2
3.3VAUX_0
GROUND_0
RST#
CLK
3.3V_1
GROUND_1
REQ#
GNT#
3.3V_2
GROUND_2
PME#
AD31
RESERVED_3
AD29
AD30
GROUND_3
3.3V_3
AD27
AD25
AD28
RESERVED_4
AD26
AD24
C_BE3#
AD23
IDSEL
GROUND_4
GROUND_5
AD22
AD21
AD20
AD19
PAR
GROUND_6
AD18
AD17
AD16
C_BE2#
IRDY#
GROUND_7
FRAME#
3.3V_4
TRDY#
CLKRUN#
STOP#
SERR#
3.3V_5
GROUND_8
PERR#
DEVSEL#
C_BE1#
GROUND_9
AD15
AD14
AD13
GROUND_10
AD11
AD12
AD10
GROUND_11
AD09
GROUND_12
AD08
C_BE0#
AD07
3.3V_6
AD06
3.3V_7
AD04
AD05
RESERVED_5
AD02
AD03
AD00
RESERVED_WIP5_0
5V_1
RESERVED_WIP5_1
AD01
GROUND_13
GROUND_14
M66EN
AC_SYNC
AC_SDATA_OUT
AC_SDATA_IN
AC_CODEC_ID0#
AC_BIT_CLK
AC_RESET#
AC_CODEC_ID1#
RESERVED_6
MOD_AUDIO_MON
GROUND_15
AUDIO_GND
SYS_AUDIO_IN
SYS_AUDIO_OUT
SYS_AUDIO_IN_GND
SYS_AUDIO_OUT_GND
AUDIO_GND_0
AUDIO_GND_1
RESERVED_7
MPCIACT#
VCC5VA
3.3VAUX_1
146 G2
148 G4
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
5958-,40-
LED_WLAN_LINK
XMIT_OFF#
37-,54-
PIRQF#_3
15CLK_MINIPCI_3R
37-
MPCIREQ0#_3
PCI_AD(31)
PCI_AD(29)
PCI_AD(27)
PCI_AD(25)
58-
CH_DATA
PCI_AD(23)
55-,51-,37-
PCI_AD(21)
PCI_AD(19)
PCI_CBE#(3)
PCI_AD(17)
55-,51-,3755-,51-,37-
PCI_CBE#(2)
PCI_IRDY#_3
59-,55-,51-,42-,40-,3855-,51-,40-,3755-,51-,3755-,51-,37-
CLKRUN#_3
PCI_SERR#_3
PCI_PERR#_3
PCI_CBE#(1)
PCI_AD(14)
PCI_AD(12)
PCI_AD(10)
PCI_AD(8)
PCI_AD(7)
PCI_AD(5)
+V5S
PCI_AD(3)
PCI_AD(1)
45-
MPCI_PWM
45-
A_MPCI_IN
1
R1090
8.2K_5%
2
+V5S
G1 145
G3 147
1 L1002 2
BLM21B121SD
AMP_1318228_1_124P
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:40 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
MINIPCI CONN
VER
A02
Model Number
PC8803
Sheet
54
of
67
+V3S
51-,54-,37-,55-
PCI_AD(0:31)
PCI_CBE#(0:3)
PCI_PAR_3
PIRQE#_3
PCI_RESET1#_3
NICGNT1#_3
NICREQ1#_3
PCI_FRAME#_3
PCI_IRDY#_3
PCI_TRDY#_3
PCI_DEVSEL#_3
PCI_STOP#_3
PCI_PERR#_3
PCI_SERR#_3
R1353
R1354
1
1
2
2
1
R109 2
N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
AD08
AD09
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
54-,51-,37-
PCI_CBE#(0)
PCI_CBE#(1)
PCI_CBE#(2)
PCI_CBE#(3)
54-,51-,371
54-,51-,37-,5515-
PCI_AD(30)
CLK_NICPCI_3R
+V3_LAN
PCI_AD(0)
PCI_AD(1)
PCI_AD(2)
PCI_AD(3)
PCI_AD(4)
PCI_AD(5)
PCI_AD(6)
PCI_AD(7)
PCI_AD(8)
PCI_AD(9)
PCI_AD(10)
PCI_AD(11)
PCI_AD(12)
PCI_AD(13)
PCI_AD(14)
PCI_AD(15)
PCI_AD(16)
PCI_AD(17)
PCI_AD(18)
PCI_AD(19)
PCI_AD(20)
PCI_AD(21)
PCI_AD(22)
PCI_AD(23)
PCI_AD(24)
PCI_AD(25)
PCI_AD(26)
PCI_AD(27)
PCI_AD(28)
PCI_AD(29)
PCI_AD(30)
PCI_AD(31)
U1024
3748-,37-,29-,21373754-,51-,3754-,51-,3754-,51-,3754-,51-,3754-,51-,3754-,51-,3754-,51-,40-,37-
100K_5%
100K_5%
R1357 2
100_5%
M4
CBE0#
L3 CBE1#
F3 CBE2#
C4
CBE3#
J1 PAR
A4 IDSEL
A3 PCI_CLK
H2
C2
J3
C3
F2
F1
G3
H3
H1
J2
A2
INTA#
PCI_RST#
GNT#
REQ#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
A10
SMB_CLK
C9 SMB_DATA
4.7K_5%
R13552
1
J12 VAUX_PRSNT
F4 M66EN
A6
PME#
OPEN
S
D
1
Q1038
G
PCI_PME#_3
3
54-,51-,37-
D1024
1
LAN_ON_3
59-,9-,55-
1N4148
2
R1358
1
2 NDS7002A
2
1M_5%
1 C1356
2 3300PF_50V
J4
CLKRUN#_3
59-,54-,51-,42-,40-,38-
H4
K4
L7
NC_04
CLK_RUN#
NC_06
VDDIO_PCI10
VDDIO_PCI01
VDDIO_PCI03
VDDIO_PCI02
VDDIO_PCI07
VDDIO_PCI08
VDDIO_PCI09
VDDIO_PCI04
VDDIO_PCI05
VDDIO_PCI06
VDDIO_01
VDDIO_02
VDDIO_03
VDDIO_04
A7
E1
P2
G1
C5
N6
E4
B3
K3
L4
1 C1358
1 C1357
1 C108
1 C110
1 C93
1 C1471
1 C317
1 C318
2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V2 10UF_K_6.3V 2 0.1UF_16V 2 0.1UF_16V
+V3_LAN
A11
F11
K12
L12
1 C1398
1 C103
1 C104
1 C1470
1 C319
2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V2 10UF_K_6.3V 2 0.1UF_16V
REGSUP25 B11
C11
REGCTL25
REGSEN25 C10
REGSUP12 B9
REGCTL12 B10
A9
REGSEN12
+V3A
1
GPIO0 H12
GPIO1 K13
J13
GPIO2
1 C73
2 0.1UF_10V
1 C109
2 0.1UF_10V
VESD_1 P1
G2
VESD_2
VESD_3 A1
EEDATA P10
EECLK M10
+V3_LAN
+V3S
R95
2
4.7K_5%
1
R97
R96
1
U1034
2
4.7K_5%
2
1K_5%
5
6 SDA
7 SCL
8 WP
VCC
+V3_LAN
4
GND 3
A2 2
A1 1
A0
Q1037
4
S
3
ATM_AT24C64A_SOIC_8P
D
G
1 L1017 2
BLM21B121SD
1
2
5
6
1
1 C71
FDC638P
L14
NC_01
NC_02 J11
NC_03 L11
MAC_PLLVDD3 P7
MAC_PLL_VSS M6
TCK
TDO
TMS
TRST#
TDI
C12
B12
A12
D11
D12
VSS_01
VSS_02
VSS_21
VSS_19
VSS_22
VSS_20
VSS_23
VSS_24
VSS_25
VSS_04
VSS_03
VSS_13
VSS_14
VSS_15
VSS_05
VSS_06
VSS_07
VSS_08
VSS_09
VSS_10
VSS_11
VSS_12
VSS_18
VSS_16
VSS_17
N1
E2
F8
D8
G8
E8
D9
E9
F9
D4
K2
G6
L6
D7
G4
D5
E5
F5
G5
D6
E6
F6
G7
E7
F7
SO
SI
SCLK
CS#
+V3
TP556
R132 2
OPEN
R133 2
AIRACIN
1
4.7K_5%
AIRACIN2
NC_07
57-,5-
40-
1
R6034 2
1
OPEN
R6033 2
15
4
2
3
2
10UF_K_6.3V
2
1
U1022
2
Q1036
D
4
U1021
TC7S32F
R1350
100_5%
R1352
220K_5%
LAN_ON_3
3
3
G
2
S
2
NC7SZ00M5
1
NDS7002A
0_5%
G11
E10
E11
H11
VDDP_01 P11
VDDP_02 L13
K14
VDDP_03
1 5
1
TP554
TP555
+V3A
59-,9-,55-
1 C1355
1 C72
2 0.1UF_10V 2 0.1UF_10V
+V2.5_LAN
1 C88
1 C87
1 C100
2 0.01UF_16V 2 0.01UF_16V 2 0.1UF_16V
+V2.5L
L1020
1
2
BLM11A601S
Engineer
INVENTEC
David Du
Drawn by
David Du
BCM_BCM5705M_BGA_196P
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:57:45 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
LAN INTERFACE-1
VER
A02
Model Number
PC8803
Sheet
55
of
67
+V_LAN
1 L1021 2
BLM11A601S
1 C1374
1 C102
2 0.1UF_16V 2 0.1UF_16V
+V2.5_LAN
+V1.2L
1 L1016 2
BLM11A601S
1 L1022 2
BLM11A601S
1 C1354
1 C1376
2 0.1UF_16V 2 0.1UF_16V
1 L1026 2
BLM41P800S
+V2.5_LAN
+V_LAN
+V3S
2
1
3
2
4
6
5
7
9
8
10
12
11
TRD0M
TRD0P
TRD1M
TRD1P
TRD2M
TRD2P
TRD3M
TRD3P
+V2.5_LAN
1 L4008 2
BLM11A601S
1 C1353
2 0.1UF_16V
1 C1352
1.18K_1%
1
2
RDAC D10
R134
U9
TCT1
TD1TD1+
TCT2
TD2TD2+
TCT3
TD3TD3+
TCT4
TD4TD4+
24
22
23
21
19
20
18
16
17
15
13
14
MCT1
MX1MX1+
MCT2
MX2MX2+
MCT3
MX3MX3+
MCT4
MX4MX4+
5757-
TDTD+
5757-
RDRD+
5757-
CC+
5757-
DD+
TD+
TDRD+
C+
CRDD+
D-
5757575757575757-
9
1
2
3
4
5
6
7
8
11
CN4
Y1
TX+
TXRX+
P4
P5
RXP7
P8
G1
Y2 10
56-
LED_ACT#
56-
LED_LINK#
G 13
G 14
G2 12
+V3S
AMP_C_1470693_1_RJ45
LANK_LG_2402S_24P
1 C1373
1 C1371
1 C1372
2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V
DC_01
1
1
1
1
2
2
2
2
75_1%
2
1
49.9_1%
R1347
2
1
49.9_1%
R1346
2
1
49.9_1%
R1349
2
1
49.9_1%
R1348
2
49.9_1%
R1375
49.9_1%
R1374
R1377
2
1
75_1%
R130
C8
TRD0M B14
B13
TRD0P
TRD1M C14
C13
TRD1P
TRD2M D14
D13
TRD2P
TRD3M E14
E13
TRD3P
BIASVDD A14
2
1
75_1%
R131
+V2.5_LAN
A13
AVDD_01
AVDD_02 F14
1
R137
1 C1383
1 C90
1 C1382
1 C324
1 C325
1 C1381
2 0.1UF_16V2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V
1
75_1%
R129
1 C107
1 C101
1 C105
1 C323
1 C322
1 C86
2 0.1UF_16V2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V2 0.1UF_16V
AVDDL_01 F12
F13
AVDDL_02
49.9_1%
R1376
C1378
1 C1379
1 C320
1 C321
1 C106
1 C92
1 C91
2 10UF_K_6.3V2 0.1UF_16V2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V2 0.1UF_16V
1
VDDC_03
VDDC_04
VDDC_05
VDDC_06
VDDC_07
VDDC_08
VDDC_09
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_01
VDDC_02
VDDC_24
VDDC_25
49.9_1%
U1024
K5
L5
H6
J6
K6
H7
J7
K7
H8
J8
K8
P8
J9
K9
J10
K10
L10
E12
P12
P13
M14
H5
J5
N14
P14
1 C1370
2 2200PF_2000V
1 C89
2 0.1UF_16V
H10 NC_08
J14 XTALVDD
N11 XTALI
X1002
1
R13851
2
2
200_5%
N10 XTALO
N13 XTAL_VSS
25MHZ
1 C1384
1 C1385
2 27PF
2 27PF
G10
F10
M12
N12
G9
H9
L9
B7
VSS_27
VSS_26
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
MC_16 K11
MC_15 N9
M9
MC_14
4.7K_5%2
1
LOW_PWR M11
R110
MC_12 P9
+V5S
57-,43-,38PREP
U7
MC_11 M8
L8
MC_10
MC_09 N8
1
IXO
+V_LAN
1 C1375
1 C1380
LED_ACT#_R
56-
LED_LINK#_R
56-
2
IXO
VCC
8 IXO
3 IXO
56-
6 IXO
56-
LED_ACT#
7
IXO
1 L1024 2
BLM11A601S
2 0.1UF_16V 2 2.2UF_0805_16V
PLLVDD2 H14
5
IXO
4 GND
IXO
1
2
C70
0.1UF_16V
LED_LINK#
PER_PI5C3306_TSSOP_8P
GPHY_PLL2_VSS M13
LED_LNK#
LED_100#
LED_1000#
LED_ACT#
G13
H13
G12
G14
1
R1378 2
56-
LED_LINK#_R
1
470_5%
R1379 2
56-
LED_ACT#_R
470_5%
+V3S
BCM_BCM5705M_BGA_196P
1
Q1048 5
S1
G1
6
D1
D2 4
3 G2
S2 2
1
R1384 2
10K_5%
5757-
LED_LINK#_R_DUCK
LED_ACT#_R_DUCK
Engineer
INVENTEC
David Du
Drawn by
David Du
NDC7002N
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Wednesday, August 13, 2003
Time Changed
10:36:22 pm
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
LAN INTERFACE-2
VER
A02
Model Number
PC8803
Sheet
56
of
67
+V3
2
+V5
R180
10K_5%
LAYOUT NOTES : 40~60 MIL
2
1
FBM_11_321611_3A
30-
1 G
2 G
1
R179
59-,40-,382
13-
0_5%
R6041 2
R6021
PWR_SWIN#_3
SLP_S3#_5R
1K_5%
PWR_LED_3
1
1
1
1
2
2
2
2
1K_5% 1K_5% 1K_5%
35-,5735-,5735-,57-
DOCK_VSYNC
DOCK_HSYNC
DOCK_DDCCLK
DOCK_DDCDATA
2
30-
2 0_5%
2 0_5%
2 0_5%
2 100PF_50V
35-,57- 1
R_CRT
1
1
1
2
2
2
1 L13 2
R6042 2
30-
0
1 C165
2 18PF
COMP_B
C330
CHROMA_C 1
LUMA_Y
2 100PF_50V
R168
OPEN
G
BLM11B750S
C329
1
KB_DAT_5
KB_CLK_5
EM_DAT_5
EM_CLK_5
SDA_MBAY
SCL_MBAY
35353535-
L9
1 C137
2 18PF
R6022 R6023 R6024
40404040-
R12241
R170 1
R169 1
1
0
R
BLM11B750S
R1223
R178 75_1%
OPEN
B_CRT
G_CRT
R_CRT
5757-
DVIDDCCLK_D
DVIDDCDATA_D
30-
TX2M
30-
TX2P
30-
TX1M
30-
TX1P
30-
TXCM
30-
TXCP
30-
TX0M
30-
TX0P
R284
1
0_5%
2
HPD
30-
D7
1
R285
100K_5%
FAIR_LM431SACMF_3P
2
OPEN
+V5S
+V3S
1
1
R157
2.2K_5%
G
Q1
S
2
DVIDDCCLK_D
D
2
3
DVIDDCCLK
30-
2
R156
4.7K_5%
1
G1
G2
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
35-,57- 1
G_CRT
NDS7002A
DVIDDCDATA
NDS7002A
3
GND
GND
NBSWON#
NC
3V_03
PWRLED
PR_KB_DATA
PR_KB_CLK
PR_MS_DATA
PR_MS_CLK
I2C_DATA
I2C_CLOCK
GND
TV_COMP
TV_CHROMA
TV_LUMA
GND
CRTVS
CRTHS
CRT_DDC_CLK
CRT_DDC_DATA
HPD
AGND
CRT_B
CRT_G
CRT_R
AGND
DVI_DDC_CLK
DVI_DDC_DATA
GND
GND
DVI_D2NC
DVI_D2+
GND
GND
DVI_D1NC
DVI_D1+
GND
GND
DVI_CLKNC
DVI_CLK+
GND
GND
DVI_D0NC
DVI_D0+
GND
GND
DVI_D5NC
DVI_D5+
GND
GND
DVI_D4NC
DVI_D4+
GND
GND
DVI_D3NC
DVI_D3+
GND
GND
NC
NC
NC
GND
DETECT2
RJ45_LILED
RJ45_GND
C+
CRJ45_GND
RJ45_TX+
RJ45_TXRJ45_GND
+V5S
1
5V_03
VA
12V_03
DETECT1
3V_03
VA_ON#
ACIN
GND
PR_CTS
PR_RTS#
PR_DSR#
PR_RI
PR_DCD#
PR_SIN
PR_SOUT
PR_DRT#
GND
PPT_SLIN#
PPT_INIT#
PPT_ERR#
PPT_AFD#
PPT_SLCT
PPT_PE
PPT_BUSY
PPT_ACK#
PPT_STB#
PPT_PD7
PPT_PD6
PPT_PD5
PPT_PD4
PPT_PD3
PPT_PD2
PPT_PD1
PPT_PD0
GND
USBOC4#
USBOC3#
GND
USB4NC
USB4+
GND
USB3NC
USB3+
GND
GND
NC
NC
PR_HPSENSE#
NC
SPDIF
AUDIO_GND
NC
AUDIO_GND
LINEINL
LINEINR
AUDIO_GND
LINEOUTL
LINEOUTR
AUDIO_GND
GND
1394TPBN1
NC
1394TPBP1
GND
1394TPAN1
NC
1394TPAP1
GND
RJ45ACTLED
PREP
RJ45_GND
D+
DRJ45_GND
RJ45_RX+
RJ45_RXRJ45_GND
PWR_LED#_3
S
1 C6025
0.01UF_16V
2
C6030 100PF_50V
1 2
CN1004
P1
100PF_50V P2
A1
0.1UF_25V
2 1K_5%
A2
R1220 1
A3
A4
A5
55-,5AIRACIN
A6
A7
SCTS_3R
43A8
43-,42SRTS_3
A9
SDSR#_3R
43A10
RI#_3R
43A11
SDCD#_3R
43A12
SRXD_3R
43A13
43-,42STXD_3
A14
43-,42SDTR#_3
A15
A16
44-,42SLCTIN#_5
A17
44-,42PINIT#_5
A18
ERROR#_5
44-,42A19
44-,42ALF#_5
A20
SLCT_5
44-,42A21
PE_5
44-,42A22
BUSY_5
44-,42A23
PDATA(7:0)
ACK#_5
44-,42A24
44-,4244-,42STRB#_5
A25
PDATA(7)
A26
PDATA(6)
A27
PDATA(5)
A28
PDATA(4)
A29
PDATA(3)
A30
PDATA(2)
A31
PDATA(1)
A32
PDATA(0)
A33
A34
A35
1 C1329 1 C1331 1 C161 1 C159 1 C163 1 C1320 1 C1318 1 C158 1 C169
A36
A37
382 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
USB_PN2
A38
A39
38USB_PP2
1 C1328 1 C155 1 C160 1 C164 1 C162 1 C1317 1 C166 1 C1319
A40
A41
382 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
2 33PF_50V
USB_PN3
A42
A43
38USB_PP3
A44
A45
C1330 100PF_50V
A46
C1335 100PF_50V
A47
1 2
A48
471 2
PR_HPSENSE#
A49
38MBAY_DISABLE
A50
45SPDIF
A51
C1334
A52
1 2
A53
OPEN
A54
45LINEINL
A55
45LINEINR
A56
A57
1 C1337PR_AOUTL
47A58
PR_AOUTR
47A59
2 OPEN
1 C1336
A60
1 C1338
A61
2 100PF_50V
A62
2 100PF_50V
A63
A64
A65
A66
1 R154 2
A67
A68
1K_5%
A69
56LED_ACT#_R_DUCK
A70
PREP
56-,43-,38A71
A72
56D+
A73
56DA74
56A75
RD+
56A76
RDA77
B
BLM11B750S
1
301
R158
4.7K_5%
DVIDDCDATA_D
D
1
2
2 0.1UF_16V
S
C172
1
2
C328
+V3
2G
+VADPTR
2
K
2
0.01UF_16V
+V12
L8
1 C138
2
18PF
Q3
NDS7002A
G 2
3D
1 C170
2 1UF_10V
1
A
1 C6026
+V5
R6040 2
0
PWR_LED_3
1 C171
+V3
35-,57- 1
B_CRT
1
R
L15
Q2
1
R159
2.2K_5%
2
2
+V3S
+V5S
+V5
R141
1
2 1K_5%
565656-
C+
C-
5656-
TD+
TD-
LED_LINK#_R_DUCK
1 C6027
2 100PF_50V
G 3
G 4
Engineer
JAE_WD_154S4VH_VF_154P
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, August 21, 2003
Time Changed
11:41:59 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
PORT PARALLER
VER
Model Number
A02 PC8803
Sheet
57
of
67
+V3
+V3
+V3S
BLUETOOTH_VCC
1
R275
10K_5%
1
R1056
100K_5%
2
XMIT_OFF#
54-,40-
2
Q14
4
Q1006 3
D
2G
S
NDS7002A 1
1
R276
2
S
3
D
G
220K_5%
1
2
5
6
1 C304
C305 1
2 10UF_K_6.3V
FDC638P
2
0.1UF_16V
ADD NOTES : 32 AWG MUST BE USED FOR THE CABLE
CN21
USB_PP4
38-
USB_PN4
38-
L1001
1
1
2
3
4
5
6
7
8
2
4
3
DLW21SN900SQ2L
1
2
3
4
5
6
7
8
G 9
G 10
JST_FM_SM8B_SRSS_TB_8P
BLUETOOTH_LED
59-
CH_DATA
54-
1
R1057 2 100_5%
CH_CLK
54-
1
R1058 2 100_5%
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:02 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
BLUETOOTH
VER
A02
Model Number
PC8803
Sheet
58
of
67
+V5S
+V3A
LID SWITCH
+V3A
38-
+V3S
LID_SW#_3
D3
41-,40-,5941-,40-,59-
SCAN_OUT(1)
SCAN_IN(7)
1
L7
1
2
BLM11B141S
3
BAV99
SDATA_OUT_ICH
CODEC_RST#_ICH
+V3A
SCAN_OUT(3)
1
1
3
41-
KSCAN_IN(5)
2
R153
CLKRUN#_3
SERIRQ_3
2
41-,4055-,54-,51-,42-,40-,3851-,42-,40-,37-
15CLK_FWHPCI_3R
42-,40-,38LPC_AD(0)
LPC_AD(1)42-,40-,3842-,40-,38LPC_AD(2)
42-,40-,38LPC_AD(3)
LPC_FRAME#_342-,40-,38- 41-
100K_1%
1 C136
2 0.1UF_16V
2
45-,3845-,38-
FRAME_SYNC_ICH 45-,3838SDATA_IN1_ICH
45AC97_BIT_CLK
SW1
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
KSCAN_IN(1)
+V5A
PWR_GOOD_3
SW_DT006_PT11ABH_E
SCAN_OUT(8)
40-,30-,14-,1141-,40-
+V1.8S
3A_120mil
+V1.2L
4A_160mil
1
2
3
4
H_INIT#
5
11MCH_GOOD
6
7
8
55-,9LAN_ON_3
47-,45-,40-,38-,13-,12-,9-,7- 9
SLP_S3#_3R
10
54-,46PHONE
11
42-,40-,38-,30SUS_STAT#_3
12
38LPC_DRQ1#
13
CN23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
25
C326
26
68UF_4V_METAL
27
28
29
30
31
32
33
34
35
36
37 G 41
38 G 42
39
40
54-,51-,42-,40-,37383837-,16-
PCI_RESET2#_3
FWH_WP#_3
FWH_TBL#_3
57-,40-,38PWR_SWIN#_3
40404057-,40-,59-
NUM_LED#_3
CAPS_LED#_3
SCROLL_LED#_3
PWR_LED#_3
+VCCP
3A_120mil
+VBATR
4A_160mil
+V1.5A
3A_120mil
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
CN22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37 G 41
38 G 42
39
40
MLX_53643_0404_40P
MLX_53643_0404_40P
1 C327
+V3S
C1292
C1294
0.1UF_16V
0.1UF_16V
1
2
1
2
PWR_LED#_3
BAT_LED#_3
HDDASP#_5
LED_WLAN_LINK
EAPD
BLUETOOTH_LED
MBLED#_3
VOL_UP
VOL_DN
SCAN_IN(7)
IR_TX_3
IR_RX_3
IR_SD_3
SCAN_OUT(1)
+V3A
68UF_4V_METAL
1 C1293
2
57-,40-,5940485447-,455848-
4040-
41-,40-,5942424241-,40-,59-
0.1UF_16V 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CN12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 G
16 G
17 G
18 G
19
20
RTCBAT
CN6002
1 1
G 3
2 2
G 4
JST_BM2B_SRSS
21
22
23
24
MLX_52559_2092_20P
FIX2
FIX1
S5
S6
S14
S13
S18
S19
S26
SCREW2.8_6_7_5P
S7
SCREW2.8_6_7_5P
S8
SCREW2.8_6_7_5P
SCREW2.8_6_5P
S15
FIX_MASK
FIX3
SCREW2.8_6_5P SCREW2.8_6_5P
SCREW2.8_8_5P
S20
S21
SMDPAD3UM_5_1P
SCREW2.8_6_7_5P
FIX_MASK
FIX6
FIX_MASK
SCREW2.8_6_7_5P
FIX_MASK
SCREW2.8_6_5P SCREW2.8_6_5P
S9
S1
S3
Engineer
PAD1004
1 1
SMDPAD3UM_5_1P
FIX4
FIX_MASK
FIX5
PAD1003
1 1
SCREW2.8_6_7_5P
FIX_MASK
S16
S11
SCREW2.8_6_7_5P
S12
SCREW2.8_6_7_5P
INVENTEC
David Du
Drawn by
David Du
R&D CHK
SCREW2.8_8_5P
SCREW2.8_6_7_5P
S17
SCREW2.8_6.5_8_5PSCREW2.8_6.5_8_5P
S2
SCREW2.8_8_5P
Changed by
EE2
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:07 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
MFG ENGR CHK
SCREW2.8_6.5_8_5P
Size
TITLE
SWITCH BUTTON & LED
VER
A02
Model Number
PC8803
Sheet
59
of
67
+V3S_BN
1
R4020
0_5%
(15/5)
2
C4019 1
1 C4018
2
1 C4017
2 0.01UF 2 0.01UF
1
R4024
0_5%
FWH_VPP_BN
4.7UF_K_6.3V
2
C4031
1 C4029
1
2
0.1UF_16V
4.7UF_K_6.3V
2
1 C4030
FWH_WP#_3_BN
FWH_TBL#_3_BN
FWH_INIT#_3_BN
CLK_FWHPCI_3R_BN
63-,6263636363-,62-
2
7
8
18
24
29
31
CLK4/20
RST#
WP#
TBL#
CLKRUN#
INIT#
IC
CLK
2
19 FDIS
20 DPPO
21 RFU
63-,62-
LPC_AD_BN(0)
LPC_AD_BN(1)
LPC_AD_BN(2)
LPC_AD_BN(3)
FGPI0
FGPI1
FGPI2
FGPI3
FGPI4
6
5
4
3
30
ID0
ID1
ID2
ID3
12
11
10
9
POWER15/5
1
1
R4044
OPEN
LPC_FRAME#_3_BN
FWH5 22
1
R4021
OPEN
63-,6263-,6263-,6263-,62-
FWH4 23
1 VPP
2 0.1UF_16V
0.1UF_16V
PCI_RESET2#_3_BN
+V3S_BN
AMP_C822273-1_SOKT_32P
FWH0 13
FWH1 14
FWH2 15
FWH3 17
GND1
16 GND2
26 GND3
28
C4028 1
CN4002
25 VCC1
32 VCC2
27 VCCA
2
1
R4038
OPEN
R4039
OPEN
2
2
2
PCBREV0
PCBREV1
PCBREV2
R4035 1
R40231
2 100_5%
2 100_5%
1
LEGACY_FRE_EN#
1
R4043
100_5%
2
FHW ON BUTTON DAUGHTER BOARD
2
Engineer
Drawn by
David Du
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:37 am
QA CHK
A3
DIAMOND
MFG ENGR CHK
Changed by
Size
TITLE
DOC CTRL CHK
EE2
R4036
100_5%
2
INVENTEC
David Du
R&D CHK
1
R4037
100_5%
FHW
VER
A02
Model Number
PC8803
Sheet
60
of
67
+V3S_BN
POWER15/5
1
L4002
2
BLM41P800S
C4023
1
10UF_6.3V
1 C4022
2 0.1UF_16V
+V3S_BN
1 C4013
2 0.1UF_16V
SDATA_OUT_ICH_BN
CODEC_RST#_ICH_BN
6363-
R4009
1
2 33_5%
CN4003
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
AUDIO_PWRDN
MONO_OUT_PC_BEEP
MONO_PHONE
GND
AUXA_RIGHT
RESERVED
AUXA_LEFT
GND
5VMAIN
CD_GND
CD_RIGHT
RESERVED
CD_LEFT
RESERVED
PRIMARY_DN
GND
3.3VAUX
5VD
GND
GND
SYNC
3.3VMAIN
SDATA_OUT
SDATA_INB
RESET#
SDATA_INA
GND
GND
MSTRCLK
BITCLK
31 G1
33 G3
35 G5
G2
G4
G6
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
63-
AUDIO4/12
+V5S_BN
PHONE_BN
1 C4048
2 0.1UF_16V
63-
FRAME_SYNC_ICH_BN
R4048 1
2
33_5%
63-
SDATA_IN1_ICH_BN
R4049 1
2
33_5%
63-
AC97_BIT_CLK_BN
32
34
36
1 C4042
AMP_3_179397_5_30P+6G
2 OPEN
MDC CONN
MDC CONN ON BUTTON DAUGHTER BOARD
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:42 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
MDC CONN
VER
A02
Model Number
PC8803
Sheet
61
of
67
+V3S_BN
+V3S_BN
POWER15/5
C4034 1
1
R4046
10K_5%
CLK_FWHPCI_3R_BN
LPC_DRQ1#_BN
63-
SERIRQ_3_BN
63-
2
SUS_STAT#_3_BN
63-
1
R4045 2
OPEN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
63-,60-
4.7UF_K_6.3V 2
LPC_AD_BN(0)
63-,60-
LPC_AD_BN(1)
CLKRUN#_3_BN
LPC_AD_BN(2)
63-,606363-,60-
LPC_AD_BN(3)
63-,60-
LPC_FRAME#_3_BN
63-,60-
PCI_RESET2#_3_BN
63-,60-
1
R4047 2 OPEN
CN4000
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19 25
20 26
21 27
22 28
23 29
24 30
25
26
27
28
29
30
ACES_88028_2400_24P
AMP 20PIN CONNECTOR
MOTHERBOARD SIDE
ACES_88028_2400
TCPA CONN ON BUTTON DAUGHTER BOARD
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:47 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
TCPA
VER
A02
Model Number
PC8803
Sheet
62
of
67
+V3S_BN
1
+V3A_BN
R4018
330_5%
1
R4016
1.3K_1%
1 R4011
2100K_5%
63-
PWR_SWIN#_3_BN
2
2
60-
FWH_INIT#_3_BN
3
2
C
B
+V3S_BN
Q4002
E
1
2
SW4003
C4014
2
1000PF_J_50V
+V3A_BN
3
2
H_INIT#_BN
63-
R4015 2
1
330_5%
1
SST3904 1
+V3S_BN
C4047
2
0.1UF_16V
1
2
C4045
0.1UF_16V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
63636161-
63-
KSCAN_IN_BN(5)
61616163SCAN_OUT_BN(3)
62CLKRUN#_3_BN
62SERIRQ_3_BN
62-,60CLK_FWHPCI_3R_BN
62-,60LPC_AD_BN(0)
62-,60LPC_AD_BN(1)
LPC_AD_BN(2) 62-,60LPC_AD_BN(3) 62-,6062-,60-
FRAME_SYNC_ICH_BN
SDATA_IN1_ICH_BN
AC97_BIT_CLK_BN
LPC_FRAME#_3_BN
63-
KSCAN_IN_BN(1)
+V5A_BN
PWR_GOOD_3_BN
10-
63-
SCAN_OUT_BN(8)
1
P2
63-
KSCAN_IN_BN(5)
63-
SCAN_IN_BN(7)
+V1.8S_BN
INTERNAL
SWTT_TC003_PS11AT_A
SCAN_OUT_BN(8)
63-
2
SW4000
1
+V1.2L_BN
P1
SWTT_TC003_PS11AT_A
E-MAIL
S4
C4046
CN4004 0.1UF_16V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37 G 41
38 G 42
39
40
SCROLL_LED#_3_BN
SCAN_OUT_BN(3)
63-
P3
1
63-
KSCAN_IN_BN(1)
SERCH
SCREW2.8_6_5P
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
62-,60606063-
PCI_RESET2#_3_BN
FWH_WP#_3_BN
FWH_TBL#_3_BN
H_INIT#_BN
MCH_GOOD_BN
10-
1010-,8616262-
LAN_ON_3_BN
SLP_S3#_3R_BN
PHONE_BN
SUS_STAT#_3_BN
LPC_DRQ1#_BN
63636363-
PWR_SWIN#_3_BN
NUM_LED#_3_BN
CAPS_LED#_3_BN
SCROLL_LED#_3_BN
PWR_LED#_3_BN
+VCCP_BN
+VBATP_BN
+V1.5A_BN
CN4005
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37 G 41
38 G 42
39
40
MLX_52885_0404_40P
MLX_52885_0404_40P
S23
FIX9
FIX_MASK
SCREW2.8_6_5P
S25
FIX8
SWTT_TC003_PS11AT_A
S22
1
1
FIX7
SW4002
2
DSLED_CL150YG 1 R4012 2
2
270_5%
D4001
63-
+V3A_BN
1
SDATA_OUT_ICH_BN
CODEC_RST#_ICH_BN
63-
DSLED_CL150YG 1 R4013 2
2
270_5%
1
+V5S_BN
SCAN_OUT_BN(1)
SCAN_IN_BN(7)
SCAN_OUT_BN(1)
1
D4002
63CAPS_LED#_3_BN
D4000
BAV99
SW4001
2
NUM_LED#_3_BN
E
SWTT_TC003_PS11AT_A
1
DSLED_CL150YG 1 R4014 2
2
270_5%
D4003
63-
1
SST3904
Q4001 3
2B C
S24
FIX_MASK
FIX_MASK
FIX11
FIX_MASK
FIX10
FIX12
FIX_MASK
FIX_MASK
SCREW3.3_5_5P
SCREW2_6_5P
SCREW2_6_5P
Engineer
INVENTEC
David Du
SWITCH & CONN & LED ON BUTTON DAUGHTER BOARD
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:58:55 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
CONN & SWITCH & LED
VER
A02
Model Number
PC8803
Sheet
63
of
67
+V3A_LD
+V3S_LD
1
R6000
2
47_5%
R6008 2
2G
D
BSS84 3
Q6002
270_5%
DSLED_CL150YG
FIX13
FIX16
DSLED_CL150YG
D6007
FIX14
R6013
270_5%
64-
2G
D
BSS84 3
Q6004
LEDBOARD_GND
FIX_MASK
LEDBOARD_GND
FIX18
FIX15
FIX_MASK
+V3S_LD
LEDBOARD_GND
D6006
1
2
DSLED_CL150YG
LEDBOARD_GND
D6001
+V3A_LD
100K_1%
2
LEDBOARD_GND
1
64-
VOL_DN_LD
2
1
R6002
SW6000
2
47_5%
+V3A_LD
BAV99
3
NDC7002N
64-
BLUETOOTH_LED_LD
D6004
1
2
CL_150TY_LED
1
R6003
270_5%
Q6000 5
S1
1
G1
6
D1
D2 4
3 G2
S2 2
R6001
1
2 C6001
0.1UF_16V
LEDBOARD_GND
R6007 2
2
270_5%
1
TC010-PS11CET_B
1
D6002
R6005
100K_1%
LEDBOARD_GND
2
+V3S_LD
1
LEDBOARD_GND
2
1
4
5
3
64-
SML011BBT
64-
TC010-PS11CET_B
2
LED_WLAN_LINK_LD
BAT_LED#_3_LD
1
D6000
2
270_5%
2
BAV99
1
2 C6000
SW6001
0.1UF_16V
LEDBOARD_GND
FIX_MASK
R6012 2
FIX_MASK
FIX17
FIX_MASK
1
1
S
1
3
2
FIX_MASK
+V3S_LD
HDDASP#_3_LD
+V3A_LD
64-
MBLED#_3_LD
1
1
2
1
D6003
1
64-
PWR_LED#_3_LD
1
4
5
3
S
1
64-
2
VOL_UP_LD
LEDBOARD_GND
+V3A_LD
1 C6007
1 C6006
2
2
0.1UF_16V
0.1UF_16V
1
LEDBOARD_GND
LED_WLAN_LINK_LD
EAPD_LD
BLUETOOTH_LED_LD
MBLED#_3_LD
VOL_UP_LD
VOL_DN_LD
SCAN_IN_LD(7)
IR_TX_3_LD
IR_RX_3_LD
IR_SD_3_LD
SCAN_OUT_LD(1)
64646464646464-
646464-
64646464-
R6010 2
+V3S_LD
47K_5%
LEDBOARD_GND
PWR_LED#_3_LD
BAT_LED#_3_LD
HDDASP#_3_LD
LEDBOARD_GND
LEDBOARD_GND
1 C6008
2 0.1UF_16V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
CN6000
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 G
16 G
17 G
18 G
19
20
+V3S_LD
(15/5)
SW6002
SCAN_OUT_LD(1)
64-
1
2
3
4
64-
ALPS_SKQHFSE010_4P
1
R6004 2
270_5%
IR_TX_3_LD
IR_RX_3_LD
6464-
IR_SD_3_LD
64-
D6005
10
LEDA
9
TXD
8
RXD
3 FIR_SEL
5
MD1
4
MD0
EAPD_LD
2G
64-
D
NDS7002A
1
7
2
6
11
1 C6005
1 C6003
2
2
0.47UF_16V
1 C6004
2
4.7UF_K_6.3V
1 C6002
2 10UF_K_6.3V
0.1UF_16V
LEDBOARD_GND
1
1
R6009
4.7K_5%
R6006
MLX_52559_2092_20P
VCC
GND
AGND
NC
GND
3
S
1
(15/5)
R6011 2
HSDL_3600_008
Q6001
21
22
23
24
1
2.7_2010_1/2W
SCAN_IN_LD(7)
IR
2
100K_1%
2
LEDBOARD_GND
LEDBOARD_GND
LEDBOARD_GND
LEDBOARD_GND
LEDBOARD_GND
Engineer
LED & VOL BUTTON ON LED DAUGHTER BOARD
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:59:01 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
LED & VOL BUTTON
VER
A02
Model Number
PC8803
Sheet
64
of
67
SHEET 10
SHEET 50
1. Change CN2068 for mechanical
SHEET 31
1.R1096 change from 10K to 200K and add CAP (0.01UF) to GND
NOTE: For ATI power sequence
SHEET 56
1. Change CN2062 point name
SHEET 11
NOTE: Modify LAN signal to right
1. CHANGE C1982 C1983 TO 10 PF THESE TWO CAPACITORS VALUSE CAN BE TUNED
2. ADD SERIES RESISTORS R237 R238 ON EACHOF THE TWO SIGNAL (DIMB_0 DIMB_1 )
MAKE A NOTE TO ONLY INSTALL THESE RESISTORS FOR ELPIDA MEMORY
1. Add PM_VGATE DELAY CIRCUIT: U18, D23, R156, C90, C107
2. Add CAP (0.1UF) in R2024 pin1 to GND
SHEET 63
SHEET 32
1.Change SW4 for mechanical
1. ADD L21 TO POWER PIN( P8, Y8, AC11,AC20,Y23, L23,H20,H11)
MAKE A NOTES: THIS RAIL HAVE JUMPER TO SWITCH FOR +V1.5S FOR M10 , +V1.8S FOR M9+X
NOTE: For PCI_RESET, PCI_CLOCK , PM_VGATE TIMING
SHEET 12
1. Del PAD2 , PAD515 and to short power
SHEET 64
1.Change D21 for mechanical
SHEET 33
1. CHANGE THE TITLE , THESE IS A TYPO" VEDIO". IT SHOULD BE " VIDEO"
CHANGE LIST FEBRUARY 12
SHEET 13
SHEET 11
1. R1122 change from 220K to 100K and add CAP(0.1UF) in R1122 pin1 to GND
2. Add CAP (OPEN) in Q25 pin3 to GND
2.CHANGE R1061 TO OPEN(REF.RUBY)
CHANGE LIST FEBRUARY 17
1.Change C65 TO CONNECTED TO PIN2 OF R2024(REF.RUBY)
SHEET 32
NOTE: For ATI power sequence
SHEET 29
SHEET 13
1. OPEN L12 AND L21 PUT BLM21A121S TO USED M9+X +V1.8S
1.CHANGE R1122 FROM 220K TO 100K (REF.RUBY)
SHEET 42
1. Add SERIES RESISTORS on SB_STBS(R208), ADSTBS_0(R211), ADSTBS_1(R212)
SHEET 29
1. OPEN L12 AND L21 PUT BLM21A12. CHANGE SIGNAL NAME R252 PIN2 FROM PCI_RESET TO NPCI_RESET
2. Add SERIES RESISTORS DBI_LO(R198), DBI_HI(R197)
1. ADD NOTE TO M9+X , M10 R153, R154 USED OR NOT
CHANGE LIST FEBRUARY 20
3. Change R72 from 10K to 20K
2. Change AGPTEST DBI_LO & DBI_HI TO +V1.5ATIAGP RAIL TO MATCH RUBY
4.Add TEST POINT in GPIO(4:7) GPIO(9:14)
SHEET 30
5. Add 1K pull down on GPIO8
1.OPEN R2102 TO MATCH RUBY SCH (REF.RUBY)
2.ADD NOTE : R687&R1766 FOR M9+X OR M10 USED
3. ADD 10K PULL-UP +V3S TO AUXWIN PIN AF26 (REF.RUBY)
6. Add 1K pull down RESISTOR to prvent leakage for some ZV_LCDDATA, ZV_LCDCNTL pin
SHEET 11
1. U2010 PIN2(TON) TO ADD RESISTOR (OPEN) THEN PULL UP TO +VCCP
SHEET 13
(ZV_LCDDATA(5:15), (18:19), ZV_LCDCNTL(0:3) )
SHEET 32
7. Add 10K pull down RESISTOR to prevent leakage for ZV_LCDDATA(16:17)
1.ADD L20 NFM41P11C204 TO MATCH RUBY SCH (REF.RUBY)
2.CHANGE L19,L1062, L1056, L1063, L1064, L1059,&L1060 TO MATCH RUBY SCH (REF.RUBY)
3.CHANGE L5/L4,&L12 TO MATCH RUBY SCH(REF.RUBY)
NOTE: Above items for ATI recommed
8. R153,R154, change form 1K to 3K
1. CHANGE C66 VAULE FROM 22UF TO 68UF
2. ADD THE CAP 10UF C91 PIN1 TO LINK Q26 (PIN1,2,5,6) C91 PIN2 TO GND
SHEET 30
20
NOTE: For +V3S power rail ( ATI- VREFG)
1. CHANGE U2019 , U2329 FROM ADM1032 TO ADM1031 TWO PACKAGE THERMAL MONITOR
9. Add SERIES RESISTORS STOP(R192) DEVSEL(R199) TRDY(R200) IRDY(R217) FRAME(R216)
SHEET 38
10. Add SERIES RESISTORS WBF(R205) RBF(R215) AD_STBF_0(R202) AD_STBF_1(R203) SB_STBF(R204)
1. CHANGE GPIO42 TO VMEM_CFG3 AND PULL UP TO +V3S & 8.2K TO GROUNDTO MATCH RUBY SCH (REF.RUBY)
11. R189 , R190 PIN2 TO GND
2. ADD INVERTER BETWEEN PIN H22 (GPIO39) AND U2038 (PIN26) TO MATCH RUBY SCH (REF.RUBY)
12. R72 PIN 1 TO LINK +V3S
CHANGE LIST FEBRUARY 21
SHEET 50
SHEET 30
54
SHEET 20
1.CHANGE USB POWER FROM +V5A TO +V5 TO MATCH RUBY SCH(REF.RUBY)
1. Add 0 OHM series resistor on the path of osc output to X’TAL and XTALOUT
1. ADD THE BLUETOOTH SIGNAL AT CN1020 PIN43(CH_DATA) , PIN36(CH_CLK)
NOTE: Select frequency enter chalnnel
SHEET 56
20
CHANGE LIST FEBRUARY 14
SHEET 29,30, 31, 32
SHEET 33
1. Change for ATI M9+X , M10 dual footprint schematic
1. CHANGE DEPEND RESISTORS PACKAGE TO LAYOUT ROUTES
2. REMOVE C1671 C1673 C1674 C1675 THEN C1672 PIN2 CHAISY GND CHANGE TO DIGITAL GND
SHEET 58
SHEET 36
1. Add R219 TO JUMP M10 OR M9+X
SHEET 38
1. U509 -V19 (PM_VGATE/VRMPWRGD) change from PM_VGATE to SB_VGATE
2. Add U509 GPIO42 resistors R236 pull up +V3S and R237 pull down to GND
1. ADD TWO SIGNAL AT CN1036 PIN6(CH_DATA) , PIN7(CH_CLK) THEN ADD TWO SERIES RESISTORS
100 OHM TO THESE PIN
CHANGE LIST FEBRUARY 15
SHEET 10
CHANGE LIST FEBRUARY 23
1. ADD U22 SCHMITT BUFFER FROM PIN2 R1096
1. ADD RESISTOR 100K PULL UP TO +V3S ANOTHER PIN TO LINK Q53 PIN2(XMIT_OFF#)
AFTER THE RC CIRCUIT TO PIN10 OF U2008
NOTE: To chose memory type
SHEET 29
CHANGE LIST FEBRUARY 27
SHEET 41
1. Rotate CN8 (the touch-pad conect):180 point of view and pin5,6 link to GND, pin7,8 link to CN7 pin3 1. MAKE A NOTE R1957 R1958 TO INSTALL M9+X OR M10 BE USED
2. MAKE A NOTE R1956 TO INSTALL M9+X OR M10 BE USED
2. Change CN7 (stick point) geoetric ( layout pattern)
SHEET 22
20
1. ADD BYPASS CAPACITORS C308, C309, C310 (220P)
SHEET 49
SHEET 25 26
1. Change R155 from 10K to 100K
1. ADD BYPASS CAPACITORS , C311, C313 (150UF)
Engineer
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:59:06 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
CHANGE LIST
VER
A02
Model Number
PC8803
Sheet
65
of
67
FOR SI SCHEMATIC CHANGE
2003/03/30 update
2003/03/24 update
SHEET 17
1. FOR PSI# PULL HIGH +VCCP TO OPEN R1089
SHEET 38
SHEET 31 & 34
SHEET 5
1. ADD R6021 RESISTOR OPEN TO MODIFY OCP
1. ADD DDR_CSB1# SIGNAL FOR 8M*32 VRAN USED
AND ADD R6016 RESISTOR DEPEND TO LINK U1018 & U1019 PIN M4
SHEET 33
1. REMOVE PWM_GOOD_3 SIGNAL DELETE R1419
SHEET 40
1. R1049 FOR PCI_SERR#_3 PULL DOWN TO OPEN
2. KBC INITIAL NEED TO PULL DOWN 100K RESISTOR R1
3. ADD U4004 , D6008 , R6014 , C6011 , C6012 THIS CIRCUIT TO FINE_TUNE POWER ON SEQUENCE TIME
SHEET 41
1. RNET FOR KAHUNA PROGRAMMING. NEED ONLY FOR FLASH RECOVERY SATURATION
SHEET 50
1. REMOVE USB_OC#0 U2 , U3 PIN_2 TO OPEN
2. U2 , U3 PIN_1(EN) CONNECT +5V
3. U2 , U3 PIN_5 CONNECT +V5A
4. REMOVE L3 AND TO SHORT
SHEET5
1. CHANGE THE VALUE OF SERIAL TERMINATION RESISTORS ON THE DATA ,
DQM AND QS LINES TO 22-OHMS
1.CHANGE R1068 VALUE FROM 150K TO 10K AND R1070 VALUE
FROM 20K TO 1.3K FOR AC DETECT LEVEL
SHEET 34
SHEET15
1. CHANGE THE VALUE OF SERIAL TERMINATION RESISTOR OF QS LINE TO 22-HHMS
1.CHANGE R6015 VALUE FROM OPEN TO 33 AND R1361 VALUE
CHANGE TO OPEN FOR AC’97 FRQUENCE CHANGE 14.318MHZ
SHEET 40
SHEET42
1. R105 SHOULD BE OPEN TO FINE TUNE KBC POWER UP SEQUENTIAL
1.CHANGE R126 VALUE TO 0 AND R125 VALUE CHANGE
FROM 0 TO OPEN FOR SUPER I/O USED_NPCI_RESET
SHEET 55
SHEET44
1. ADD TWO 0.1uF DECAPS C6018 AND C6019 TO +V3S RAIL
2. ADD 0.1uF DECAPS C6019 TO +V3_LAN
1.CHANGE R1165_PIN-1 VOLTAGE FROM +5VA TO +V5
SHEET 56
SHEET45
1.CHANGE R1460 FROM OPEN TO 1K FOR AC’97 CHOOSE FRQUENCE
SHEET 52
1. REMOVE R1126 , R1128 TO A_CCLKRUN# , B_CCLKRUN# SIGNAL PULL UP REPEAT
SHEET 64
1. ADD Q6004 TO PREVENT THE CURRENT FROM D6006 INTO HDDLED LOGIC OUTPUT
2003/03/26 update
2003/04/03 update
SHEET13
SHEET 45
1. CHANGE P MOS Q1041 , Q1046 , Q10 , Q11 HIGH CURRENT AND LOW RDS ON
SHEET36
SHEET 15
1. ADD R6013 RESISTOR OPEN TO JUMP CLK_SIO14_3R & ADI48M
SHEET 40
1. REMOVE R1409 , D1028 AND TO SHORT PCI_SERR#_3
SHEET 46
SHEET 50
1. ISOLATE PHONE USING A 2N7002 WITH DRAIN CONNECTED TO +V3S THROUGH A 10K PULL-UP ,
SOURCE TO GROUND , & GATE TO PHONE . PIN 1 OF C24 SHOULD BE CONNECTED TO DRAIN OF 2N7002 ,
WHICH FEEDS THE AUX INPUT OF CODEC
1. REMOVE L2 AND TO SHORT
SHEET 40
SHEET 52
SHEET 47 , 64
1. CHANGE R1132 , R1133 FROM 47 OHM TO 22 OHM FOR A_CCLK & B_CCLK TIMING
1. CHANGING FDD ACTIVITY LED TO MULTI-BAY ACTIVITY LED
AND HDD ACTIVITY LED TO JUST THE FIXED HDD
1. ADD C6013 18P CAPICATOR BYPASS TO LOW_BAT#_3 THIS SIGNAL
SHEET 55
2003/03/19 update
1. ISOLATE PCSPKB_3 USING A 2N7002 WITH DRAIN CONNECTED TO +V3S THROUGH A 10K PULL-UP ,
SOURCE TO GROUND , & GATE TO PCSPKB_3 . PIN 2 OF C28 SHOULD BE CONNECTED TO DRAIN OF 2N7002 ,
WHICH FEEDS THE AUX INPUT OF CODEC
2. ISOLATE PCSPKB_ICH_3 USING A 2N7002 WITH DRAIN CONNECTED TO +V3S THROUGH A 10K PULL-UP ,
SOURCE TO GROUND , & GATE TO PCSPKB_ICH_3 . PIN 2 OF C15 SHOULD BE CONNECTED TO DRAIN OF 2N7002 ,
WHICH FEEDS THE AUX INPUT OF CODEC
1. CHANGE P MOS , Q1050 HIGH CURRENT AND LOW RDS ON
2003/03/18 update
1. ADD SIX 0.1uF DECAPS C6021 , C6022 , C6023 , C6024 , C6025 , C6026 TO +V_LAN RAIL
2003/04/05 update
1. CHANGE VALUE C1358 , C1357 , C1398 FROM 0.01UF TO 0.1UF FOR BCM MODIFY
SHEET 31
2. ADD CAPACITORS C6015 , C6014 10UF FOR BCM MODIFY
1. CAPS C120 AND C125 ON CLOCK LINES CHANGE TO 10NF
SHEET 20
1. ADD U4005 , R6016 , Q6005 , D6009 , C6015 , C6014 THIS CIRCUIT AND CN6001 TO SECOND FAN
SHEET 57
1. THE HPD CIRCUIT REQUIRES A 2.5V ZENER (IN PARALLEL WITH R1264) , AND ADDITIONAL 20K IN SERIES.
SHEET 59
SEE THE ATI REFERENCE DESIGN BOARD
1. REMOVE CN22_PIN-5-RTCBAT
2. ADD CN6002 TO RCT CONNECTOR FOR MECHICNAL CHANGE
SHEET 63
1.REMOVE CN4001 RTC CONNECTOR , CN1010_PIN-5-RTCBAT FOR MECHICNAL CHANGE
SHEET 64
Engineer
1. CHANGE SW6001 AND SW6000 FOR MECHICNAL MODIFY
2. CHANGE D6005 I.R. SIZE FOR MECHICNAL MODIFY
INVENTEC
David Du
Drawn by
David Du
R&D CHK
MFG ENGR CHK
Changed by
Date Changed
Thursday, July 31, 2003
Time Changed
10:59:10 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
EE2
Size
TITLE
CHANGE LIST
VER
A02
Model Number
PC8803
Sheet
66
of
67
FOR PVR SCHEMATIC CHANGE 2003/07/17
FOR PV SCHEMATIC CHANGE
FOR MV B SCHEMATIC CHANGE 2003/08/15
SHEET 5
SHEET 57
SHEET 30
FOR OCP circuit add R6043(0ohm) between U1002-8 and U1002-5
1. CHANGE CAPACITOR VALUE C6027, C1335 FROM OPEN TO 100PF FOR EMI SOLUTION
1. ADD R6026 , R6027 , R6028 75 OHM RESISTORS TO PULL DOWN TO CRT SIGNAL R G B
add R6044(open) and D6009(BAT54C) between U1002-13 and U1002-5
2. ADD CAPACITOR C6030_100PF FOR EMI SOLUTION
SHEET 46
SHEET 35
SHEET 28
1. ADD C6020 , CC6021 , C6022 CAPACITORS PULL DOWN TO OPEN
1. ADD CAPACITOR C6042_100PF between U1 pin 12 , pin 13 .
1. ADD CAPACITORS C6031 , C6032 , C6033 , C6034 , C6035 , C6036 , C6037 100PF FOR EMI SOLUTION
2. ADD CAPACITOR C6041 open between U1 pin 2 , pin 3 .
2. CHANGE L4 , L5 , L6 FROM BEAD TO 0 OHM RESISTORS
2. CHANGE CAPACITOR VALUE C256 FRPM 0.1uF TO 100PF
3. ADD CAPACITOR C6043_100PF between U1 pin 9 , pin 10 .
SHEET 45
FOR PVR SCHEMATIC CHANGE 2003/07/23
1. CHANGE C1435 FROM 4.7UF TO OPEN
FOR MV B SCHEMATIC CHANGE 2003/08/21
SHEET 9
2. SWAP MPCI_PWM THIS SIGNAL FROM C24 PIN1 TO Q1061 PIN 2 THAN Q1061 PIN 3 SWAP TO LINK R12 PIN 1
1. R1582 , R1583 , R6019 , C1469 , Q1057 , Q1058 CHANGE TO OPEN FOR HP REQUIREMENT
SHEET 46
1. SWAP PHONE THIS SIGNAL FROM R12 PIN1 TO C24 PIN 2
SHEET 20
2. CHANGE C5 , C6 , C23 FROM 0.1UF TO 0.01UF
SHEET 6
1. CHANGE RESISTOR VALUE R1581 FROM 2.7K OHM TO 3.3K OHM FOR BATTERY SOLUTION
1. CN24 NOT TO USE
SHEET 51
SHEET 9
SHEET 47
1. ADD Q6005 NMOS TO CLEAR BACKWARD CURRENT
SHEET 57
2. R1463 , R1448 CHANGE VALUE FROM 0 OHM TO OPEN
SHEET 13
SHEET 5 54
1. KB_DAT_5 , KB_CLK_5 , EM_DAT_5 , EM_CLK_5, THIS SIGNAL
ADD R6021 , R6022 , R6023 , R6024 , RESISTORS TO PULL UP +V5S
1. CHANGE CAPACITOR VALUE C6016 FROM OPEN TO 12000PF FOR ATI RECOMMEND
1. R1465 , R1449 CHANGE VALUE FROM OPEN TO 0 OHM
1. CHANGE CAPACITOR VALUE C187 FROM 0.1UF TO 39000PF FOR ATI RECOMMEND
1. MOVE Q1009 , R1071 FOR LAYOUT PLACEMENT BECAUSE MECHANICAL COVER HAVE TO SHORT
2. CHANGE L8 , L9 , L13 FROM 110 OHM FITTER BEAD TO 39 NH FITTER BEAD
3. CHANGE L4007 , L4006 , L4005 FROM 75 OHM FITTER BEAD TO 110 NH FITTER BEAD
4. CHANGE C137 , C138 , C165 FROM OPEN TO 18PF CAPICATORS
FOR PVR SCHEMATIC CHANGE 2003/07/28
SHEET 5 57
FOR PV-R SCHEMATIC CHANGE 2003/07/15
SHEET 9
1. Change resistors value R6021,R6022 ,R6023 , R6024 from 4.7k ohm to 1k ohm for KBC PS2 microsoft keyboard to match .
1. CHANGE CAPACITOR C230 IMPROVE VGA/VCC BYPASS CAPACITOR ESR
FOR PVR SCHEMATIC CHANGE 2003/07/31
SHEET 54
SHEET 32
1. CHANGE CAPACITOR C1075 , C1076 , C1077 , C1078 , C1079 , C1080 , SIZE FROM 0603 TO 0402
TO FIX INTEL WIRELESS CARD TO TOUCH CAPACITOR MECHANICAL ISSUE
SHEET 56
1. change capacitor value C1268 from 22uF to 68uF
FOR PVR SCHEMATIC CHANGE 2003/08/01
1. CHANGE RESISTOR R134 VALUE FROM 1.24K TO 1.21K TO INCREASE THE SIGNAL VOLTAGE LEVEL TO MEETING THE IEEE SPEC.
2. CHANGE R1351 FROM 4.7OHM TO BLM11A601S FITTER BEAD (L4008) TO INCREASE THE SIGNAL VOLTAGE LEVEL TO MEETING THE IEEE SPEC.
SHEET 57
1. ADD CAPACITOR C328 , C329 , C330 TO 150PF FOR EMI SOLUTION
SHEET 58
1. MOVE R1057 , R1058 FOR LAYOUT PLACEMENT BECAUSE MECHANICAL COVER HAVE TO SHORT
SHEET 59
1. CLEAR PAD1003 LINK TO GND FOR EMI SOLUTION
2. ADD PAD1004 FOR THERMAL
SHEET 63
1. DELETE R4010 AND LED_POWER_SWITCH CIRCUIT CHANGE TO SWITCH CIRCUIT FOR MECHANICAL REQUIREMENT
SHEET 35
1. change ferrite-bead from L4, L5 , L6 (BLM11B750S) to resistors R6037 , R6038 , R6039 0 ohm
SHEET 57
1. change ferrite-bead from L4007, L4006 , L4005 (111XJBC_110NH) to resistors R6040 , R6041 , R6042 0 ohm
2. change ferrite-bead from L8, L9 , L13 (111XJBC_39NH) to ferrite-bead L8 , L9 , L10 BLM11B750S
FOR MV B SCHEMATIC CHANGE 2003/08/13
SHEET 32
1. ADD P-MOS Q6006 PIN4 LINK TO SLP_S3_5R , PIN5,8 LINK TO +AGP_V3S & PIN1, 2, 3, 6, 7, LINK TO +V3S
2.REMOVE L1014
SHEET 20
1. CHANGE CAPACITOR VALUE C286 2200pF TO NON-INSTALL
SHEET 64
1. IR_PIN11 LINK TO GND
LAYOUT NOTE:
1. CLK_CBIPCI_3R==>L5 CHANGE TO L3
2. CLK_MINIPCI_3R==>L5 CHANGE TO L3
SHEET 38
1. ADD C6039 0.1UF BYPASS CAPACITOR .
SHEET 47
Engineer
INVENTEC
David Du
Drawn by
1. CHANGE RESISTOR R6035 0 OHM TO C6040 0.01UF CAPACITOR .
David Du
R&D CHK
SHEET 56
MFG ENGR CHK
Changed by
EE2
Date Changed
Thursday, August 21, 2003
Time Changed
11:48:22 am
QA CHK
A3
DIAMOND
DOC CTRL CHK
1. CHANGE RESISTOR VALUE R134 FROM 1.21K TO 1.18K OHM.
Size
TITLE
CHANGE LIST
VER
A02
Model Number
PC8803
Sheet
67
of
67