Revised January 2005 NC7SP74 TinyLogic ULP D-Type Flip-Flop with Preset and Clear General Description Features The NC7SP74 is a single D-type CMOS Flip-Flop with preset and clear from Fairchild’s Ultra Low Power (ULP) Series of TinyLogic. Ideal for applications where battery life is critical, this product is designed for ultra low power consumption within the VCC operating range of 0.9V to 3.6V. ■ Space saving US8 surface mount package ■ MicroPak Pb-Free leadless package ■ 0.9V to 3.6V VCC supply operation ■ 3.6V overvoltage tolerant I/Os at VCC from 0.9V to 3.6V ■ tPD The internal circuit is composed of a minimum of inverter stages including the output buffer, to enable ultra low static and dynamic power. 3.0 ns typ for 3.0V to 3.6V VCC The NC7SP74, for lower drive requirements, is uniquely designed for optimized power and speed, and is fabricated with an advanced CMOS technology to achieve best in class speed operation while maintaining extremely low CMOS power dissipation. 5.0 ns typ for 1.65V to 1.95V VCC The signal level applied to the D input is transferred to the Q output during the positive going transition of the CLK pulse. 4.0 ns typ for 2.3V to 2.7V VCC 6.0 ns typ for 1.40V to 1.60V VCC 9.0 ns typ for 1.10V to 1.30V VCC 24.0 ns typ for 0.90V VCC ■ Power-Off high impedance inputs and outputs ■ Static Drive (IOH/IOL) ±2.6 mA @ 3.00V VCC ±2.1 mA @ 2.30V VCC ±1.5 mA @ 1.65V VCC ±1.0 mA @ 1.40V VCC ±0.5 mA @ 1.10V VCC ±20 µA @ 0.9V VCC ■ Uses patented Quiet Series noise/EMI reduction circuitry ■ Ultra low dynamic power Ordering Code: Product Order Package Code Number Number Top Mark Package Description Supplied As NC7SP74K8X MAB08A P74 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel NC7SP74L8X MAC08A X9 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Pb-Free package per JEDEC J-STD-020B. Battery Life vs. VCC Supply Voltage TinyLogic ULP and ULP-A with up to 50% less power consumption can extend your battery life significantly. Battery Life = (Vbattery *Ibattery*.9)/(Pdevice)/24hrs/day Where, Pdevice = (ICC * VCC) + (CPD + C L) * VCC2 * f Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and derated 90% and device frequency at 10MHz, with CL = 15 pF load TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak and Quiet Series are trademarks of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS500820 www.fairchildsemi.com NC7SP74 TinyLogic ULP D-Type Flip-Flop with Preset and Clear January 2003 NC7SP74 Pin Descriptions Logic Symbol Pin Names Description D Data Input IEEE/IEC CK Clock Pulse Input CLR Direct Clear Input Q, Q Flip-Flop Output PR Direct Preset Input Connection Diagrams Truth Table Pin Assignments for US8 Inputs Outputs Function CLR PR L H X H L X D CK Q Q X L H Clear X H L Preset L L X X H H — H H L ↑ L H — H H H ↑ H L — H H X ↓ Qn Qn No Change H = HIGH Logic Level L = LOW Logic Level Qn = No change in data X = Immaterial Z = High Impedance ↑ = Rising Edge ↓ = Falling edge (Top View) Pin One Orientation Diagram AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Pad Assignments for MicroPak (Top Thru View) www.fairchildsemi.com 2 Recommended Operating Conditions (Note 3) Supply Voltage (VCC) −0.5V to +4.6V DC Input Voltage (VIN) −0.5V to +4.6V Power Supply DC Output Voltage (VOUT) −0.5V to +7.0V Input Voltage (VIN) −0.5V to VCC +0.5V HIGH or LOW State (Note 2) VCC = 0V 0V to 3.6V Output Voltage (VOUT) −0.5V to 4.6V DC Input Diode Current (IIK) VIN < 0V 0.9V to 3.6V ±50 mA DC Output Diode Current (IOK) HIGH or LOW State 0V to VCC VCC = 0V 0V to 3.6V Output Current in (IOH/IOL) VOUT < 0V −50 mA VCC = 3.0V to 3.6V ±2.6 mA VOUT > VCC +50 mA VCC = 2.3V to 2.7V ±2.1 mA ± 50 mA VCC = 1.65V to 1.95V ±1.5 mA VCC = 1.40V to 1.60V ±1.0 mA VCC = 1.10V to 1.30V ±0.5 mA DC Output Source/Sink Current (IOH/IOL) DC VCC or Ground Current per ±50 mA Supply Pin (ICC or Ground) −65°C to +150 °C Storage Temperature Range (TSTG) VCC = 0.9V ±20 µA −40°C to +85°C Free Air Operating Temperature (TA) Minimum Input Edge Rate (∆t/∆V) VIN = 0.8V to 2.0V, VCC = 3.0V 10 ns/V Note 1: Absolute Maximum Ratings: are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: IO Absolute Maximum rating must be observed. Note 3: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VCC TA = +25°C (V) Min 0.90 Max HIGH Level Output Voltage Min 0.65 x VCC 0.65 x VCC 1.10 ≤ V CC ≤ 1.30 0.65 x VCC 0.65 x VCC 1.40 ≤ V CC ≤ 1.60 0.65 x VCC 0.65 x VCC 1.65 ≤ V CC ≤ 1.95 0.65 x VCC 0.65 x VCC 2.30 ≤ V CC ≤ 2.70 1.6 3.00 ≤ V CC ≤ 3.60 2.1 Units Conditions Max V 1.6 2.1 0.90 0.35 x VCC 0.35 x VCC 1.10 ≤ V CC ≤ 1.30 0.35 x VCC 0.35 x VCC 1.40 ≤ V CC ≤ 1.60 0.35 x VCC 0.35 x VCC 1.65 ≤ V CC ≤ 1.95 0.35 x VCC 0.35 x VCC 2.30 ≤ V CC ≤ 2.70 0.7 0.7 3.00 ≤ V CC ≤ 3.60 VOH TA = −40°C to +85°C 0.9 0.9 0.90 VCC - 0.1 VCC - 0.1 1.10 ≤ V CC ≤ 1.30 VCC - 0.1 VCC - 0.1 1.40 ≤ V CC ≤ 1.60 VCC - 0.1 VCC - 0.1 1.65 ≤ V CC ≤ 1.95 VCC - 0.1 VCC - 0.1 2.30 ≤ V CC ≤ 2.70 VCC - 0.1 VCC - 0.1 3.00 ≤ V CC ≤ 3.60 VCC - 0.1 VCC - 0.1 1.10 ≤ V CC ≤ 1.30 0.75 x VCC V IOH = −20 µA V 0.70 x VCC IOH = −0.5 mA 1.40 ≤ V CC ≤ 1.60 1.07 0.99 IOH = −1.0 mA 1.65 ≤ V CC ≤ 1.95 1.24 1.22 IOH = −1.5 mA 2.30 ≤ V CC ≤ 2.70 1.95 1.87 IOH = −2.1 mA 3.00 ≤ V CC ≤ 3.60 2.61 2.55 IOH = −2.6 mA 3 www.fairchildsemi.com NC7SP74 Absolute Maximum Ratings(Note 1) NC7SP74 DC Electrical Characteristics Symbol Parameter VCC (V) VOL LOW Level Output Voltage IIN Input Leakage Current IOFF Power Off Leakage Current ICC Quiescent Supply Current www.fairchildsemi.com (Continued) TA = +25°C Min Max TA = −40°C to +85°C Min Units Conditions Max 0.90 0.1 0.1 1.10 ≤ VCC ≤ 1.30 0.1 0.1 1.40 ≤ VCC ≤ 1.60 0.1 0.1 1.65 ≤ VCC ≤ 1.95 0.1 0.1 2.30 ≤ VCC ≤ 2.70 0.1 0.1 IOL = 20 µA 3.00 ≤ VCC ≤ 3.60 0.1 0.1 1.10 ≤ VCC ≤ 1.30 0.30 x VCC 0.30 x VCC IOL = 0.5 mA 1.40 ≤ VCC ≤ 1.60 0.31 0.37 IOL = 1.0 mA 1.65 ≤ VCC ≤ 1.95 0.31 0.35 IOL = 1.5 mA 2.30 ≤ VCC ≤ 2.70 0.31 0.33 IOL = 2.1 mA 3.00 ≤ VCC ≤ 3.60 0.31 0.33 0.90 to 3.60 ±0.1 ±0.5 µA 0 ≤ V I ≤ 3.6V V IOL = 2.6 mA 0 0.5 0.5 µA 0 ≤ (VI, V O) ≤ 3.6V 0.90 to 3.60 0.9 0.9 µA VI = VCC or GND 4 Symbol fMAX Parameter Maximum Clock Frequency tPLH Propagation Delay tPHL CK to Q, Q TA = +25°C VCC (V) Min 0.90 Typ TA = −40°C to +85°C Max Min Max 50 1.40 ≤ VCC ≤ 1.60 75 75 1.65 ≤ VCC ≤ 1.95 100 100 2.30 ≤ VCC ≤ 2.70 125 125 3.00 ≤ VCC ≤ 3.60 150 0.90 MHz 1.10 ≤ VCC ≤ 1.30 4.0 15.0 22.0 3.5 31.0 1.40 ≤ VCC ≤ 1.60 2.0 9.0 13.0 1.5 14.0 1.65 ≤ VCC ≤ 1.95 1.5 7.0 11.0 1.0 13.0 2.30 ≤ VCC ≤ 2.70 1.0 5.0 8.0 0.8 9.0 3.00 ≤ VCC ≤ 3.60 1.0 4.0 7.0 0.5 8.0 CLR, PR, to Q, Q 1.10 ≤ VCC ≤ 1.30 4.0 12.0 23.0 4.0 34.0 1.40 ≤ VCC ≤ 1.60 2.0 9.0 12.0 2.0 14.0 1.65 ≤ VCC ≤ 1.95 1.5 7.0 11.0 1.5 13.0 2.30 ≤ VCC ≤ 2.70 1.0 5.0 9.0 1.0 9.0 3.00 ≤ VCC ≤ 3.60 1.0 4.0 7.0 1.0 8.0 Hold Time, CK to D tW tREC 0.90 ns CL = 10 pF RD = 1 MΩ Figures 1, 3 ns CL = 10 pF RD = 1 MΩ Figures 1, 3 10.0 1.10 ≤ VCC ≤ 1.30 7.0 7.0 1.40 ≤ VCC ≤ 1.60 3.0 3.0 1.65 ≤ VCC ≤ 1.95 2.0 2.0 2.30 ≤ VCC ≤ 2.70 1.5 1.5 3.00 ≤ VCC ≤ 3.60 1.0 0.90 ns CL = 10 pF RD = 1 MΩ Figures 1, 4 1.0 1.0 1.10 ≤ VCC ≤ 1.30 0.5 0.5 1.40 ≤ VCC ≤ 1.60 0.5 0.5 1.65 ≤ VCC ≤ 1.95 0.5 0.5 2.30 ≤ VCC ≤ 2.70 0.5 0.5 3.00 ≤ VCC ≤ 3.60 0.5 ns CL = 10 pF RD = 1 MΩ Figures 1, 4 0.5 0.90 CK, PR, CLR 1.10 ≤ VCC ≤ 1.30 5.0 5.0 1.40 ≤ VCC ≤ 1.60 3.0 3.0 1.65 ≤ VCC ≤ 1.95 2.5 2.5 2.30 ≤ VCC ≤ 2.70 2.5 2.5 3.00 ≤ VCC ≤ 3.60 2.0 CLR, PR to CK Figures 1, 5 6.5 Pulse Width, Recover Time RD = 1 MΩ 150 tPHL tH CL = 10 pF 24.0 0.90 CK to D Figure Number 50 Propagation Delay Setup Time, Conditions 40.0 1.10 ≤ VCC ≤ 1.30 tPLH tS Units 5.0 0.90 ns CL = 10 pF RD = 1 MΩ Figures 1, 5 2.0 12.0 1.10 ≤ VCC ≤ 1.30 8.5 8.5 1.40 ≤ VCC ≤ 1.60 3.5 3.5 1.65 ≤ VCC ≤ 1.95 3.0 3.0 2.30 ≤ VCC ≤ 2.70 2.5 2.5 3.00 ≤ VCC ≤ 3.60 2.0 2.0 5 ns CL = 10 pF RD = 1 MΩ Figures 1, 4 www.fairchildsemi.com NC7SP74 AC Electrical Characteristics (10pF, 1MΩ) NC7SP74 AC Electrical Characteristics (15pF, 1MΩ) Symbol fMAX Parameter Maximum Clock Frequency tPLH Propagation Delay tPHL CK to Q, Q TA = +25°C VCC (V) Min 0.90 Typ TA = −40°C to +85°C Max Min Max 50 150 1.40 ≤ VCC ≤ 1.60 75 200 1.65 ≤ VCC ≤ 1.95 100 250 2.30 ≤ VCC ≤ 2.70 125 175 3.00 ≤ VCC ≤ 3.60 150 0.90 MHz 1.10 ≤ VCC ≤ 1.30 5.0 16.0 23.0 4.5 34.0 1.40 ≤ VCC ≤ 1.60 3.0 10.0 14.0 2.5 16.0 1.65 ≤ VCC ≤ 1.95 2.0 7.0 11.0 2.0 13.0 2.30 ≤ VCC ≤ 2.70 1.5 5.0 8.0 1.0 9.0 3.00 ≤ VCC ≤ 3.60 1.0 4.0 7.0 0.5 8.0 tPHL CLR, PR, to Q, Q 1.10 ≤ VCC ≤ 1.30 5.0 15.0 24.0 5.0 37.0 1.40 ≤ VCC ≤ 1.60 3.0 10.0 13.0 3.0 16.0 1.65 ≤ VCC ≤ 1.95 2.0 7.0 11.0 2.0 13.0 2.30 ≤ VCC ≤ 2.70 1.5 5.0 9.0 1.5 9.0 3.00 ≤ VCC ≤ 3.60 1.0 4.0 7.0 1.0 8.0 tH Hold Time, CK to D tW tREC 0.90 1.10 ≤ VCC ≤ 1.30 7.0 7.0 1.40 ≤ VCC ≤ 1.60 3.0 3.0 1.65 ≤ VCC ≤ 1.95 2.0 2.0 2.30 ≤ VCC ≤ 2.70 1.5 1.5 3.00 ≤ VCC ≤ 3.60 1.0 0.90 CL = 15 pF RD = 1 MΩ Figures 1, 3 ns CL = 15 pF RD = 1 MΩ Figures 1, 3 ns CL = 15 pF RD = 1 MΩ Figures 1, 4 1.0 1.0 1.10 ≤ VCC ≤ 1.30 0.5 0.5 1.40 ≤ VCC ≤ 1.60 0.5 0.5 1.65 ≤ VCC ≤ 1.95 0.5 0.5 2.30 ≤ VCC ≤ 2.70 0.5 0.5 3.00 ≤ VCC ≤ 3.60 0.5 ns CL = 15 pF RD = 1 MΩ Figures 1, 4 0.5 CK, PR, CLR 1.10 ≤ VCC ≤ 1.30 5.0 5.0 1.40 ≤ VCC ≤ 1.60 3.0 3.0 1.65 ≤ VCC ≤ 1.95 2.5 2.5 2.30 ≤ VCC ≤ 2.70 2.5 2.5 3.00 ≤ VCC ≤ 3.60 2.0 www.fairchildsemi.com ns 10.0 0.90 CLR, PR to CK Figures 1, 5 27.0 Pulse Width, Recover Time CL = 15 pF RD = 1 MΩ 200 0.90 CK to D Figure Number 27.0 Propagation Delay Setup Time, Conditions 40.0 1.10 ≤ VCC ≤ 1.30 tPLH tS Units 5.0 0.90 ns CL = 15 pF RD = 1 MΩ Figures 1, 5 2.0 12.0 1.10 ≤ VCC ≤ 1.30 8.5 8.5 1.40 ≤ VCC ≤ 1.60 3.5 3.5 1.65 ≤ VCC ≤ 1.95 3.0 3.0 2.30 ≤ VCC ≤ 2.70 2.5 2.5 3.00 ≤ VCC ≤ 3.60 2.0 2.0 6 ns CL = 15 pF RD = 1 MΩ Figures 1, 4 Symbol (V) Maximum Clock fMAX Frequency tPLH Propagation Delay tPHL CK to Q, Q TA = +25°C VCC Parameter Min 0.90 Typ TA = −40°C to +85°C Max Min Max 50 1.40 ≤ VCC ≤ 1.60 75 200 1.65 ≤ VCC ≤ 1.95 100 250 2.30 ≤ VCC ≤ 2.70 125 175 3.00 ≤ VCC ≤ 3.60 150 0.90 MHz 6.0 18.0 27.0 5.0 43.0 1.40 ≤ VCC ≤ 1.60 4.0 11.0 17.0 3.0 18.0 1.65 ≤ VCC ≤ 1.95 2.0 8.0 13.0 2.0 15.0 2.30 ≤ VCC ≤ 2.70 1.0 6.0 10.0 1.0 11.0 3.00 ≤ VCC ≤ 3.60 0.8 5.0 8.0 0.5 10.0 0.90 CLR, PR, to Q, Q 1.10 ≤ VCC ≤ 1.30 6.0 17.0 28.0 5.5 46.0 1.40 ≤ VCC ≤ 1.60 4.0 11.0 16.0 3.5 18.0 1.65 ≤ VCC ≤ 1.95 2.0 8.0 13.0 2.5 15.0 2.30 ≤ VCC ≤ 2.70 1.0 6.0 9.0 1.5 11.0 3.00 ≤ VCC ≤ 3.60 0.8 5.0 8.0 1.0 10.0 CK to D tW tREC 0.90 7.0 1.40 ≤ VCC ≤ 1.60 3.0 3.0 1.65 ≤ VCC ≤ 1.95 2.0 2.0 2.30 ≤ VCC ≤ 2.70 1.5 1.5 3.00 ≤ VCC ≤ 3.60 1.0 0.90 RD = 1 MΩ Figures 1, 3 CL = 30 pF ns RD = 1 MΩ Figures 1, 3 CL = 30 pF ns RD = 1 MΩ Figures 1, 4 1.0 1.0 1.10 ≤ VCC ≤ 1.30 0.5 0.5 1.40 ≤ VCC ≤ 1.60 0.5 0.5 1.65 ≤ VCC ≤ 1.95 0.5 0.5 2.30 ≤ VCC ≤ 2.70 0.5 0.5 3.00 ≤ VCC ≤ 3.60 0.5 CL = 30 pF ns RD = 1 MΩ Figures 1, 4 0.5 Pulse Width, 0.90 CK, PR, CLR 1.10 ≤ VCC ≤ 1.30 5.0 4.0 1.40 ≤ VCC ≤ 1.60 3.0 3.0 1.65 ≤ VCC ≤ 1.95 2.5 2.0 2.30 ≤ VCC ≤ 2.70 2.5 3.0 3.00 ≤ VCC ≤ 3.60 2.0 CLR, PR to CK CL = 30 pF ns 10.0 7.0 Recover Time Figures 1, 5 34.0 1.10 ≤ VCC ≤ 1.30 Hold Time, RD = 1 MΩ 200 Propagation Delay tH CL = 30 pF 34.0 tPLH CK to D Figure Number 150 1.10 ≤ VCC ≤ 1.30 Setup Time, Conditions 40.0 1.10 ≤ VCC ≤ 1.30 tPHL tS Units 5.0 0.90 CL = 30 pF ns RD = 1 MΩ Figures 1, 5 2.0 12.0 1.10 ≤ VCC ≤ 1.30 8.5 8.5 1.40 ≤ VCC ≤ 1.60 3.5 3.5 1.65 ≤ VCC ≤ 1.95 3.0 3.0 2.30 ≤ VCC ≤ 2.70 2.5 2.5 3.00 ≤ VCC ≤ 3.60 2.0 2.0 CL = 30 pF ns RD = 1 MΩ Figures 1, 4 Capacitance Symbol Parameter Typ Max Units Conditions CIN Input Capacitance 2.0 pF VCC = 0V COUT Output Capacitance 4.0 pF VCC = 0V CPD Power Dissipation Capacitance 8.0 pF 7 VI = 0V or VCC f = 10 MHz Figure Number Figure 2 www.fairchildsemi.com NC7SP74 AC Electrical Characteristics (30pF, 1MΩ) NC7SP74 AC Loading and Waveforms CP Input = AC Waveform; tr = tf = 2.5 ns; CL includes load and stray capacitance CP Input PRR = 10 MHz; Duty Cycle = 50% Input PRR = 1.0 MHz; tw = 500 ns D Input PRR = 5MHz; Duty Cycle = 50% FIGURE 1. AC Test Circuit FIGURE 2. ICCD Test Circuit FIGURE 3. AC Waveforms FIGURE 4. AC Waveforms www.fairchildsemi.com FIGURE 5. AC Waveforms 8 TAPE FORMAT for US8 Package Designator Tape Number Cavity Section Cavities Status Status 125 (typ) Empty Sealed 3000 Filled Sealed 75 (typ) Empty Sealed Cover Tape Leader (Start End) K8X Carrier Trailer (Hub End) Cover Tape TAPE DIMENSIONS inches (millimeters) TAPE FORMAT for MicroPak Package Designator Tape Number Cavity Section Cavities Status Status 125 (typ) Empty Sealed 3000 Filled Sealed 75 (typ) Empty Sealed Leader (Start End) L8X Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) 9 www.fairchildsemi.com NC7SP74 Tape and Reel Specification NC7SP74 Tape and Reel Specification (Continued) REEL DIMENSIONS inches (millimeters) Tape Size 8 mm A B C D N W1 W2 W3 7.0 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567 W1 + 0.078/−0.039 (177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00) (14.40) (W1 + 2.00/−1.00) www.fairchildsemi.com 10 NC7SP74 Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A 11 www.fairchildsemi.com NC7SP74 TinyLogic ULP D-Type Flip-Flop with Preset and Clear Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 8-Lead MicroPak, 1.6 mm Wide Package Number MAC08A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 12