ONSEMI NCS1002DR2G

NCS1002
Constant Voltage / Constant
Current Secondary­Side
Controller
Description
The NCS1002 is a highly integrated solution for Switching Mode
Power Supply (SMPS) applications requiring a dual control loop to
perform Constant Voltage (CV) and Constant Current (CC) regulation.
The NCS1002 integrates a 2.5 V voltage reference and two precision
op amps. The voltage reference, along with Op Amp 1, is the core of
the voltage control-loop. Op Amp 2 is an independent, uncommitted
amplifier specifically designed for the current control. Key external
components needed to complete the two control loops are: (a) A
resistor divider that senses the output of the power supply (battery
charger) and fixes the voltage regulation set point at the specified
value. (b) A sense resistor that feeds the current sensing circuit with a
voltage proportional to the DC output current. This resistor determines
the current regulation set point and must be adequately rated in terms
of power dissipation. The NCS1002 comes in a small 8−pin SOIC
package and is ideal for space-shrunk applications such as battery
chargers.
MARKING
DIAGRAMS
8
SOIC−8
D SUFFIX
CASE 751
8
1
1
A
L
Y
W
G
1002
ALYWG
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Features
•
•
•
•
•
•
•
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Low Input Offset Voltage: 0.5 mV, Typ
Input Common-Mode Range includes Ground
Low Quiescent Current: 300 mA per Op Amp at VCC = 5 V
Large Output Voltage Swing
Wide Power Supply Range: 3 V to 32 V
High ESD Protection: 2 kV
These are Pb−Free Devices
Out 1
1
8 VCC
In 1−
2
7 Out 2
In 1+
3
6 In 2−
GND
4
5 In 2+
(Top View)
Typical Applications
• Battery Chargers
• Switch Mode Power Supplies
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
July, 2009 − Rev. 1
1
Publication Order Number:
NCS1002/D
NCS1002
MAXIMUM RATINGS
Symbol
Rating
Unit
Supply Voltage (VCC to GND)
Parameter
VCC
36
V
Differential Input Voltage
Vid
36
V
Input Voltage
Vi
−0.3 to +36
V
VESD
2000
V
TJ
150
°C
ESD Protection Voltage at Pin
Human Body Model
Maximum Junction Temperature
Specification Temperature Range (Tmin to Tmax)
TA
−40 to +105
°C
Operating Free−Air Temperature Range
Toper
−55 to +125
°C
Storage Temperature Range
Tstg
−55 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
THERMAL CHARACTERISTICS
Parameter
Thermal Resistance
Junction−to−Ambient
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2
Symbol
Rating
Unit
RqJA
175
°C/W
NCS1002
ELECTRICAL CHARACTERISTICS
Symbol
Characteristics
Conditions
Typ
Max
Unit
0.3
0.4
mA
0.75
mA
TA = 25°C
2.0
mV
−40 v TA v +105°C
3.0
mV
ICC
Total Supply Current, excluding current in the Voltage Reference VCC = 5 V, no
load; −40 v TA v +105°C
ICC
Total Supply Current, excluding Current in the Voltage Reference VCC = 30 V, no
load; −40 v TA v +105°C
Min
OP AMP 1 (OP AMP WITH NONINVERTING INPUT CONNECTED TO THE INTERNAL Vref)
(VCC = 5 V, TA = 25°C unless otherwise noted)
VIO
DVIO
Input Offset Voltage
Input Offset Voltage Drift (−40 v TA v +105°C)
7.0
mV/°C
lIB
Input Bias Current (Inverting Input Only) TA = 25°C
20
nA
AVD
Large Signal Voltage Gain (VCC = 15 V, RL = 2 kW,
VICM = 0 V)
100
V/mV
PSRR
ISOURCE
IO
ISINK
VOH
VOL
Power Supply Rejection (VCC = 5.0 V to 30 V, VOUT = 2 V)
80
100
dB
Output Source Current (VCC = 15 V, VOUT = 2.0 V,
Vid = 1 V)
20
40
mA
Short Circuit to GND (VCC = 15 V)
40
Output Current Sink (Vid = −1 V)
mA
VCC = +15 V, VOUT = 0.2 V
(Note 1)
1
10
mA
VCC = +15 V, VOUT = 2 V
10
20
mA
RL = 2 kW, TA = 25°C
26
27
V
Output Voltage Swing, High (VCC = 30 V)
Output Voltage Swing, Low
−40 v TA v +105°C
26
RL = 10 kW, TA = 25°C
27
−40 v TA v +105°C
27
28
5.0
RL = 10 kW, TA = 25°C
−40 v TA v +105°C
SR
60
50
mV
50
Slew Rate (AV = +1, Vi = 0.5 V to 2 V, VCC = 15 V,
RL = 2 kW, CL = 100 pF)
0.2
0.4
V/ms
GBP
Gain Bandwidth Product (VCC = 30 V, AV = +1, (Note 1)
RL = 2 kW, CL = 100 pF, f = 100 kHz, VIN = 10 mVPP)
0.5
0.9
MHz
THD
Total Harmonic Distortion (f = 1 kHz, AV = 10,
RL = 2 kW, VCC = 30 V, VOUT = 2 VPP)
0.08
%
OP AMP 2 (INDEPENDENT OP AMP) (VCC = 5.0 V, TA = 25°C unless otherwise noted)
VIO
Input Offset Voltage
TA = 25°C
0.5
−40 v TA v +105°C
DVIO
Input Offset Current
IB
Input Bias Current
7.0
TA = 25°C
2.0
−40 v TA v +105°C
PSRR
Large Signal Voltage Gain (VCC = 15 V,
RL = 2 kW, VOUT = 1.4 V to 11.4 V)
20
50
−40 v TA v +105°C
25
65
1. Guaranteed by design and/or characterization.
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3
75
nA
150
nA
200
TA = 25°C
Power Supply Rejection (VCC = 5 V to 30 V)
mV/°C
150
TA = 25°C
−40 v TA v +105°C
AVD
mV
3.0
Input Offset Voltage Drift (−40 v TA v +105°C)
IIO
2.0
100
V/mV
100
dB
NCS1002
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Characteristics
Conditions
Min
Typ
Max
Unit
V
OP AMP 2 (INDEPENDENT OP AMP) (continued) (VCC = 5.0 V, TA = 25°C unless otherwise noted)
VICM
CMRR
ISOURCE
IO
ISINK
VOH
VOL
Input Common Mode Voltage Range (Note 2)
(VCC = +30 V)
TA = 25°C
0
VCC −
1.5
−40 v TA v +105°C
0
VCC −
2.0
0 to VCC − 1.7 V,
TA = 25°C
70
0 to VCC − 2.2 V
−40 v TA v +105°C
60
Common Mode Rejection Ratio (Note 4)
Output Current Source (VCC = 15 V, VOUT = 2 V, VID = +1 V)
20
Short−Circuit to GND (VCC = 15 V)
85
dB
40
mA
40
Output Current Sink (VID = −1 V)
1
10
mA
VCC = +15 V, VOUT = 2 V
10
20
mA
RL = 2 kW, TA = 25°C
26
27
V
−40 v TA v +105°C
26
RL = 10 kW, TA = 25°C
27
−40 v TA v +105°C
27
28
5.0
RL = 10 kW, TA = 25°C
−40 v TA v +105°C
SR
mA
VCC = +15 V, VOUT = 0.2 V
Output Voltage Swing, High (VCC = 30 V)
Output Voltage Swing, Low
60
50
mV
50
Slew Rate (AV = +1, Vi = 0.5 V to 3 V, VCC = 15 V, RL = 2 kW, CL = 100 pF)
0.2
0.4
V/ms
GBP
Gain Bandwidth Product (VCC = 30 V, AV = +1,
RL = 2 kW, CL = 100 pF, f = 100 kHz, VIN = 10 mVPP) (Note 4)
0.5
0.9
MHz
THD
Total Harmonic Distortion (f = 1 kHz, AV = 10,
RL = 2 kW, VCC = 30 V, VOUT = 2 VPP)
0.08
%
enoise
Equivalent Input Noise Voltage (f = 1 kHz, RS = 100 W, VCC = 30 V)
50
nV/√Hz
VOLTAGE REFERENCE
IK
Vref
DVref
Imin
I ZKA I
Cathode Current
1 to 100
Reference Voltage (IK = 1 mA)
mA
V
TA = 25°C
2.49
2.5
2.51
−40 v TA v +105°C
2.48
2.5
2.52
Reference Deviation over Temperature (VKA = Vref, IK = 10 mA, −40 v TA v
+105°C) (Note 4)
7.0
30
mV
Minimum Cathode Current for Regulation (VKA w 2.45 Vf)
40
75
mA
Dynamic Impedance (Note 3)
(VKA = Vref, IK = 1 mA to 100 mA, f < 1 kHz)
0.2
0.5
W
2. The input common−mode voltage of either input signal should not be allowed to go negative by more than 0.3 V. The upper end of the
common−mode range is VCC − 1.5 V. Both inputs can go to VCC + 0.3 V without damage.
3. The Dynamic Impedance is defined as l ZKA l = DVKA / DIK.
4. Guaranteed by design and/or characterization.
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4
NCS1002
25
1.2
20
BIAS CURRENT (pA)
INPUT OFFSET VOLTAGE (mV)
1.4
1.0
0.8
0.6
OP1
0.4
0.2
0
−50
−30
−10
10
30
50
70
90
110
15
10
5
0
−50
130
−30
−10
10
30
50
70
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 1. Input Offset Voltage vs. Temperature
90
110
80
100
Figure 2. IB vs. Temperature
2.6
2.52
2.58
2.56
2.51
2.52
Vref (V)
Vref (V)
2.54
2.5
2.48
2.46
2.5
2.49
2.44
2.42
0
10
20
30
40
50
60
70
80
90
2.48
−40
100
−20
0
20
40
60
CATHODE CURRENT IK (mA)
TEMPERATURE (°C)
Figure 3. Vref as a Function of IK
Figure 4. Vref Over Temperature
S − Stable; U − Unstable
25
s u u u u u u u u u u u
20 s s u u u u u u u u u u
15 s s s u u u u u u u u u
14 s s s s u u u u u u u s
13 s s s s s u u u u u u s
12 s s s s s u u u u u s s
11 s s s s s s s s s s s s
10 s s s s s s s s s s s s
9 s s s s s s s s s s s s
8 s s s s s s s s s s s s
7 s s s s s s s s s s s s
6 s s s s s s s s s s s s
5 s s s s s s s s s s s s
4 s s s s s s s s s s s s
3 s s s s s s s s s s s s
2 s s s s s s s s s s s s
1 s s s s s s s s s s s s
0.5 s s s s s s s s s s s s
100 pF 500 1000 1500 2000 3 nF
u
u
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
4
u
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
0.5
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
5.8
DYNAMIC IMPEDANCE (W)
IK (mA)
2.4
0.45
0.4
0.35
0.3
0.25
0.2
−40−30−20−10 0
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD ON Vref (Pin 3)
TEMPERATURE (°C)
Figure 5. Region of Reference Stability vs.
Capacitive Load (Pin 3)
Figure 6. Ref Dynamic Impedance vs.
Temperature
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5
COMMON MODE REJECTION RATIO (dB)
NCS1002
120
25°C
−40°C
105°C
80
60
40
20
0
0
5
10
15
20
25
SUPPLY VOLTAGE (V)
30
35
−40°C
100
105°C
80
25°C
60
40
20
0
0
Figure 7. NCS1002 PSRR vs. Supply Voltage
5
10
15
20
25
SUPPLY VOLTAGE (V)
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
20
50
100
200
30
Figure 8. NCS1002 CMRR vs. Supply Voltage
10
THD+N (%)
PSRR (dB)
100
120
500
1k
FREQUENCY (Hz)
Figure 9. THD+N
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6
2k
5k
10k
20k
35
−
+
V4
4
DF06S
2
3
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7
R13
220 k
D6
1N4148
1 U2
90−264 VAC
L2
470 μH
0.2 A
+
C5
4.7 μ
400 V
L1
470 μH
0.2 A
R12
10 k
+
C6
4.7 μ
400 V
8
7
6
5
NCP1200
NCP1200D60
1
2
3
4
U1
R1
3
U4
2
SFH6156−3
4
1
R7
3.3
0.6 W
R10
68 k
C3
330 μF
+
+
D5
1N4148
D4
1N4148
C9
0.047 μF
C10
1 nF
250 VAC
Y1
C2
10 μ
D2
1N5819
Figure 1. AC Adapter Application
+
C7
47 μF
MTD1N60E
Q1
D3
1N4937
C1
470p 250 V 100 k 1 W
D1
MUR120
Out1
1
In1−
2
In1+
3
Ground
4
R11
75 k
1%
R4
1.5 k
L3
4.7 μH
1A
NCS1002
U3
VCC
8
Out2
7
In2−
6
In2+
5
R2
3.3 k
R8
2.7 k
1%
R9
470
C8
0.1 μ
R6
0.15
R5
10 k
1%
R3
10 k
1%
+
C4
47 μ
5.2 V, 600 mA
NCS1002
NCS1002
ORDERING INFORMATION
Device
NCS1002DR2G
Package
Shipping†
SOIC−8
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
NCS1002
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AJ
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 81−3−5773−3850
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9
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCS1002/D