Preliminary Specification PE95420 Product Description The PE95420 is an RF SPDT (single pole double throw) switch and is available in a hermetically sealed ceramic package. The PE95420 is designed to cover a broad range of applications from near DC to 8500 MHz for use in various Hi-Rel industries and applications requiring broadband performance. It uses Peregrine’s UltraCMOS™ process and features HaRP™ technology enhancements to deliver high linearity and exceptional harmonics performance. HaRP technology is an innovative feature of the UltraCMOS™ process providing upgraded linearity performance. The PE95420 is an absorptive/non-reflective switch design which is an ideal termination method for RF elements in a system design. A single-pin 2.2V CMOS logic control in a single chip solution reduces the number of control lines. Typical Industries • • • • • • • Medical Automotive Telecom Infrastructure Test Instrumentation Down-hole oil/gas Military Screening available for commercial space applications RF SPDT Switch Hermetically sealed ceramic package DC – 8500 MHz Features • HaRP™-Technology-Enhanced • Eliminates Gate and Phase Lag • No insertion loss or phase drift • High linearity 60 dBm IIP3 • Low insertion loss: • 0.8 dB at 100 MHz • 1.4 dB at 3000 MHz • 1.5 dB at 6000 MHz • High isolation • 65 dB at 100 MHz • 42 dB at 3000 MHz • 40 dB at 6000 MHz • 1 dB compression point of +30 dBm • Single-pin 3.3 V CMOS logic control • ESD tolerant to 2000 V HBM • Absorptive/Non-Reflective • Offered in a 7-lead Hermetic CSOIC Surface-Mount Package and in DIE form Figure 2. Package Type 7-lead CSOIC Figure 1. Functional Diagram RFC RF1 ESD 50Ω ESD CMOS Control Driver RF2 50Ω VDD LS CTRL VSS Document No. 70-0259-02 │ www.psemi.com ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 PE95420 Preliminary Specification Table 1. Electrical Specifications @ +25°C, VDD = 3.3 V Parameter Conditions Min Operation Frequency Typical DC 100 MHz, 0 dBm 3000 MHz, 0 dBm 6000 MHz, 0 dBm 8500 MHz, 0 dBm 100 MHz 3000 MHz 6000 MHz 8500 MHz 100 MHz 3000 MHz 6000 MHz 8500 MHz 100 MHz 3000 MHz 6000 MHz 8500 MHz 100 MHz 3000 MHz 6000 MHz 8500 MHz 50% CTRL to 0.1 dB final value Insertion Loss Isolation – RF1 to RF2 Isolation - RFC to RF1/RF2 Return Loss ON State Return Loss OFF State Switching Time Max Units 8500 MHz dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB µs 0.8 1.2 1.5 1.7 82 48 35 30 74 46 42 33 20 21 16 9 19 18 15 10 2 Input 1 dB Compression 6000 MHz 33 dBm Input IP3 6000 MHz 60 dBm Figure 3. Pin Layout (Top View) Table 2. Pin Descriptions RFC Pin 1 RF1 Pin 2 Pin 7 Pin 3 VDD 4 5 RF2 Pin No. Pin Name 1 RFC1 RF Common 2 RF11 RF Port 1 3 VDD 4 LS 5 CTRL 6 VSS 7 RF2 1 Description Nominal 3.3 V supply connection Selects the RF1 to RFC path (See Table 5) Selects the RF2 to RFC path (See Table 5) Negative power supply. Apply nominal – 3.3 V supply RF Port 2 6 LS CTRL VSS Note 1: No DC voltage should be applied at RF ports. ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 7 Document No. 70-0259-02 │ UltraCMOS™ RFIC Solutions PE95420 Preliminary Specification Table 5. Truth Table Table 3. Operating Ranges Parameter Min Typ Max Units 3.0 3.3 3.6 V -3.6 -3.3 -3.0 V VDD Positive Power Supply Voltage VDD Negative Power Supply Voltage IDD Power Supply Current Control Voltage High µA 100 (VDD = 3.3V, LS or CTRL = 3.3V) -40 RF Power In: 20 MHz ≤ 8.5 GHz 0.3xVDD V 85 °C 24 dBm Table 4. Absolute Maximum Ratings Symbol Parameter/Conditions CTRL RFC-RF1 RFC-RF2 0 0 off off 0 1 off on 1 0 on off 1 1 on on V 0.7xVDD Control Voltage Low Operating temperature range LS Min Max Units 4.0 VDD+ 0.3 VDD+ 0.3 V V 150 °C 2000 V VDD Power supply voltage -0.3 VC1 Voltage on LS input -0.3 VC2 Voltage on CTRL input -0.3 TST Storage temperature range -65 VESD ESD voltage (Human Body Model) Exposed Solder Pad Connection The exposed solder pad on the bottom of the package must be grounded for proper device operation. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESDsensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rate specified. V Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Switching Frequency The PE95420 has a maximum 25 kHz switching rate. Performance Plots Figure 4. Isolation, RFC-RF1, VDD=3.3V across Temperature Document No. 70-0259-02 │ www.psemi.com Figure 5. Isolation, OFF-State ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 7 PE95420 Preliminary Specification Figure 6. Insertion Loss Figure 7. Return Loss, RFC ON Figure 8. Return Loss, RFC OFF ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 7 Document No. 70-0259-02 │ UltraCMOS™ RFIC Solutions PE95420 Preliminary Specification Evaluation Boards Figure 9. Evaluation Board Layouts The SPDT switch EK Board was designed to ease customer evaluation of Peregrine’s PE95420. The RF common port is connected through a 50 Ω transmission line via the top SMA connector, J1. RF1 and RF2 are connected through 50 Ω transmission lines via SMA connectors J2 and J3, respectively. A through 50 Ω transmission is available via SMA connectors J5 and J6. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. Peregrine Specification 101-0345 The evaluation kit board is constructed of four metal layers. The dual clad top RF layer is Rogers RO4003 material with an 8 mil RF core and er = 3.55. The other two dielectric layers are FR4 for DC control and overall board strength with an cumulative board thickness of 62 mils. The RF transmission lines were designed using a Grounded co-planar waveguide with a linewidth of 15 mils and gap of 7 mils. Figure 10. Evaluation Kit Schematic 1 J1 2 1 RFC 142 -0761 -881 /891 Peregrine Specification 102-0417 RFC 9 SOCKET MOUNTING HOLE 10 SOCKET MOUNTING HOLE 11 SOCKET MOUNTING HOLE 12 SOCKET MOUNTING HOLE J2 U1 142-0761-881/891 J3 142-0761-881/891 RF1 PE95420 1 7 GND 8 THERMAL SLUG VSS CTRL RF2 RF2 6 5 LS 4 3 VDD 2 2 2 RF1 1 J4 HEADER14 1 3 5 7 9 11 13 1 3 5 7 9 11 13 VSS CTR CTRL VDD LS LS VDD J5 J6 142-0761-881/891 1 R1 DNI Document No. 70-0259-02 │ www.psemi.com C4 22pF C3 22pF C2 22pF C1 22pF 142-0761-881/891 Through Line 1 2 2 4 6 8 10 12 14 2 2 4 6 8 10 12 14 ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 7 PE95420 Preliminary Specification Figure 11. Package Drawing 7-lead CSOIC PE95420 NOTES: 1. PACKAGE BODY MATERIAL: WHITE ALUMINA 92% 2. CONDUCTOR TRACES MATERIAL: THICK FILM TUNGSTEN 3. LEAD IS Fe-Ni-Co ALLOY 4. BASE IS Cu-W 5. PLATING: ELECTROLYTIC GOLD 50 MICRO-INCHES MIN, OVER ELECTROLYTIC NICKEL 75 MICRO-INCHES MIN. 6. ALL DIMENSIONS ARE IN INCHES [MILLIMETERS] 7. TOLERANCES: ±.005 [0.13] UNLESS OTHERWISE SPECIFIED. 8. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND. Table 6. Ordering Information Order Code Part Marking Description Shipping Method Package 95420-01 9542001 PE95420-7CSOIC-50B Engineering Samples 7-lead CSOIC 50 Count Trays 95420-11 9542011 PE95420-7CSOIC-50B Production Units 7-lead CSOIC 50 Count Trays Production Die Die 400 Units/Waffle Pack PE95420 Evaluation Kit Evaluation Board 1 / Box 95420-99 95420-00 PE95420-EK ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 7 Document No. 70-0259-02 │ UltraCMOS™ RFIC Solutions PE95420 Preliminary Specification Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Hi-Rel Products Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 7 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0259-02 │ UltraCMOS™ RFIC Solutions