PM QRT DATASHEET ERRATA Released io nT hu rsd ay ,1 9S ep tem be r, 20 02 10 :35 :55 PM73487 inv ef uo fo liv ett QRT Do wn loa de db yV DATASHEET Errata Released Issue 8: April, 2002 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 QRT DATASHEET ERRATA Released PM Legal Information :35 :55 Copyright 10 © 2002 PMC-Sierra, Inc. 20 02 The information is proprietary and confidential to PMC-Sierra, Inc., and for its customers’ internal use. In any event, you cannot reproduce any part of this document, in any form, without the express written consent of PMC-Sierra, Inc. tem be r, PMC-1980618 (P3) ep Disclaimer nT hu rsd ay ,1 9S None of the information contained in this document constitutes an express or implied warranty by PMC-Sierra, Inc. as to the sufficiency, fitness or suitability for a particular purpose of any such information or the fitness, or suitability for a particular purpose, merchantability, performance, compatibility with other parts or systems, of any of the products of PMC-Sierra, Inc., or any portion thereof, referred to in this document. PMC-Sierra, Inc. expressly disclaims all representations and warranties of any kind regarding the contents or use of the information, including, but not limited to, express and implied warranties of accuracy, completeness, merchantability, fitness for a particular use, or non-infringement. fo liv ett io In no event will PMC-Sierra, Inc. be liable for any direct, indirect, special, incidental or consequential damages, including, but not limited to, lost profits, lost business or lost data resulting from any use of or reliance upon the information, whether or not PMC-Sierra, Inc. has been advised of the possibility of such damage. uo Trademarks db Do wn loa de Patents yV inv ef QRT is a registered trademark of PMC-Sierra, Inc. PMC-Sierra is trademark of PMC-Sierra, Inc. Other product and company names mentioned herein may be the trademarks of their respective owners. The technology discussed is protected by one or more of the following Patents: U.S. Patent No. 5,557,607; 5,570,348; 5,583,861; 6,147,997; 6,151,301; 6,188,690B1 6,226,298B1; 6,134,218 Relevant patent applications and other patents may also exist. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 2 QRT DATASHEET ERRATA Released PM Contacting PMC-Sierra 10 :35 :55 PMC-Sierra 8555 Baxter Place Burnaby, BC Canada V5A 4V7 20 02 Tel: (604) 415-6000 Fax: (604) 415-6200 9S ep tem be r, Document Information: [email protected] Corporate Information: [email protected] Technical Support: [email protected] Web Site: http://www.pmc-sierra.com ,1 Revision History Issue Date Details of Change 1 Sept. 1998 Creation of document 2 Jan. 1999 Added errata items 3 May 1999 Added errata items 2.4, 2.5, 2.8, 3.6 – 3.8 4 June 1999 Aligns with Issue 3 Production Release Datasheet 5 July 1999 Corrected typo in 3.2 6 Aug. 2001 Added patent award numbers 7 Feb. 2002 Added errata items 2.2, 2.3, and 2.4 8 Apr. 2002 liv ett io nT hu rsd ay Issue No. fo Added a patent number to errata item 2.1 Do wn loa de db yV inv ef uo Modified section 2.3 from the previous errata (issue 7) Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 3 QRT DATASHEET ERRATA Released PM Table of Contents :55 Legal Information ................................................................................................................ 2 :35 Contacting PMC-Sierra ....................................................................................................... 3 Device Identification............................................................................................ 5 1.2 References ......................................................................................................... 5 20 tem be r, Documentation Deficiency List .................................................................................... 6 Page 2 - US Patents ........................................................................................... 6 2.2 UTOPIA Level 2 Mode Description..................................................................... 6 Location ................................................................................................. 6 2.2.2 Original Wording .................................................................................... 6 2.2.3 Replacement Wording ........................................................................... 7 ay ,1 9S 2.2.1 rsd RX_DRAM_REGISTER and TX_DRAM_REGISTER Addresses ...................... 7 Location ................................................................................................. 7 2.3.2 Incorrect Addresses ...............................Error! Bookmark not defined. 2.3.3 Correct Addresses (Replacement Wording) .......................................... 7 nT hu 2.3.1 Latch-up Current and ESD Specification ........................................................... 8 io 2.4 ep 2.1 2.3 liv ett Device Functional Deficiency List ............................................................................... 9 AB_RAM Microprocessor Access Error.............................................................. 9 3.2 Clock Tolerance Restrictions .............................................................................. 9 3.3 TX and RX UTOPIA Buffer RAM Access Error................................................. 10 3.4 Multicast operation restriction........................................................................... 10 3.5 QRT generating incorrect BP_ACK signals due to stuck-at data lines............. 10 3.6 Aliasing on microprocessor address bus causes interrupt latch clearing......... 10 ef uo fo 3.1 Do wn loa de db 3 02 1.1 inv 2 Introduction.................................................................................................................. 5 yV 1 10 Table of Contents ................................................................................................................ 4 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 4 QRT DATASHEET ERRATA Released Introduction PM 1 Section 2 lists documentation errors found in Issue 3 of the QRT Data Sheet (PMC-1980618). · Section3 lists the known functional errata for Revision B of the PM73487 QRT. 02 10 :35 · 20 Device Identification r, 1.1 :55 In this document: PM73487 QRT Branding Format References · Do wn loa de 1.2 db yV inv ef uo fo liv ett io nT hu rsd ay ,1 9S Figure 1 ep tem be The information contained in Section 2 relates to Revision B of the PM73487 QRT only. The device revision code is marked at the end of the Wafer Batch Code on the face of the device. Issue 3 of the QRT Data Sheet (PMC-1980618). Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 5 QRT DATASHEET ERRATA Released Documentation Deficiency List PM 2 :35 :55 This section lists the known documentation deficiencies for Issue 3 of the QRT Data Sheet (PMC-1980618) as of the publication date of this document. 02 10 For each specific deficiency, the location of the passage in question, the deficient text, and the replacement text are described. New text is shown in bold. Deleted text is shown as underlined. The PM73487 is protected by the following patents: ay ,1 US patent 5,557,607 rsd US patent 5,570,348 hu US patent 5,583,861 io nT US patent 6,147,997 ett US patent 6,151,301 fo liv US patent 6,188,690B1 ef inv US patent 6,134,218 uo US patent 6,226,298B1 UTOPIA Level 2 Mode Description yV 2.2 ep Page 2 - US Patents 9S 2.1 tem be r, 20 For more general issues, a description of the nature of the error is given, along with a passage that correctly describes the concept or device function. Please report any documentation deficiencies not covered in this errata to PMC-Sierra. 2.2.1 Do wn loa de db The description of the UTOPIA Level 2 mode in the datasheet needs some clarification to emphasize that, in the Multi-PHY (MPHY) mode, the interface does not operate with any device with a bandwidth greater than an OC-3. Location The UTOPIA Level 2 Mode description is found in Section 3.2.2.7, Highest Bandwidth Device Support in UTOPIA Level 2 Mode. 2.2.2 Original Wording The QRT UTOPIA Level-2 50 MHz interface was not designed to operate with any device possessing a bandwidth greater than that of an OC-3. For higher bandwidth requirements, the user must use the single-PHY UTOPIA Level-1 mode of operation. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 6 QRT DATASHEET ERRATA Released Replacement Wording PM 2.2.3 RX_DRAM_REGISTER and TX_DRAM_REGISTER Addresses 02 2.3 10 :35 :55 The QRT UTOPIA Level-2 50 MHz MPHY interface was not designed to operate with any device possessing a bandwidth greater than that of an OC-3. For higher bandwidth requirements, the user must use the single-PHY UTOPIA Level-2 mode of operation. 2.3.1 tem be r, 20 There are typos in the addresses for the RX_DRAM_REGISTER and TX_DRAM_REGISTER in the datasheet. Location ,1 Incorrect Addresses rsd ay 2.3.2 9S ep The incorrect addresses for the RX_DRAM_REGISTER and TX_DRAM_REGISTER are in page 199 under section 9.5.1, page 201 under section 9.5.2, page 202 under section 9.5.3, and page 203 under section 9.5.4. Long Address Name 8000000h 2000000h Receive Cell Buffer SDRAM/SGRAM (RX_DRAM_REGISTER) C000000h 3000000h Transmit Cell Buffers SDRAM/SGRAM (TX_DRAM_REGISTER) Description Receive buffer SDRAM/SGRAM. Transmit buffer SDRAM/SGRAM. db yV Correct Addresses (Replacement Wording) Byte Address Long Address 2000000h 800000h Receive Cell Buffer SDRAM/SGRAM (RX_DRAM_REGISTER) Receive buffer SDRAM/SGRAM. 3000000h C00000h Transmit Cell Buffers SDRAM/SGRAM (TX_DRAM_REGISTER) Transmit buffer SDRAM/SGRAM. Do wn loa de 2.3.3 inv ef uo fo liv ett io nT hu Byte Address Name Description Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 7 QRT DATASHEET ERRATA Released Latch-up Current and ESD Specification PM 2.4 :35 :55 There is no ESD and latch-up current specification under Section 5, Physical Characteristic, in the current QRT datasheet. Do wn loa de db yV inv ef uo fo liv ett io nT hu rsd ay ,1 9S ep tem be r, 20 02 10 The qualification data indicates that the QRT meets ±1 kV ESD and ±90 mA latch-up current. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 8 QRT DATASHEET ERRATA Released Device Functional Deficiency List PM 3 10 :35 :55 This section lists the known functional deficiencies for Revision B of the QRT as of the publication date of this document. For each deficiency, the known workaround and the operating constraints, with and without the workaround, are also described. 20 AB_RAM Microprocessor Access Error r, 3.1 02 Please report any functional deficiencies not covered in this errata to PMC-Sierra. tem be The AB_RAM stores the head and tail queue pointers. Normally, the microprocessor does not access this memory. So this anomaly has no consequence. ,1 9S ep However, microprocessor accesses may be used in certain cases (e.g. as a SRAM diagnostic). For any microprocessor accesses, the data from an AB_RAM access may become 00h. rsd ay Software Work-around: nT hu WRITE: Do not write 00h value to the AB_RAM. Always check the written value to ensure it is not 00h. If 00h is read back, retry the write. liv Clock Tolerance Restrictions fo 3.2 ett io READ: If the data read back is 00h, retry the read until a non-zero value is obtained. This is assuming 00h is always invalid. ef uo For Stand-alone QRT operation and Single-stage switching operation: yV inv The SYSCLK and the SE_CLK need to be maintained in a specific ratio: 100 : 66.66. db That is, both clocks can be scaled together to different frequencies, but the ratio needs to be maintained. Normal crystal oscillator tolerances apply (+/- 500ps). Do wn loa de For Multi-stage switching operation: A MNACK’ed cell may not be retransmitted from QRT's Port 3 (SDOUT(3)). The egress QRT will detect a sequence error and invoke resequencing error recovery. Workaround: Operate SE_CLK within: 118/182 * SYSCLK < SE_CLK < 118/180 * SYCLK. For ex., if SYSCLK = 100MHz, then: Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 9 QRT DATASHEET ERRATA Released PM 64.83 Mhz < SE_CLK < 65.55 Mhz :55 Details on the conditions for the errata to occur in the Multi-stage switching operation: :35 Conditions required for cell drop to occur: 10 1) SE_CLK > 65.9 mhz when QRT sysclk=100 Mhz 02 2) A high priority cell has been MNACKed at QRT port 3 (cell is now occupying in one of the 2 SwEngine ping pong buffer) tem be r, 20 3) The QEngine send a low priority cell into PORT 3's other ping pong buffer. In the same cell time, QEngine also sent a cell to the Port 2. QEngine received inconsistent information about the MNACK’ed high priority cell and treated it as an ACK. The cell is then recycled. ep TX and RX UTOPIA Buffer RAM Access Error 9S 3.3 rsd ay ,1 The TX and RX UTOPIA Buffer RAM’s are 4 cell FIFOs which buffers cells to the TX and RX UTOPIA Interfaces. Read/write access is allowed to the RAMs by a microprocessor but this is only used in initial start up diagnostics. An access to the RAMs may return incorrect values. io Multicast operation restriction ett 3.4 nT hu It is not recommended for the microprocessor to access these RAM’s. fo QRT generating incorrect BP_ACK signals due to stuck-at data lines ef uo 3.5 liv The MC_LIST entry, offset 0x30, should not be used. yV inv Normally, in the event of a stuck-at data line from the QSE to the QRT (i.e. at egress), the QRT should withhold backpressure to the QSE (i.e. not acknowledging cell receipt from the QSE). 3.6 Do wn loa de db Due to a metastability issue, in response to a stuck-at data line, the QRT may generate incorrect BPACKs (incorrect bit pattern). This will result in the QSE generating intermittent BP_ACK_FAIL_PRESENT (p.96) interrupts. Please note that the latched interrupt in the QSE (BP_ACK_FAIL_LATCH, p.96) will also be asserted. Aliasing on microprocessor address bus causes interrupt latch clearing During a microprocessor access into the QRT, if an address with “24” as least significant digits appears on the microprocessor address bus, the QUEUE_ENGINE_CONDITION_LATCH_BITS register (Reg. 0x2B), is cleared. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 10 QRT DATASHEET ERRATA Released PM Workaround: 10 :35 :55 A) Ensure software does not read alias addresses when there is actual traffic flow. All alias addresses are listed below. Please note that all of the following addresses do not need to be accessed during traffic flow. They are only read for diagnostic purposes only, which should occur during initialization, before actual traffic flow. 20 02 The alias addresses are XXXXXX24 and XXXXXXAC tem be r, In the register section: TX_DIR_STATE, 7C000024 -- Can be access via address 7C0000A4, therefore no aliasing. 9S ep In the TSC_RAM section: rsd ay ,1 TX_SCQ_STATE for all SCQs with SC=2 have alias addresses of 00400XX024 (XX = VO number) TX_SCQ_TAIL/ TX_SCQ_OUT_FIFO_TAIL for SCQ/outfifo with SC=A have alias addresses of 00400XX0AC (XX = VO number) nT hu In the RSC_RAM section: ett io All data structures with SC=9 and SC=2B fo liv In the VO_RAM section: Do wn loa de db yV inv ef uo TX_VO_CONFIG for VO=9, address is 00480024 TX_VO_STATE for VO=B, address is 004800AC TX_VO_CELLS_PRES for VO=9, address is 00480124 TX_VO_SERVICE_STATE_0 for VO=B, address is 004801AC TX_VO_SERVICE_STATE_1 for VO=9, address is 00480224 TX_SC_STATE for SC=5, address is 004802AC TX_SC_MC_IN_FIFO_TAIL for SC=8, address is 00480324 TX_SC_MC_NEXT_HEADER_PTR for SC=D, address is 00483AC In the CH_RAM: TX_NEW_VPI_RESEQ_PTR for channel XXX6, address is 010XXXXAC B) If any of the above alias addresses has to be read, before performing the read access, read the QUEUE_ENGINE_CONDITION_LATCH_BITS register first. Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 11 QRT DATASHEET ERRATA Released Do wn loa de db yV inv ef uo fo liv ett io nT hu rsd ay ,1 9S ep tem be r, 20 02 10 :35 :55 PM Notes Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use Document ID: PMC-1981032, Issue 8 12