1 TC811 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS FEATURES TYPICAL APPLICATIONS ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Differential Reference Input Display Hold Function Fast Over-Range Recovery, Guaranteed Next Reading Accuracy Low Temperature Drift Internal Reference ....................................... 35ppm/°C (Typ) Guaranteed Zero Reading With Zero Input Low Noise ..................................................... 15µVp-p High Resolution (0.05%) and Wide Dynamic Range (72 dB) High Impedance Differential Input Low Input Leakage Current ....................... 1pA Typ 10pA Max Direct LCD Drive – No External Components Precision Null Detection with True Polarity at Zero Crystal Clock Oscillator Available in DIP, Compact Flat Package or PLCC Convenient 9V Battery Operation with Low Power Dissipation (600µA Typical, 1mW Maximum) ■ ■ ■ ■ ■ ■ ■ 2 Thermometry Digital Meters — Voltage/Current/Power — pH Measurement — Capacitance/Inductance — Fluid Flow Rate/Viscosity — Humidity — Position Panel Meters LVDT Indicators Portable Instrumentation Digital Scales Process Monitors Gaussometers Photometers 3 4 ORDERING INFORMATION Part No. Temp. Range Package Max VREF Tempco TC811CKW 44-PQFP 0°C to +70°C 75 ppm/°C TC811CPL 40-Pin Plastic DIP 0°C to +70°C 75 ppm/°C FUNCTIONAL BLOCK DIAGRAM 5 TYPICAL SEGMENT OUTPUT + V 0.5mA SEGMENT OUTPUT LCD DISPLAY 2mA TC811CPL INTERNAL DIGITAL GROUND 6 BACKPLANE 21 + C REF + VREF 35 CREF – VREF – V BUFF C REF 33 36 CAZ RINT 34 V CINT + 38 28 LCD SEGMENT DRIVERS VINT 29 27 INTEGRATOR 10 µA ZI & A/Z – – ZI & A/Z 7 SEGMENT DECODE 7 SEGMENT DECODE 200 DATA LATCH – A/Z 31 INT DE (–) COMPARATOR DE (+) A/Z ANALOG COMMON + + + ZI + V IN 7 SEGMENT DECODE TO DIGITAL SECTION – DE (+) 32 – 30 V IN + DE (–) LOW TEMPCO VREF TENS UNITS TO SWITCH DRIVERS FROM COMPARATOR OUTPUT CLOCK V+– 3.0V 26 – 38 ≈70kΩ fOSC 4 AZ & DE (±) INT HUNDREDS THOUSANDS CONTROL LOGIC INTERNAL DIGITAL GOUND V 6.2V TEST 500Ω VTH = 1V 26 40 OSC 1 39 22MΩ 1 OSC 2 7 V+ V– HLDR 8 470k V + 20pF 10pF V kH TELCOM SEMICONDUCTOR, INC. + TC811-7 11/5/96 3-137 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 GENERAL DESCRIPTION The TC811 is a low power, 3-1/2 digit, LCD display analog-to-digital converter. This device incorporates both a display hold feature and differential reference inputs. A crystal oscillator, which only requires two pins, permits added features while retaining a 40-pin package. An additional feature is an "Integrator Output Zero" phase which guarantees rapid input overrange recovery. The TC811 display hold (HLDR) function can be used to "freeze" the LCD display. The displayed reading will remain indefinitely as long as HLDR is held high. Conversions continue but the output data display latches are not updated. The TC811 also includes a differential reference for easy ratiometric measurements. Circuits which use the 7106/26/36 can easily be upgraded to include the hold function with the TC811. The TC811 has an improved internal zener reference voltage circuit which maintains the Analog Common temperature drift to 35ppm/°C (typical) and 75ppm/°C (maximum). This represents an improvement of two to four times over similar 3-1/2 digit converters, eliminating the need for a costly, space consuming external reference source. The TC811 limits linearity error to less than one count on both the 200mV and the 2.00V full-scale ranges. Rollover error—the difference in readings for equal magnitude but opposite polarity input signals—is below ±1 count. High impedance differential inputs offer 1pA leakage currents and a 1012Ω input impedance. The 15µVp-p noise performance guarantees a “rock solid” reading. The Auto Zero cycle guarantees a zero display readout for a zero volt input. The single chip CMOS TC811 incorporates all the active devices for a 3-1/2 digit analog to digital converter to directly drive an LCD display. Onboard oscillator, precision voltage reference and display segment and backplane drivers sim- plify system integration, reduce board space requirements and lower total cost. A low cost, high resolution (0.05%) indicating meter requires only a TC811, an LCD display, five resistors, six capacitors, a crystal, and a 9V battery. Compact, hand held multimeter designs benefit from the TelCom Semiconductor small footprint package option. The TC811 uses a dual slope conversion technique which will reject interference signals if the converters integration time is set to a multiple of the interference signal period. This is especially useful in industrial measurement environments where 50, 60 and 400Hz line frequency signals are present. ABSOLUTE MAXIMUM RATINGS* Supply Voltage (V+ to V –)............................................ 15V Analog Input voltage (Either Input)1 ..................... V+ to V – Reference Input Voltage ...................................... V+ to V – Clock Input ...................................................... TEST to V+ Power Dissipation2 (TA ≤ 70°C) 44-Pin Flat Package .........................................1.00W 40-Pin Plastic DIP .............................................1.23W Operating Temperature Range Commercial Package (C) ...................... 0°C to +70°C Industrial Package (I) ........................ – 25°C to +85°C Storage Temperature Range ................ – 65°C to +150°C Lead Temperature (Soldering, 10 sec) ................. +300°C *Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: VSupply = 9V, fCLOCK = 32.768kHz, and TA = 25°C, unless otherwise noted. Symbol Parameter Test Conditions Input — Zero Input Reading — — Zero Reading Drift Ratiometric Reading VIN = 0V VFS = 200mV VIN = 0V, 0°C ≤ TA ≤ 70°C VIN = VREF, VREF = 100mV NL ER eN IL CMRR Linearity Error Roll Over Error Noise Input Leakage Current Common-Mode Rejection 3-138 VFS = 200mV or 2.000V VIN– = VIN+ ≈ 200mV VIN = 0V, VFS = 200mV VIN = 0V VCM = ±1V, VIN = 0V, VFS = 200mV Min Typ Max – 000.0 ±000.0 +000.0 — 999 0.2 999/1000 1 1000 –1 –1 — — — ±0.2 ±0.2 15 1 50 +1 +1 — 10 — Unit Digital Reading µV/°C Digital Reading Counts Counts µVP-P pA µV/V TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS 1 TC811 ELECTRICAL CHARACTERISTICS: VSupply = 9V, fCLOCK = 32.768kHz, and TA = 25°C, unless otherwise noted. Symbol Parameter Test Conditions TCSF Scale Factor Temperature Coefficient Analog Common Section VCTC Analog Common Temperature Coefficient VC Analog Common Voltage Min Typ Max Unit VIN = 199mV, 0°C ≤ TA ≤ 70°C (ext. VREF tc = 0ppm) — 1 5 ppm/°C 250KΩ from V+ to Analog Common 0°C ≤ TA ≤ 70°C "C" Commercial "I" Industrial 250kΩ from V+ to Analog Common — — — — 2.7 — — 35 35 3.05 — — 75 100 3.35 — — ppm/°C ppm/°C Volts Hold Pin Input Section Input Resistance VIL Input Low Voltage VIH Input High Voltage Pin 1 to Pin 37 Pin 1 Pin 1 — — V+ – 1.5 70 — — — Test +1.5 — kΩ V V LCD Drive Section3 VSD LCD Segment Drive Voltage VSD LCD Backplane Drive Voltage V + to V – = 9V V+ to V– = 9V 4 4 5 5 6 6 VP-P VP-P Power Supply ISUP Power Supply Current VIN = 0V, V + to V– = 9V — — — — fOSC = 16kHz — 70 100 µA fOSC = 48kHz — 90 125 µA NOTES: 1. Input voltages may exceed supply voltages when input current is limited to 100µA. 2. Dissipation rating assumes device is mounted with all leads soldered to a printed circuit board. 3. Backplane drive is in phase with the segment drive for "segment off" 180° out of phase for "segment on." Frequency is 20 times the conversion rate. Average DC component is less than 50mV. 2 3 4 5 G1 7 34 E1 8 33 D2 9 32 C2 10 31 B2 11 A2 12 29 F2 13 28 VBUFF E2 14 30 27 V INT D3 15 26 V– B3 16 25 G2 10's F3 17 24 C3 E3 18 23 A3 AB4 19 22 G3 POL 20 (MINUS SIGN) 21 BP (BACKPLANE) 1000's 35 34 33 NC NC 2 32 G 31 C 3 V+ 4 30 A 3 NC 5 29 G 3 OSC 2 6 28 BP TC811CKW (PQFP) OSC 1 7 6 2 TEST 3 27 POL 26 AB 4 HLDR 8 D1 9 25 E3 C 1 10 24 F3 B 1 11 23 B3 12 13 14 15 16 E1 TC811CPL (40-PIN PDIP) 36 17 18 19 20 21 22 7 D3 35 37 V INT V– 6 38 E2 F1 41 40 39 CAZ V BUFF 36 42 F2 5 44 43 NC 1 A2 A1 TEST V REF+ CREF+ CREF– VREF– ANALOG COMMON V IN+ V IN– CAZ B2 37 COM 4 VIN + VIN – 3 B1 C2 C1 D2 2 F1 100's 1 D1 G1 10's 40 OSC 1 NORMAL PIN CONFIGURATION 39 OSC 2 38 V + HLDR A1 1's VREF+ + CREF CREF – VREF– PIN CONFIGURATIONS 100's 8 NC = NO INTERNAL CONNECTION TELCOM SEMICONDUCTOR, INC. 3-139 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 PIN DESCRIPTION Pin No. 40-Pin Plastic DIP 3-140 Symbol Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 HLDR D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3 AB4 POL BP G3 A3 C3 G2 V– VINT VBUFF CAZ VIN– VIN+ COM VREF– Hold pin, logic 1 holds present display reading. Activates the D section of the units display. Activates the C section of the units display. Activates the B section of the units display. Activates the A section of the units display. Activates the F section of the units display. Activates the G section of the units display. Activates the E section of the units display. Activates the D section of the tens display. Activates the C section of the tens display. Activates the B section of the tens display. Activates the A section of the tens display. Activates the F section of the tens display. Activates the E section of the tens display. Activates the D section of the hundreds display. Activates the B section of the hundreds display. Activates the F section of the hundreds display. Activates the E section of the hundreds display. Activates both halves of the 1 in the thousands display. Activates the negative polarity display. Backplane drive output. Activates the G section of the hundreds display. Activates the A section of the hundreds display. Activates the C section of the hundreds display. Activates the G section of the tens display. Negative power supply voltage. Integrator output, connection for CINT. Buffer output, connection for RINT. Integrator input, connection for CAZ. Analog input low. Analog input high. Analog Common: Internal zero reference. Reference input low. 34 35 36 37 38 39 40 CREF– CREF+ VREF+ TEST V+ OSC2 OSC1 Negative connection for reference capacitor. Positive connection for reference capacitor. Reference input high. All LCD segment test when pulled high (V+). Positive power supply voltage. Crystal oscillator output. Crystal oscillator input. TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS 1 TC811 0.1µF 0.01µF LCD POL BP 32 ANALOG COMMON V 0.47 µF 29 180kΩ 0.068µF 27 VBUFF TC811 CAZ + 21 MINUS SIGN REF VOLTAGE + 9V PHASE CONTROL CONTROL LOGIC POLARITY CONTROL CLOCK 3 10k Ω 2 CONVERSION/SEC 40 TO ANALOG COMMON (PIN 32) 22MΩ 470k + SWITCH DRIVER 1 HLDR 36 + VREF 2 COMPARATOR – +/– BACKPLANE 38 240kΩ 39 20pF + 20 – V REF 33 – 26 V OSC1 VINT OSC2 INTEGRATOR – 9–19 SEGMENT 22–25 DRIVE – 30 V IN 28 C ANALOG INPUT SIGNAL VIN VIN FIXED SIGNAL INTEGRATE TIME 10pF V+ V+ Figure 1. Typical Operating Circuit (All Pin Designations Refer to 40-Pin DIP Package) The TC811 is a dual slope, integrating analog-to-digital converter. An understanding of the dual slope conversion technique will aid the user in following the detailed TC811 theory of operation following this section. A conventional dual slope converter measurement cycle has two distinct phases: 1) Input Signal Integration 2) Reference Voltage Integration (Deintegration) Referring to Figure 2, the unknown input signal to be converted is integrated from zero for a fixed time period (TINT), measured by counting clock pulses. A constant reference voltage of the opposite polarity is then integrated until the integrator output voltage returns to zero. The reference integration (deintegration) time (TDEINT) is then directly proportional to the unknown input voltage (VIN). In a simple dual slope converter, a complete conversion requires the integrator output to “ramp-up” from zero and “ramp-down” back to zero. A simple mathematical equation relates the input signal, reference voltage and integration time: tINT 1 VREF tDEINT VIN(t) dt = RINT CINT 0 RINT CINT ∫ ≈ VFULL SCALE ≈ 1.2 VFULL SCALE VARIABLE REFERENCE INTEGRATE TIME 4 Figure 2. Basic Dual Slope Converter 30 NORMAL MODE REJECTION (dB) GENERAL THEORY OF OPERATION Dual-Slope Conversion Principles COUNTER DISPLAY INTEGRATOR OUTPUT 1MΩ + ANALOG INPUT – 33 C 34 REF 35 C+ REF 31 + V IN 5 20 10 T = MEASUREMENT PERIOD 0 0.1/T 1/T INPUT FREQUENCY 10/T Figure 3. Normal-Mode Rejection of Dual Slope Converter For a constant VINT: VIN = VREF 7 [ ] tDEINT tINT where: VREF = Reference voltage tINT = Integration Time tDEINT = Deintegration Time TELCOM SEMICONDUCTOR, INC. 6 8 3-141 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 Accuracy in a dual slope converter is unrelated to the integrating resistor and capacitor values as long as they are stable during a measurement cycle. An inherent benefit of the dual slope technique is noise immunity. Noise spikes are integrated or averaged to zero during the integration periods, making integration ADCs immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals, with frequency components at multiples of the averaging (integrating) period, will be attenuated. (see Figure 3). Integrating ADCs commonly operate with the signal integration period set to a multiple of the 50/60Hz power line period. THEORY OF OPERATION Analog Section In addition to the basic integrate and deintegrate dualslope cycles discussed above, the TC811 design incorporates an “Integrator Output Zero” cycle and an “Auto Zero” cycle. These additional cycles ensure the integrator starts at 0V (even after a severe overrange conversion) and that all offset voltage errors (buffer amplifier, integrator and comparator) are removed from the conversion. A true digital zero reading is assured without any external adjustments. A complete conversion consists of four distinct phases: (1) (2) (3) (4) Integrator Output Zero Cycle Auto Zero Cycle Signal Integrate Cycle Reference Deintegrate Cycle Integrator Output Zero Cycle This phase guarantees that the integrator output is at zero volts before the system zero phase is entered, ensuring that the true system offset voltages will be compensated for even after an overrange conversion. The duration of this phase is variable, being a function of the number of counts (clock cycles) required for deintegration. The Integrator Output Zero cycle will last from 11 to 140 counts for non-over-range conversions and from 31 to 640 counts for overrange conversions. Auto Zero Cycle During the Auto Zero cycle, the differential input signal is disconnected from the measurement circuit by opening internal analog switches and the internal nodes are shorted to Analog Common (0V ref.) to establish a zero input condition. Additional analog switches close a feedback loop around the integrator and comparator to permit comparator offset voltage error compensation. A voltage established on CAZ then compensates for internal device offset voltages 3-142 1000 INT 1–2000 DE-INT 11–140 ZI AZ 910–2900 4000 Figure 4a. Conversion Timing During Normal Operation INT 1000 2001–2090 DE-INT 31–640 ZI AZ 300–910 4000 Figure 4b. Conversion Timing During Overrange Operation during the measurement cycle. The Auto Zero cycle residual is typically 10 to 15µV. The Auto Zero duration is from 910 to 2,900 counts for non-over-range conversions and from 300 to 910 counts for overrange conversions. Signal Integration Cycle Upon completion of the Auto Zero cycle, the Auto Zero loop is opened and the internal differential inputs connect to VIN+ and VIN–. The differential input signal is then integrated for a fixed time period which, in the TC811 is 1000 counts (4000 clock periods). The externally set clock frequency is divided by four before clocking the internal counters. The integration time period is: TINT = 4000 fOSC The differential input voltage must be within the device common-mode range when the converter and measured system share the same power supply common (ground). TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS 1 TC811 If the converter and measured system do not share the same power supply common, as in battery powered applications, VIN– should be tied to Analog Common. Polarity is determined at the end of signal integration phase. The sign bit is a “true polarity” indication in that signals less than 1 LSB are correctly determined. This allows precision null detection which is limited only by device noise and Auto Zero residual offsets. Reference Integrate (Deintegrate) Cycle The reference capacitor, which was charged during the Auto Zero cycle, is connected to the input of the integrating amplifier. The internal sign logic insures that the polarity of the reference voltage is always connected in the phase which is opposite to that of the input voltage. This causes the integrator to ramp back to zero at a constant rate which is determined by the reference potential. The amount of time required (TDEINT) for the integrating amplifier to reach zero is directly proportional to the amplitude of the voltage that was put on the integrating capacitor (VINT) during the integration cycle: TDEINT = RINT CINT VINT VREF The digital reading displayed Is: – Digital Count = 1000 VIN+ – V IN VREF The oscillator frequency is divided by 4 prior to clocking the internal decade counters. The four phase measurement cycle takes a total of 4000 counts or 16000 clock pulses. The 4000 count cycle is independent of input signal magnitude or polarity. Each phase of the measurement cycle has the following length: 1) Auto Zero: 300 to 2900 Counts 2) Signal Integrate: 1000 Counts the need for an external reference. Some minor component changes are required to upgrade existing designs, reduce power dissipation, and improve the overall performance. (see Oscillator Components) 2 Digital Section The TC811 contains all the segment drivers necessary to directly drive a 3-1/2 digit liquid crystal display (LCD). An LCD backplane driver is included. The backplane frequency is the external clock frequency divided by 800. For three conversions/second the backplane frequency is 60Hz with a 5V nominal amplitude. When a segment driver is in phase with the backplane signal the segment of “OFF”. An out of phase segment drive signal causes the segment to be “ON” or visible. This AC drive configuration results in negligible DC voltage across each LCD segment. This insures long LCD display life. The polarity segment driver is “ON” for negative analog inputs. If VIN+ and VIN– are reversed then this indicator would reverse. 3 4 TEST Function (TEST) On the TC811, when TEST is pulled to a logical “HIGH”, all segments are turned “ON”. The display will read “-1888”. During this mode the LCD segments have a constant DC voltage impressed. Do not leave the display in this mode for more than several minutes. LCD displays may be destroyed if operated with DC levels for extended periods. The display FONT and segment drive assignment are shown in Figure 5. 5 DISPLAY FONT 6 1000's 100's 10's 1's This time period is fixed. The integration period is: TINT = 4000 fOSC 7 = 1000 Counts Figure 5. Display FONT and Segment Assignment Where fOSC is the crystal oscillator frequency. 3) Reference Integrate: 0 to 2000 Counts 4) Integrator Output Zero: 11 to 640 Counts The TC811 can replace the ICL7106/26/36 in circuits which require both the hold function and a differential reference. The TC811 offers a greatly improved internal reference temperature coefficient, which can often eliminate TELCOM SEMICONDUCTOR, INC. HOLD Reading Input (HLDR) When HLDR is at a logic “HI” the latch will not be updated. Conversions will continue but will not be updated until HLDR is returned to “LOW”. To continuously update the display, connect HLDR to ground or leave it open. This input is CMOS compatible and has an internal resistance of 70kΩ (typical) tied to TEST. 3-143 8 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 COMPONENT VALUE SELECTION Auto Zero Capacitor - CAZ The value of the Auto Zero capacitor (CAZ) has some influence on system noise. A 0.47µF capacitor is recommended for 200mV full-scale applications where 1LSB is 100µV. A 0.10µF capacitor should be used for 2.0V fullscale applications. A capacitor with low dielectric absorption (Mylar) is required. Reference Voltage Capacitor -CREF The reference voltage used to ramp the integrator output voltage back to zero during the reference integrate cycle is stored on CREF. A 0.1µF capacitor is typical. If the application requires a sensitivity of 200mV full-scale, increase CREF to 1.0µF. Rollover error will be held to less than 1/2 count. A good quality, low leakage capacitor, such as Mylar, should be used. Integrating Capacitor - CINT CINT should be selected to maximize integrator output voltage swing without causing output saturation. Analog common will normally supply the differential voltage reference. For this case a ±2V integrator output swing is optimum when the analog input is near full-scale. For 2 or 2.5 reading/ second (fOSC = 32kHz or 40kHz) and VFS = 200mV, a .068µF value is suggested. If a different oscillator frequency is used, CINT must be changed in inverse proportion to maintain the nominal ±2V integrator swing. An exact expression for CINT is : CINT = 4000 VFS VINT RINT fOSC where: fOSC = Clock frequency at Pin 39 VFS = Full-scale input voltage RINT = Integrating resistor VINT = Desired full-scale integrator output swing CINT must have low dielectric absorption to minimize roll-over error. A polypropylene capacitor is recommended. Integrating Resistor -RINT The input buffer amplifier and integrator are designed with class A output stages which have idling currents of 6µA. The integrator and buffer can supply 1µA drive currents with negligible linearity errors. RINT is chosen to remain in the output stage linear drive region but not so large that printed circuit board leakage currents induce errors. For a 200mV full-scale, RINT should be about 180kΩ. A 2.0V full-scale requires abut 1.8MΩ. 3-144 Oscillator Components The internal oscillator has been designed to operate with a quartz crystal, such as the Statek CX-1V series. Such crystals are very small and are available in a variety of standard frequencies. Note that fOSC is divided by four to generate the TC811 internal control clock. The backplane drive signal is derived by dividing fOSC by 800. To achieve maximum rejection of ac-line noise pickup, a 40kHz crystal should be used. This frequency will yield an integration period of 100msec and will reject both 50Hz and 60Hz noise. For prototyping or cost-sensitive applications a 32.768kHz watch crystal can be used, and will produce about 25dB of line-noise rejection. Other crystal frequencies, from 16kHz to 48kHz, can also be used. Pins 39 and 40 make up the oscillator section of the TC811. Figures 6a and 6b show some typical conversion rate component values. The LCD backplane frequency is derived by dividing the oscillator frequency by 800. Capacitive loading of the LCD may compromise display performance if the oscillator is run much over 48kHz. Reference Voltage (VREF) A full-scale reading (2000 counts) requires the input signal be twice the reference voltage. In some applications a scale factor other than unity may exist, such as between a transducer output voltage and the required digital reading. Assume, for example, a pressure transducer output is 400mV for 2000lb/in2. Rather than dividing the input voltage by two, the reference voltage should be set to 200mV. This permits the transducer input to be used directly. TC811 OSC1 40 22MΩ 40.0 kHz 10pF OSC2 39 V+ 38 470k 9V 20pF + Figure 6a. TC811 Oscillator TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS 1 TC811 Oscillator Freq. (kHz) inputs permit ratiometric measurements and simplify interfacing with sensors such as load cells and temperature sensors. The TC811 is ideally suited to applications in handheld multimeters, panel meters, and portable instrumentation. The reference voltage can be generated anywhere within the V+ to V– power supply range. To prevent rollover type errors from being induced by large common-mode voltages, CREF should be large compared to stray node capacitance. A 0.1µF capacitor is a typical value. The TC811 offers a significantly improved Analog Common temperature coefficient. This provides a very stable voltage suitable for use as a voltage reference. The temperature coefficient of Analog Common is typically 35ppm/°C. Full-Scale Voltage (VFS) 200mV 2.0V RINT CINT RINT CINT 32.768 40 180k 150k 0.068µF 0.068µF 1.8M 1.5M 0.068µF 0.068µF Figure 6b. DEVICE PIN FUNCTIONAL DESCRIPTION Differential Signal Inputs (VIN+ (Pin 31), VIN– (Pin 30)) The TC811 is designed with true differential inputs and accepts input signals within the input stage common mode voltage range (VCM). The typical range is V+ – 1.0 to V– + 1.5V. Common-mode voltages are removed from the system when the TC811 operates from a battery or floating power source (isolated from measured system) and VIN– is connected to Analog Common. (see Figure 8) In systems where common-mode voltages exist, the 86dB common-mode rejection ratio minimizes error. Common-mode voltages do, however, affect the integrator output level. A worse case condition exists if a large positive VCM exists in conjunction with a full-scale negative differential signal. The negative signal drives the integrator output positive along with VCM (Figure 8). For such applications the integrator output swing can be reduced below the recommended 2.0V full-scale swing. The integrator output will swing within 0.3V of V+ or V– without increased linearity error. CI INPUT BUFFER 3 4 RI + + 2 – – VIN VI + INTEGRATOR – TI VI = V – VIN RI CI CM Where: 4000 T I = INTEGRATION TIME = f OSC [ VCM [ 5 C I = INTEGRATION CAPACITOR R I = INTEGRATION RESISTOR – + Reference (V REF (Pin 36), V REF (Pin 33) Unlike the ICL7116, the TC811 has a differential reference as well as the “hold” function. The differential reference Figure 8. Common-Mode Voltage Reduces Available Integrator Swing. (VCOM ≠ VIN) SEGMENT DRIVE MEASURED SYSTEM V+ V– V– GND LCD DISPLAY 10pF VBUF V+ CAZ VINT POL BP OSC1 20MΩ 20 pF OSC2 V– V+ 470k V+ V – GND POWER SOURCE 7 V+ 40kHZ TC811 ANALOG – + + COMMON VREF VREF V 6 + 9V 8 – Figure 7. Common-Mode Voltage Removed in Battery Operation With V IN = Analog Common TELCOM SEMICONDUCTOR, INC. 3-145 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 Analog Common (Pin 32) The Analog Common pin is set at a voltage potential approximately 3.0V below V+. This potential is guaranteed to be between 2.70V and 3.35V below V+. Analog common is tied internally to an N channel FET capable of sinking 100µA. This FET will hold the common line at 3.0V below V+ should an external load attempt to pull the common line toward V+. Analog common source current is limited to 1µA. Analog common is therefore easily pulled to a more negative voltage (i.e. below V+– 3.0V). + The TC811 connects the internal VIN and VIN– inputs to Analog Common during the Auto Zero cycle. During the reference integrate phase VIN– is connected to Analog Common. If VIN– is not externally connected to Analog Common, a common-mode voltage exists. This is rejected by the converter’s 86dB common-mode rejection ratio. In – battery powered applications, Analog Common and VIN are usually connected, removing common-mode voltage concerns. In systems where VIN– is connected to the power supply ground or to a given voltage, Analog Common should be connected to VIN– . The Analog Common pin serves to set the analog section reference or common point. The TC811 is specifically designed to operate from a battery or in any measurement system where input signals are not referenced (float) with respect to the TC811 power source. The Analog Common potential of V+ – 3.0V gives a 7V end of battery life voltage. The analog common potential has a voltage coefficient of 0.001%/%. With a sufficiently high total supply voltage (V+ – V– > 7.0V), Analog Common is a very stable potential with excellent temperature stability (typically 35ppm/°C). This potential can be used to generate the TC811 reference voltage. An external voltage reference will be unnecessary in most cases because of the 35ppm/°C temperature coefficient. See TC811 Internal Voltage Reference discussion. TEST (Pin 37) The TEST pin potential is 5V less the V+. TEST may be used as the negative power supply connection when interfacing the TC811 to external CMOS logic. The TEST pin is tied to the internally generated negative logic supply through a 500Ω resistor. The TEST pin may be used to sink up to 1mA. See the applications section for additional information on using TEST as a negative digital logic supply. If TEST is pulled “HIGH” (V+), all segments plus the minus sign will be activated. Do not operate in this mode for more than several minutes, because when TEST is pulled to V+, the LCD Segments are impressed with a DC voltage which may cause damage to the LCD. 3-146 APPLICATIONS INFORMATION Decimal Point and Annunciator Drive The TEST pin is connected to the internally generated digital logic supply ground through a 500Ω resistor. The TEST pin may be used as the negative supply for external CMOS gate segment drivers. LCD display annunciators for decimal points, low battery indication, or function indication may be added without adding an additional supply. No more than 1mA should be supplied by the TEST pin. The TEST pin potential is approximately 5V below V+. Internal Voltage Reference The TC811 Analog Common voltage temperature stability has been significantly improved. This improved device can be used to upgrade old systems and design new systems without external voltage references. External R and C values do not need to be changed, however, noise performance will be improved by increasing CAZ (See Auto Zero Capacitor section). Figure 10 shows Analog Common supplying the necessary voltage reference for the TC811. V+ V+ 4049 TC811 TO LCD DECIMAL POINT BP GND TEST TO LCD BACKPLANE V+ V+ TC811 BP TO LCD DECIMAL POINTS DECIMAL POINT SELECT HDLR TO "HOLD" ANNUNCIATOR TEST 4030 GND Figure 9. Display Annunciator Drivers TELCOM SEMICONDUCTOR, INC. 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS 1 TC811 Liquid Crystal Display Sources 9V Several LCD manufactures supply standard LCD displays to interface with the TC811 3-1/2 digit analog-to-digital converter. 2 + 38 26 Manufacturer Address/Phone Crystaloid Electronics 5282 Hudson Dr., Hudson, OH 44236 216-655-2429 770 Airport Blvd., Burlingame, CA 94010 415-347-9916 3415 Kashikawa St., Torrence, CA 90505 212-534-0360 612 E. Lake St., Lake Mills, WI 53551 414-648-2361 AND EPSON Hamlin, Inc. *NOTE: V– Representative Part Numbers* V+ 240kΩ TC811 C5335, H5535, T5135, SX440 + VREF 36 3 10kΩ VREF FE 0801, FE 0203 – VREF 33 ANALOG 32 COMMON LD-B709BZ LD-H7992AZ SET VREF = 1/2 VFULL SCALE 3902, 3933, 3903 Figure 10. TC811 Internal Voltage Reference Connection 4 Contact LCD manufacturer for full product listing/specifications. Oscillator Crystal Source Manufacturer Address/Phone STATEK 512 N-Main Orange, CA 92668 714-639-7810 Representative Part Numbers R UNKNOWN The TC811 true differential input and differential reference make ratiometric readings possible. In ratiometric operation, an unknown resistance is measured with respect to a known standard resistance. No accurately defined reference voltage is needed. The unknown resistance is put in series with a known standard and a current is passed through the pair (Figure 11). The voltage developed across the unknown is applied to the input and the voltage across the known resistor applied to the reference input. If the unknown equals the standard, the input voltage will equal the reference voltage and the display will read 1000. The displayed reading can be determined from the following expression: RUNKNOWN RSTANDARD REF 5 LCD + V IN CX-1V 40.0 Ratiometric Resistance Measurements Displayed reading = R STANDARD + V + HLDR VREF – V TC811 – V IN ANALOG COMMON 6 Figure 11. Low Parts Count Ratio Metric Resistance Measurement 7 x 1000 The display will overrange for RUNKNOWN ≥ 2 X RSTANDARD. TELCOM SEMICONDUCTOR, INC. 8 3-147 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 + 160 kΩ 1N4148 SENSOR R2 50 kΩ 300 kΩ R1 50 kΩ 300 kΩ 9V V+ – VIN + VIN 5.6 kΩ V– 1N914 R1 20 kΩ + V – VIN + VIN 0.7%/°C PTC – VREF R3 R2 20 kΩ V – TC811 + VREF – VREF HLDR Figure 12. Temperature Sensor 3-148 160 kΩ TC811 VFS = 200 MV + VREF COMMON 9V + V+ COMMON HLDR V+ Figure 13. Positive Temperature Coefficient Resistor Temperature Sensor TELCOM SEMICONDUCTOR, INC.