® RT7266 3A, 18V, 700kHz ACOTTM Synchronous Step-Down Converter General Description Features The RT7266 is an adaptive on-time ACOT TM mode synchronous buck converter. The adaptive on-time ACOTTM mode control provides a very fast transient response with few external components. The low impedance internal MOSFET can support high efficiency operation with wide input voltage range from 4.5V to 18V . The proprietary circuit of the RT7266 enables to support all ceramic capacitors. The output voltage can be adjustable between 0.8V and 8V. The soft-start is adjustable by an external capacitor. z z z z z z z z z z z Ordering Information RT7266 z z z Package Type SP : SOP-8 (Exposed Pad-Option 2) Lead Plating System Z : ECO (Ecological Element with Halogen Free and Pb free) z Applications z Note : z Richtek products are : z RoHS compliant and compatible with the current require- z ments of IPC/JEDEC J-STD-020. z Suitable for use in SnPb or Pb-free soldering processes. Marking Information ACOTTM Mode Enables Fast Transient Response 4.5V to 18V Input Voltage Range 3A Output Current 60mΩ Ω Internal Low Site N-MOSFET Adaptive On-Time Control Fast Transient Response Support All Ceramic Capacitors Up to 95% Efficiency 700kHz Switching Frequency Adjustable Output Voltage from 0.8V to 8V Adjustable Soft-Start Cycle-by-Cycle Current Limit Input Under Voltage Lockout Thermal Shutdown Protection RoHS Compliant and Halogen Free Industrial and Commercial Low Power Systems Computer Peripherals LCD Monitors and TVs Green Electronics/Appliances Point of Load Regulation for High-Performance DSPs, FPGAs, and ASICs Pin Configurations RT7266ZSP : Product Number RT7266 ZSPYMDNN (TOP VIEW) YMDNN : Date Code 8 EN FB 2 PVCC 3 SS 4 GND VIN 7 BOOT 6 SW 5 GND 9 SOP-8 (Exposed Pad) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS7266-02 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT7266 Typical Application Circuit VIN C1 10µF x 2 C2 0.1µF 1 EN 5, 9 (Exposed Pad) GND Chip Enable C5 3.9nF L1 1.4µH RT7266 6 8 SW VIN 4 SS BOOT 7 C6 0.1µF C3 C7 22µF x 2 R1 8.25k VOUT 1.05V/3A FB 2 PVCC 3 VPVCC R2 22.1k C4 1µF Table 1. Suggested Component Values VOUT (V) R1 (kΩ) R2 (kΩ) C3 (pF) L1 (μH) C7 (μF) 1 6.81 22.1 -- 1.4 22 to 68 1.05 8.25 22.1 -- 1.4 22 to 68 1.2 12.7 22.1 -- 1.4 22 to 68 1.8 30.1 22.1 5 to 22 2 22 to 68 2.5 49.9 22.1 5 to 22 2 22 to 68 3.3 73.2 22.1 5 to 22 2 22 to 68 5 124 22.1 5 to 22 3.3 22 to 68 7 180 22.1 5 to 22 3.3 22 to 68 Functional Pin Description Pin No. Pin Name 1 EN 2 FB 3 PVCC 4 SS 5, 9 (Exposed pad) GND Pin Function Enable Input. A logic-high enables the converter; a logic-low forces the RT7266 into shutdown mode reducing the supply current to less than 10μA. Attach this pin to VIN with a 100kΩ pull up resistor for automatic start-up. Feedback Input. It is used to regulate the output of the converter to a set value via an external resistive voltage divider. The feedback reference voltage is 0.765V typically. Internal Regulator Output. Connect a 1μF capacitor to GND to stabilize output voltage. Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 3.9nF capacitor sets the soft-start period to 1.5ms. Ground. The Exposed pad should be soldered to a large PCB and connected to GND for maximum thermal dissipation. 6 SW Switch Node. Connect this pin to an external L-C filter. 7 BOOT Bootstrap for High Side Gate Driver. Connect a 0.1μF or greater ceramic capacitor from BOOT to SW pins. 8 VIN Supply Input. The input voltage range is from 4.5V to 18V. Must bypass with a suitable large ( ≥10μF x 2) ceramic capacitor. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS7266-02 September 2012 RT7266 Function Block Diagram VIN PVCC Reg BOOT UGATE OC Control SW Driver LGATE FB On-Time GND EN + Soft-Start EN - SS Comparator VREF Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS7266-02 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT7266 Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Voltage, VIN ----------------------------------------------------------------------------------------------Switch Voltage, SW ----------------------------------------------------------------------------------------------< 10ns ----------------------------------------------------------------------------------------------------------------BOOT to SW -------------------------------------------------------------------------------------------------------All Other Pins ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------Junction Temperature Range ------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------- Recommended Operating Conditions z z z −0.3V to 20V −0.8V to (VIN + 0.3V) −5V to 25V −0.3V to 6V −0.3V to 6V 1.333W 75°C/W 15°C/W 150°C 260°C −65°C to 150°C (Note 3) Supply Voltage, VIN ----------------------------------------------------------------------------------------------- 4.5V to 18V Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Supply Current Shutdown Current ISHDN VEN = 0V -- 1 10 μA Quiescent Current IQ VEN = 3V, VFB = 1V -- 0.7 -- mA Logic-High 2 -- 5.5 Logic-Low -- -- 0.4 Logic Threshold EN Voltage V V REF Voltage and Discharge Resistance Feedback Reference Voltage VREF 4.5V ≤ V IN ≤ 18V 0.753 Feedback Input Current IFB VFB = 0.8V −0.1 0 0.1 VPVCC 6V ≤ VIN ≤ 18V, 0 < IPVCC < 5mA 0.765 0.777 V μA V PVCC Output V PVCC Output Voltage 4.7 5.1 5.5 V Line Regulation 6V ≤ VIN ≤ 18V, IPVCC = 5mA -- -- 20 mV Load Regulation 0 < IPVCC < 5mA -- -- 60 mV VIN = 6V, VPVCC = 4V -- 110 -- mA Output Current IPVCC RDS(ON) Switch On Resistance High Side RDS(ON)_H -- 90 -- Low Side RDS(ON)_L -- 60 -- 3.5 4.1 5.7 mΩ Current Limit Current limit ILIM Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 A is a registered trademark of Richtek Technology Corporation. DS7266-02 September 2012 RT7266 Parameter Thermal Shutdown Symbol Test Conditions Thermal Shutdown Threshold TSD Thermal Shutdown ΔTSD Hysteresis On-Time Timer Control VIN = 12V, VOUT = 1.05V Min Typ Max Unit -- 150 -- -- 20 -- -- 145 -- ns °C On-Time t ON Minimum On-Time t ON(MIN) -- 60 -- ns Minimum Off-Time t OFF(MIN) -- 230 -- ns Soft-Start SS Charge Current VSS = 0V 1.4 2 2.6 μA SS Discharge Current VSS = 0.5V 0.05 0.1 -- mA VIN Rising to Wake up VPVCC 3.55 3.85 4.15 -- 0.3 -- UVLO UVLO Threshold Hysteresis V Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. The device is not guaranteed to function outside its operating conditions. Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS7266-02 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT7266 Typical Operating Characteristics Efficiency vs. Output Current Output Voltage vs. Output Current 100 1.07 90 Output Voltage (V) Efficiency (%) 80 70 VOUT = 5V VOUT = 3.3V VOUT = 1.05V 60 50 40 30 1.06 1.05 VIN = 4.5V VIN = 12V VIN = 17V 1.04 20 10 VOUT = 1.05V VIN = 12V 0 1.03 0 0.5 1 1.5 2 2.5 3 0 0.5 1 Output Current (A) 1.5 2 2.5 3 Output Current (A) Frequency vs. Input Voltage Output Voltage vs. Input Voltage 900 1.07 Frequency (kHz)1 Output Voltage (V) 800 1.06 1.05 IOUT = IOUT = IOUT = IOUT = 1.04 0A 1A 2A 3A 700 600 500 VOUT = 1.05V, ILOAD = 0.1A VOUT = 1.05V 400 1.03 4 6 8 10 12 14 16 4 18 6 8 Input Voltage (V) 14 16 18 Reference Voltage vs. Input Voltage Reference Voltage vs. Temperature 0.780 0.775 0.775 Reference Voltage (V) Reference Voltage (V) 12 Input Voltage (V) 0.780 0.770 0.765 VIN = 17V VIN = 12V VIN = 4.5V 0.760 10 0.755 0.770 0.765 0.760 0.755 No Load, VOUT = 1.05V No Load, VOUT = 1.05V 0.750 0.750 -50 -25 0 25 50 75 100 Temperature (°C) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 125 4 6 8 10 12 14 16 18 Input Voltage (V) is a registered trademark of Richtek Technology Corporation. DS7266-02 September 2012 RT7266 Shutdown Current vs. Temperature 10 Quiescent Current vs. Temperature 0.8 VEN = 0V 0.8 Quiescent Current (mA) Shutdown Current (µA)1 9 8 7 6 5 VIN = 17V VIN = 12V VIN = 4.5V 4 3 2 0.7 0.7 0.6 0.5 0.5 0.4 1 0.4 0 0.3 -50 -25 0 25 50 75 100 VIN = 17V VIN = 12V VIN = 4.5V 0.6 125 VEN = 3V, VFB = 1V -50 -25 0 Temperature (°C) 50 75 8 7 7 6 6 Current Limit (A) 8 5 4 3 2 125 5 VIN = 17V VIN = 12V VIN = 4.5V 4 3 2 1 1 VOUT = 0V VOUT = 0V 0 0 4 6 8 10 12 14 16 18 -50 -25 0 25 50 75 Input Voltage (V) Temperature (°C) Load Transient Response Output Voltage Ripple VOUT (20mV/Div) VOUT (10mV/Div) IOUT (2A/Div) VSW (10V/Div) VIN = 12V, VOUT = 1.05V, IOUT = 0A to 3A Time (100μs/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS7266-02 100 Current Limit vs. Temperature Current Limit vs. Input Voltage Current Limit (A) 25 Temperature (°C) September 2012 100 125 VIN = 12V, VOUT = 1.05V, IOUT = 3A Time (500ns/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT7266 Power On from VIN Power Off from VIN VIN (20V/Div) VIN (20V/Div) VOUT (1V/Div) VOUT (1V/Div) VSW (10V/Div) VSW (10V/Div) IOUT (5A/Div) IOUT (5A/Div) VIN = 12V, VOUT = 1.05V, IOUT = 3A VIN = 12V, VOUT = 1.05V, IOUT = 3A Time (5ms/Div) Time (10ms/Div) Power On from VEN Power Off from VEN VEN (5V/Div) VEN (5V/Div) VOUT (1V/Div) VOUT (1V/Div) VSW (10V/Div) IOUT (5A/Div) VSW (10V/Div) IOUT (5A/Div) VIN = 12V, VOUT = 1.05V, IOUT = 3A Time (5ms/Div) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 VIN = 12V, VOUT = 1.05V, IOUT = 3A Time (100μs/Div) is a registered trademark of Richtek Technology Corporation. DS7266-02 September 2012 RT7266 Application Information The RT7266 is a synchronous high voltage buck converter that can support the input voltage range from 4.5V to 18V and the output current can be up to 3A. It operates using adaptive on-time ACOTTM mode control and provides a very fast transient response with few external compensation components. The RT7266 allows low external component count configuration with both low ESR and ceramic output capacitors. PWM Operation It is suitable for low external component count configuration with appropriate amount of Equivalent Series Resistance (ESR) capacitor(s) at the output. The output ripple valley voltage is monitored at a feedback point voltage. The synchronous high side MOSFET is turned on at the beginning of each cycle. After the internal one shot timer expires, the MOSFET is turned off. The pulse width of this one shot is determined by the converter's input and output voltages to keep the frequency fairly constant over the entire input voltage range. Adaptive On-Time Control The RT7266 has a unique circuit to ensure the switching frequency on 700kHz over full input voltage range and full loading range. This circuit sets the on-time one-shot timer by monitoring the input voltage and SW signal. The switching frequency will keep constant if the duty ratio is VOUT/VIN. Chip Enable Operation The EN pin is the chip enable input. Pulling the EN pin low (<0.4V) will shutdown the device. During shutdown mode, the RT7266 quiescent current drops to lower than 10μA. Driving the EN pin high (>2V, <5.5V) will turn on the device again. For external timing control, the EN pin can also be externally pulled high by adding a REN* resistor and CEN* capacitor from the VIN pin (see Figure 1). 8 VIN 4.5V to 18V 1 EN C5 t SS (ms) = PVCC 3 R2 C4 Figure 1. External Timing Control An external MOSFET can be added to implement digital control on the EN pin when no system voltage above 2V is available, as shown in Figure 2. In this case, a 100kΩ pull-up resistor, REN, is connected between VIN and the EN pin. MOSFET Q1 will be under logic control to pull down the EN pin. 8 VIN REN 100k BOOT VIN C1 7 C6 RT7266 1 EN SW 6 VOUT L1 R1 Q1 5, 9 (Exposed Pad) GND FB 2 R2 PVCC 3 C4 Figure 2. Logic Control with Low Voltage C5 (nF) × 1.065 ISS (μ A) September 2012 C7 FB 2 * : Optional C5 Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS7266-02 VOUT R1 4 SS The RT7266 contains an external soft-start clamp that gradually raises the output voltage. The soft-start timing can be programmed by the external capacitor between SS pin and GND. The chip provides a 2μA charge current for the external capacitor. If a 3.9nF capacitor is used, the soft-start will be 2ms (typ.). The available capacitance range is from 2.7nF to 220nF. L1 SW 6 4 SS 5, 9 (Exposed Pad) GND Chip Enable Soft-Start C6 CEN* Duty Ratio = VOUT/VIN = tON / T For Fixed T, Ton is proportional to VOUT/VIN. 7 RT7266 REN* Chip Enable BOOT VIN C1 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 C7 RT7266 To prevent enabling circuit when VIN is smaller than the VOUT target value, a resistive voltage divider can be placed between the input voltage and ground and connected to the EN pin to adjust IC lockout threshold, as shown in Figure 3. For example, if an 8V output voltage is regulated from a 12V input voltage, the resistor REN2 can be selected to set input lockout threshold larger than 8V. 8 VIN 12V REN1 100k BOOT VIN C1 Inductor Selection 7 C6 L1 RT7266 SW 6 1 EN VOUT 8V R1 REN2 C5 5, 9 (Exposed Pad) C7 FB 2 4 SS R2 PVCC GND 3 C4 Figure 3. The Resistors can be Selected to Set IC Lockout Threshold Output Voltage Setting The resistive divider allows the FB pin to sense the output voltage as shown in Figure 4. VOUT R1 FB RT7266 dissipation. The OTP will shut down switching operation when junction temperature exceeds 150°C. Once the junction temperature cools down by approximately 20°C the main converter will resume operation. To maintain continuous operation maximum, the junction temperature should be prevented from rising above 150°C. R2 GND Figure 4. Output Voltage Setting The inductor value and operating frequency determine the ripple current according to a specific input and an output voltage. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. V V ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥ f × L VIN ⎦ ⎣ ⎦ ⎣ Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. High frequency with small ripple current can achieve highest efficiency operation. However, it requires a large inductor to achieve this goal. For the ripple current selection, the value of ΔIL = 0.2(IMAX) will be a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : ⎡ VOUT ⎤ ⎡ VOUT ⎤ L =⎢ ⎥ × ⎢1 − VIN(MAX) ⎥ f I × Δ L(MAX) ⎣ ⎦ ⎣ ⎦ CIN and COUT Selection The output voltage is set by an external resistive divider according to the following equation. It is recommended to use 1% tolerance or better divider resistors. R1 VOUT = VFB × ( 1 + ) R2 Where VFB is the feedback reference voltage (0.765V typ.). The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the high side MOSFET. To prevent large ripple current, a low ESR input capacitor sized for the maximum RMS current should be used. The RMS current is given by : Under Voltage Lockout Protection This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. The RT7266 has Under Voltage Lockout Protection (UVLO) that monitors the voltage of PVCC pin. When the VPVCC voltage is lower than UVLO threshold voltage, the RT7266 will be turned off in this state. This is non-latch protection. Over Temperature Protection The RT7266 equips an Over Temperature Protection (OTP) circuitry to prevent overheating due to excessive power Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 V IRMS = IOUT(MAX) OUT VIN VIN −1 VOUT Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For the input capacitor, two 10μF and 0.1μF low ESR ceramic capacitors are recommended. is a registered trademark of Richtek Technology Corporation. DS7266-02 September 2012 RT7266 The selection of COUT is determined by the required ESR PVCC Capacitor Selection to minimize voltage ripple. Decouple with a 1μF ceramic capacitor. X7R or X5R grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. Moreover, the amount of bulk capacitance is also a key for COUT selection to ensure that the control loop is stable. The output ripple, ΔVOUT , is determined by : 1 ⎤ ΔVOUT ≤ ΔIL ⎡⎢ESR + ⎥⎦ 8fC OUT ⎣ The output ripple will be highest at the maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. External Bootstrap Diode Connect a 0.1μF low ESR ceramic capacitor between the BOOT and SW pins. This capacitor provides the gate driver voltage for the high side MOSFET. It is recommended to add an external bootstrap diode between an external 5V and the BOOT pin for efficiency improvement when input voltage is lower than 5.5V or duty ratio is higher than 65%. The bootstrap diode can be a low cost one such as 1N4148 or BAT54. The external 5V can be a 5V fixed input from system or a 5V output of the RT7266. Note that the external boot voltage must be lower than 5.5V 5V BOOT RT7266 0.1µF Over Current Protection When the output shorts to ground, the inductor current decays very slowly during a single switching cycle. A over current detector is used to monitor inductor current to prevent current runaway. The over current detector monitors the voltage between SW and GND during the low-side MOS turn-on state. This is cycle-by-cycle protection. The over current detector also supports temperature compensated. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) packages, the thermal resistance, θJA, is 75°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formulas : PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for SOP-8 (Exposed Pad) package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curves in Figure 6 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. SW Figure 5. External Bootstrap Diode Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS7266-02 September 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT7266 Maximum Power Dissipation (W)1 1.6 Layout Consideration Four-Layer PCB Follow the PCB layout guidelines for optimal performance of the RT7266 1.4 1.2 Keep the traces of the main current paths as short and wide as possible. 1.0 0.8 Put the input capacitor as close as possible to the device pins (VIN and GND). 0.6 0.4 SW node is with high frequency voltage swing and should be kept at small area. Keep sensitive components away from the SW node to prevent stray capacitive noise pickup. 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT7266. Figure 6. Derating Curve of Maximum Power Dissipation The GND and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection. The resistor divider must be connected as close to the device as possible. Input capacitor must be placed C1 as close to the IC as possible. VOUT R1 R2 GND C4 C5 C2 8 EN FB 2 PVCC 3 SS 4 GND VIN 7 BOOT 6 SW 5 GND 9 SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace. C6 C7 L1 VOUT Figure 7. PCB Layout Guide Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS7266-02 September 2012 RT7266 Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS7266-02 September 2012 www.richtek.com 13