74HC2GU04 Dual unbuffered inverter Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74HC2GU04 is a high-speed Si-gate CMOS device. The 74HC2GU04 provides two unbuffered inverters. 2. Features n n n n n n n n Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: u HBM JESD22-A114-D exceeds 2000 V u MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC2GU04GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74HC2GU04GV −40 °C to +125 °C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 4. Marking Table 2. Marking Type number Marking code 74HC2GU04GW PD 74HC2GU04GV HU4 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 5. Functional diagram 1 1A 1Y 6 3 2A 2Y 4 1 1 6 1 3 4 Fig 1. Logic symbol A Y mna045 mnb080 mnb079 Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) 6. Pinning information 6.1 Pinning 74HC2GU04 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y 001aaf305 Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data output 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 2 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 7. Functional description Table 4. Function table[1] Input Output nA nY L H H L [1] H = HIGH voltage level; L = LOW voltage level. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit −0.5 +7.0 V input clamping current VI < −0.5 V or VI > VCC + 0.5 V [1] - ±20 mA IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] - ±20 mA IO output current VO = −0.5 V to VCC + 0.5 V [1] - ±25 mA supply current [1] - +50 mA IGND ground current [1] - −50 mA Tstg storage temperature −65 +150 °C Ptot total power dissipation - 250 mW IIK ICC [2] [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C tr rise time VCC = 2.0 V - - 1000 ns VCC = 4.5 V - - 500 ns VCC = 6.0 V - - 400 ns VCC = 2.0 V - - 1000 ns VCC = 4.5 V - - 500 ns VCC = 6.0 V - - 400 ns tf fall time except for Schmitt trigger inputs except for Schmitt trigger inputs 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 3 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage II input leakage current ICC supply current VCC = 2.0 V 1.7 1.1 - V VCC = 4.5 V 3.6 2.4 - V VCC = 6.0 V 4.8 3.1 - V VCC = 2.0 V - 0.9 0.3 V VCC = 4.5 V - 2.1 0.9 V VCC = 6.0 V - 2.9 1.2 V IO = −20 µA; VCC = 2.0 V 1.9 2.0 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - V IO = −4.0 mA; VCC = 4.5 V 4.13 4.32 - V IO = −5.2 mA; VCC = 6.0 V 5.63 5.81 - V IO = 20 µA; VCC = 2.0 V - 0 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V VI = GND or VCC; VCC = 6.0 V - - ±0.1 µA VI = GND or VCC; IO = 0 A; - - 1.0 µA - 3.0 - pF VI = VIH or VIL VI = VIH or VIL VCC = 6.0 V CI input capacitance Tamb = −40 °C to +85 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 2.0 V 1.7 1.1 - V VCC = 4.5 V 3.6 2.4 - V VCC = 6.0 V 4.8 3.1 - V VCC = 2.0 V - 0.9 0.3 V VCC = 4.5 V - 2.1 0.9 V VCC = 6.0 V - 2.9 1.2 V IO = −20 µA; VCC = 2.0 V 1.9 2.0 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - V IO = −4.0 mA; VCC = 4.5 V 4.13 4.32 - V IO = −5.2 mA; VCC = 6.0 V 5.63 5.81 - V VI = VIH or VIL 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 4 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V - 0 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.33 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.33 V II input leakage current VI = GND or VCC; VCC = 6.0 V - - ±1.0 µA ICC supply current VI = GND or VCC; IO = 0 A; - - 10.0 µA VCC = 2.0 V 1.7 - - V VCC = 4.5 V 3.6 - - V VCC = 6.0 V 4.8 - - V VCC = 6.0 V Tamb = −40 °C to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage II input leakage current ICC supply current VCC = 2.0 V - - 0.3 V VCC = 4.5 V - - 0.9 V VCC = 6.0 V - - 1.2 V VI = VIH or VIL IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4.0 mA; VCC = 4.5 V 3.7 - - V IO = −5.2 mA; VCC = 6.0 V 5.2 - - V IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V VI = VIH or VIL IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V VI = GND or VCC; VCC = 6.0 V - - ±1.0 µA VI = GND or VCC; IO = 0 A; - - 20.0 µA VCC = 6.0 V 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 5 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter 25 °C Conditions −40 °C to +125 °C Min Typ Max Min propagation delay tpd nA to nY; see Figure 5 VCC = 2.0 V; CL = 50 pF - 13 60 - 75 90 ns VCC = 4.5 V; CL = 50 pF - 6 12 - 15 18 ns - 5 10 - 13 15 ns VCC = 2.0 V; CL = 50 pF - 18 75 - 95 125 ns VCC = 4.5 V; CL = 50 pF - 6 15 - 19 25 ns - 5 13 - 16 20 ns - 5 - - - - pF [2] nY; see Figure 5 VCC = 6.0 V; CL = 50 pF power dissipation capacitance VI = GND to VCC CPD Max (125 °C) [1] VCC = 6.0 V; CL = 50 pF transition time tt Max (85 °C) Unit [1] tpd is the same as tPLH and tPHL [2] tt is the same as tTLH and tTHL [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. [3] 12. Waveforms VI nA input VM VM GND t PHL t PLH VOH nY output 90% VM VM 10% VOL t THL t TLH mna722 Measurement points are given in Table 9. VOL and VOH are typical voltage output drop that occur with the output load. Fig 5. The data input (nA) to output (nY) propagation delays and output transition times 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 6 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter Table 9. Measurement points Input Output VM VI tr = tf VM 0.5VCC GND to VCC 6.0 ns 0.5VCC VCC VCC VI PULSE GENERATOR VO RL = 1 kΩ open D.U.T RT CL 50 pF mgk563 Test data is given in Table 10. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Load circuitry for switching times Table 10. Test data Input Test VI tr, tf tPHL, tPLH GND to VCC 6 ns open 13. Additional characteristics Rbias = 560 kΩ VCC 0.47 µF input output 100 µF VI (f = 1 kHz) A IO GND mna050 ∆I g fs = --------o∆V i VO is constant. Fig 7. Test set-up for measuring forward transconductance 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 7 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter mnb124 30 gfs (mA/V) 20 10 0 0 2 4 6 VCC (V) 8 Tamb = 25 °C. Fig 8. Typical forward transconductance as a function of supply voltage 14. Typical transfer characteristics mnb121 150 ICC (µA) VO (V) 120 1.6 90 1.2 60 0.8 30 0.4 0 0 0 0.4 0.8 1.2 1.6 mnb122 10 2 2 VO (V) 8 4 6 3 4 2 2 1 0 0 0 1 2 4 5 VCC = 4.5 V; IO = 0 A. Fig 9. Typical transfer characteristics VCC = 2.0 V Fig 10. Typical transfer characteristics VCC = 4.5 V 74HC2GU04_1 Product data sheet 3 VI (V) VI (V) VCC = 2.0 V; IO = 0 A. 5 I CC (mA) © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 8 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter mnb123 20 6 I CC (mA) VO (V) 16 12 3 8 4 0 0 0 2 4 6 VI (V) VCC = 6.0 V; IO = 0 A. Fig 11. Typical transfer characteristics VCC = 6.0 V 15. Application information Some applications for the 74HC2GU04 are: • Linear amplifier (see Figure 12) • Crystal oscillator (see Figure 13). Remark: All values given are typical values unless otherwise specified. R2 VCC 1 µF R1 U04 ZL mna052 ZL > 10 kΩ. R1 ≥ 3 kΩ. R2 ≤ 1 MΩ. Open loop amplification: AOL = 20. A OL Voltage amplification: A V = – ----------------------------------------- . R1 1 + ------- ( 1 + A OL ) R2 Vo(p-p) = VCC − 1.5 V centered at 0.5 × VCC. Unity gain bandwidth product is 5 MHz. Fig 12. Linear amplifier application 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 9 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter R1 R2 U04 C1 C2 out mna053 Test data is given in Table 11 and Table 12. C1 = 47 pF. C2 = 22 pF. R1 = 1 MΩ to 10 MΩ. R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC = 2 mA at VCC = 3.0 V and f = 1 MHz). Fig 13. Crystal oscillator application Table 11. External components for resonator (f < 1 MHz) Frequency R1 R2 C1 C2 10 kHz to 15.9 kHz 2.2 MΩ 220 kΩ 56 pF 20 pF 16 kHz to 24.9 kHz 2.2 MΩ 220 kΩ 56 pF 10 pF 25 kHz to 54.9 kHz 2.2 MΩ 100 kΩ 56 pF 10 pF 55 kHz to 129.9 kHz 2.2 MΩ 100 kΩ 47 pF 5 pF 130 kHz to 199.9 kHz 2.2 MΩ 47 kΩ 47 pF 5 pF 200 kHz to 349.9 kHz 2.2 MΩ 47 kΩ 47 pF 5 pF 350 kHz to 600 kHz 2.2 MΩ 47 kΩ 47 pF 5 pF Table 12. Optimum value for R2 Frequency R2 Optimum 3 kHz 2.0 kΩ for minimum required ICC 8.0 kΩ for minimum influence due to change in VCC 1.0 kΩ or minimum required ICC 4.7 kΩ or minimum influence by VCC 0.5 kΩ or minimum required ICC 2.0 kΩ or minimum influence by VCC 0.5 kΩ or minimum required ICC 2.0 kΩ or minimum influence by VCC 6 kHz 10 kHz 14 kHz > 14 kHz replace R2 by C3 = 35 pF (typical) 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 10 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 16. Package outline Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT363 JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 14. Package outline SOT363 (SC-88) 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 11 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter Plastic surface-mounted package (TSOP6); 6 leads D SOT457 E B y A HE 6 X v M A 4 5 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT457 JEDEC JEITA SC-74 EUROPEAN PROJECTION ISSUE DATE 05-11-07 06-03-16 Fig 15. Package outline SOT457 (SC-74) 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 12 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 17. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model DUT Device Under Test 18. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC2GU04_1 20061006 Product data sheet - - 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 13 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 19. Legal information 19.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 19.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 19.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 19.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 20. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] 74HC2GU04_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 6 October 2006 14 of 15 74HC2GU04 NXP Semiconductors Dual unbuffered inverter 21. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Additional characteristics . . . . . . . . . . . . . . . . . 7 Typical transfer characteristics . . . . . . . . . . . . 8 Application information. . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 6 October 2006 Document identifier: 74HC2GU04_1