LTC1518/LTC1519 52Mbps Precision Delay RS485 Quad Line Receivers U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision Propagation Delay: 18.5ns ±3.5ns Over Temperature High Data Rate: 52Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 500ps Typ –7V to 12V RS485 Input Common Mode Range Input Resistance ≥ 22k, Even When Unpowered Guaranteed Fail-Safe Operation over the Entire Common Mode Range Hot SwapTM Capable High Common Mode Rejection to 26MHz Short-Circuit Protection: 10mA Typ Output Current for an Indefinite Short Three-State Output Capability Will Not Oscillate with Slow Moving Input Signals Single 5V Supply Pin Compatible with LTC488, LTC489 The LTC®1518/LTC1519 are high speed, precision delay differential quad bus/line receivers that can operate at data rates as high as 52Mbps. They are pin compatible with the LTC488/LTC489 RS485 line receivers and operate over the entire – 7V to 12V common mode range. A unique architecture provides very stable propagation delays and low skew over wide input common mode, input overdrive and ambient temperature ranges. Propagation delay is 18.5ns ±3.5ns. Typical tPLH/tPHL and channel-to-channel skew is 500ps. Each receiver translates differential input levels (VID ≥ 300mV) into valid CMOS and TTL output levels. Its high input resistance (≥ 22k) allows many receivers to be connected to the same driver. The receiver outputs go into a high impedance state when disabled. The receivers have a fail-safe feature that guarantees a high output state when the inputs are shorted or left floating. Other protection features include thermal shutdown and a controlled maximum short-circuit current (50mA Max). Input resistance remains ≥ 22k when the device is unpowered or disabled, thus allowing hot swapping without loading the data lines. U APPLICATIONS ■ ■ ■ ■ ■ High Speed RS485/RS422 Receivers STS-1/OC-1 Data Receivers PECL Line Receivers Level Translators Fast-20/Fast-40 SCSI Receiver The LTC1518/LTC1519 operate from a single 5V supply and draw 12mA of supply current. , LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. U Propagation Delay Guaranteed to Fall Within Shaded Area (±3.5ns) TYPICAL APPLICATION 52Mbps Data Communication over Twisted Pair RE 2 RO RE 2 1 1 4 3 DE LTC1685 6 100Ω 100Ω EN EN 4 A 1 2 B 1/4 LTC1518 12 4 6 RECEIVER OUTPUT VDD = 5V RO VOUT = 5V/DIV 7 7 DI RECEIVER INPUT VID = 1.5V VIN = 3V/DIV DI 3 DE LTC1685 3 RO 1518/19 F08 –5 0 5 10 15 20 25 30 35 40 45 TIME (ns) 1518/19 TA02 1 LTC1518/LTC1519 W W W AXI U U ABSOLUTE RATI GS (Note 1) Supply Voltage ....................................................... 10V Digital Input Currents ..................... – 100mA to 100mA Digital Input Voltages ............................... – 0.5V to 10V Receiver Input Voltages ........................................ ±14V Receiver Output Voltages ............. – 0.5V to VDD + 0.5V Receiver Input Differential ....................................... 10V Short-Circuit Duration .................................... Indefinite Operating Temperature Range .................... 0°C to 70°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW B1 1 16 VDD A1 2 15 B4 OUT 1 3 14 A4 EN 4 OUT 2 5 ORDER PART NUMBER LTC1518CS 13 OUT 4 12 EN A2 6 11 OUT 3 B2 7 10 A3 GND 8 9 ORDER PART NUMBER TOP VIEW B1 1 16 VDD A1 2 15 B4 OUT 1 3 14 A4 EN12 4 13 OUT 4 OUT 2 5 12 EN34 A2 6 11 OUT 3 B2 7 10 A3 9 GND 8 B3 LTC1519CS B3 S PACKAGE 16-LEAD PLASTIC SO S PACKAGE 16-LEAD PLASTIC SO TJMAX = 150°C, θJA = 90°C/ W TJMAX = 150°C, θJA = 90°C/ W Consult factory for Industrial and Military grade parts. DC ELECTRICAL CHARACTERISTICS VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VCM Input Common Mode Voltage A, B Inputs ● MIN –7 VIH Input High Voltage EN, EN, EN12, EN34 ● 2 VIL Input Low Voltage EN, EN, EN12, EN34 ● IIN1 Input Current EN, EN, EN12, EN34 ● –1 IIN2 Input Current (A, B) VA, VB = 12V VA, VB = – 7V ● ● – 500 ● 22 RIN Input Resistance – 7V ≤ VCM ≤ 12V (Figure 5) CIN Input Capacitance (Note 4) VOC Open-Circuit Input Voltage VDD = 5V (Note 4) (Figure 5) ● 3.2 VID(MIN) Differential Input Threshold Voltage – 7V ≤ VCM ≤ 12V ● – 0.3 dVID Input Hysteresis VCM = 2.5V VOH Output High Voltage IOUT = – 4mA, VID = 0.3V, VDD = 5V ● VOL Output Low Voltage IOUT = 4mA, VID = – 0.3V, VDD = 5V ● IOZR Three-State Output Current 0V < VOUT < 5V ● IDD Total Supply Current All 4 Receivers VID > 0.3V, No Load, Device Enabled ● IOSR Short-Circuit Current VOUT = 0V, VOUT = 5V (Note 7) 2 TYP MAX 12 0.8 V 1 µA 500 µA µA kΩ 3.3 pF 3.4 0.3 25 V V mV 4.6 V – 10 12 – 50 V V 3 ● UNITS 0.4 V 10 µA 20 mA 50 mA LTC1518/LTC1519 DC ELECTRICAL CHARACTERISTICS VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted. SYMBOL PARAMETER CONDITIONS Max VID for Fail-Safe Detection –7V ≤ VCM ≤ 12V MIN Min Time to Detect Fault Condition CMRR Common Mode Rejection Ratio VCM = 2.5V, f = 26MHz (Note 4) TYP MAX UNITS 25 mV 2 µs 45 dB U W SWITCHI G TI E CHARACTERISTICS VDD = 5V ±5% (Notes 2, 3) VID = 1.5V, VCM = 2.5V, unless otherwise noted. SYMBOL PARAMETER tPLH, tPHL Input-to-Output Propagation Delay CL = 15pF (Figure 1) tr, tf Rise/Fall Times CL = 15pF 2.5 ns tSKD tPLH – tPHL Skew CL = 15pF, Same Receiver (Note 5) 500 ps tZL Enable to Output Low CL = 15pF (Figure 2) ● 10 35 ns tZH Enable to Output High CL = 15pF (Figure 2) ● 10 35 ns tLZ Disable from Output Low CL = 15pF (Figure 2) ● 20 35 ns tHZ Disable from Output High CL = 15pF (Figure 2) ● 20 35 tCH-CH Channel-to-Channel Skew CL = 15pF (Figure 3, Note 6) 500 ps tPKG-PKG Package-to-Package Skew CL = 15pF, Same Temperature (Figure 4, Note 4) 1.5 ns tr, tf Input Maximum Input Rise or Fall Time (Note 4) ● Minimum Input Pulse Width (Note 4) ● Maximum Input Frequency Square Wave (Note 4) ● 26 40 MHz Maximum Data Rate (Note 4) ● 52 80 Mbps Load Capacitance (Note 4) fIN(MAX) CL CONDITIONS The ● denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All currents into the device pins are positive; all currents out of the device pins are negative. Note 3: All typicals are given for VDD = 5V, TA = 25°C. Note 4: Guaranteed by design, but not tested. ● MIN TYP MAX 15 18.5 22 12 UNITS ns ns 2000 ns 19.2 ns 500 pF Note 5: Worst-case tPLH – tPHL skew for a single receiver in a package over the full operating temperature range. Note 6: Maximum difference between any two tPLH or tPHL transitions in a single package over the full operating temperature range. Note 7: Short-circuit current does not represent output drive capability. When the output detects a short-circuit condition, output drive current is significantly reduced until the short is removed. 3 LTC1518/LTC1519 U W TYPICAL PERFORMANCE CHARACTERISTICS Propagation Delay (tPLH/tPHL) vs Temperature CMRR vs Frequency 45.0 44.5 44.0 43.5 43.0 TA = 25°C VCM = 2.5V 42.5 40 20 15 10 1k 100k FREQUENCY (Hz) 10M 1 RECEIVER SWITCHING 20 15 0 –25 50 25 0 75 TEMPERATURE (°C) 100 125 PROPAGATION DELAY (ns) 25°C 15 –25°C 10 0°C 5 20 15 10 30 20 DATA RATE (Mbps) 40 5 15 25 50 20 15 10 5 0 0 0 35 55 105 LOAD CAPACITANCE (pF) 205 –6 –4 –2 8 0 4 6 2 COMMON MODE (V) LTC1518/19 • TPC07 LTC1518/19 • TPC06 Propagation Delay vs Input Differential Voltage 70 TA = 25°C VCM = 2.5V 60 DATA RATE (Mbps) 20 15 10 TA = 25°C VCM = 2.5V 50 40 30 20 5 10 1.0 1.5 2.0 INPUT DIFFERENTIAL (V) 2.5 LTC1518/19 • TPC09 4 0 0.3 0.5 10 12 LTC1464 • TPC08 Maximum Data Rate vs Input Differential Voltage 25 0 0.3 0.5 50 TA = 25°C VID = 1.5V 5 VCM = 2.5V VID = 1.5V 40 25 TA = 25°C VCM = 2.5V VID = 1.5V PROPAGATION DELAY (ns) 25 100°C 30 20 DATA RATE (Mbps) Propagation Delay vs Common Mode 30 1 RECEIVER SWITCHING 20 10 0 LTC1518/19 • TPC05 Propagation Delay vs Load Capacitance 25 PROPAGATION DELAY (ns) 25 1518/19 G02 Supply Current vs Temperature and Data Rate 10 4 RECEIVERS SWITCHING 30 5 1518/19 G01 0 35 10 5 0 –50 42.0 10 TA = 25°C VCM = 2.5V VID = 1.5V 45 SUPPLY CURRENT (mA) 45.5 PROPAGATION DELAY (ns) COMMON MODE REJECTION RATIO (dB) VCM = 2.5V VID = 1.5V 46.0 SUPPLY CURRENT (mA) Supply Current vs Data Rate 50 25 46.5 1.0 1.5 2.0 INPUT DIFFERENTIAL (V) 2.5 LTC1518/19 • TPC10 LTC1518/LTC1519 U U U PIN FUNCTIONS LTC1518 LTC1519 B1 (Pin 1): Receiver 1 Inverting Input. B1 (Pin 1): Receiver 1 Inverting Input. A1 (Pin 2): Receiver 1 Noninverting Input. A1 (Pin 2): Receiver 1 Noninverting Input. OUT 1 (Pin 3): Receiver 1 Output. OUT 1 (Pin 3): Receiver 1 Output. EN (Pin 4): A high enables all outputs; a low on Pin 4 and a high on Pin 12 will put all outputs into a high impedance state. Do not float. EN12 (Pin 4): A high enables receivers 1 and 2; a low will put the outputs of receivers 1 and 2 into a high impedance state. Do not float. OUT 2 (Pin 5): Receiver 2 Output. OUT 2 (Pin 5): Receiver 2 Output. A2 (Pin 6): Receiver 2 Noninverting Input. A2 (Pin 6): Receiver 2 Noninverting Input. B2 (Pin 7): Receiver 2 Inverting Input. B2 (Pin 7): Receiver 2 Inverting Input. GND (Pin 8): Ground Pin. A ground plane is recommended for all LTC1518 applications. GND (Pin 8): Ground Pin. A ground plane is recommended for all LTC1519 applications. B3 (Pin 9): Receiver 3 Inverting Input. B3 (Pin 9): Receiver 3 Inverting Input. A3 (Pin 10): Receiver 3 Noninverting Input. A3 (Pin 10): Receiver 3 Noninverting Input. OUT 3 (Pin 11): Receiver 3 Output. OUT 3 (Pin 11): Receiver 3 Output. EN (Pin 12): A low enables all outputs; a low on Pin 4 and a high on Pin 12 will put all outputs into a high impedance state. Do not float. EN34 (Pin 12): A high enables receivers 3 and 4; a low will put the outputs of receivers 3 and 4 into a high impedance state. Do not float. OUT 4 (Pin 13): Receiver 4 Output. OUT 4 (Pin 13): Receiver 4 Output. A4 (Pin 14): Receiver 4 Noninverting Input. A4 (Pin 14): Receiver 4 Noninverting Input. B4 (Pin 15): Receiver 4 Inverting Input. B4 (Pin 15): Receiver 4 Inverting Input. VDD (Pin 16): Power Supply Input. This pin should be decoupled with a 0.1µF ceramic capacitor as close as possible to the pin. Recommended: VDD = 5V ±5%. VDD (Pin 16): Power Supply Input. This pin should be decoupled with a 0.1µF ceramic capacitor as close as possible to the pin. Recommended: VDD = 5V ±5%. 5 LTC1518/LTC1519 U W W SWITCHI G TI E WAVEFOR S t r = t f ≤ 3ns for all input and enable signals. 3V + INPUT 1/4 LTC1518 LTC1519 1.5V 0V OUTPUT – 2.5V 1.5V ENABLE t LZ t ZL 5V 15pF OUT 1 2.5V OUTPUT NORMALLY LOW 2.5V OUTPUT NORMALLY HIGH VOL 1518/19 F01b VOH OUT 1 4V 2.5V INPUT t PLH OUTPUT 0V 2.5V 0.2V t HZ t ZH 1V S1 t PHL VDD/2 0.2V RECEIVER OUTPUT VDD/2 1k VDD CL 1k S2 1518/19 F01 1518/19 F02 Figure 1. Propagation Delay Test Circuit and Waveforms Figure 2. Receiver Enable and Disable Timing Test Circuit and Waveforms 4V INPUT A1, A2 1V B1, B2 = 2.5V CH1 OUT VDD/2 VDD/2 t CH-CH CH2 OUT t CH-CH VDD/2 VDD/2 1518/19 F03 Figure 3. Any Channel to Any Channel Skew, Same Package INPUT A1, B1 VID = 1.5V SAME INPUT FOR BOTH PACKAGES PACKAGE 1 OUT 1 t PKG-PKG tPKG-PKG PACKAGE 2 OUT 1 1518/19 F04 Figure 4. Package-to-Package Propagation Delay Skew 6 LTC1518/LTC1519 U U EQUIVALE T I PUT NETWORKS ≥ 22k A ≥ 22k 3.3V A ≥ 22k B ≥ 22k 3.3V RECEIVER ENABLED, VDD = 5V B RECEIVER DISABLED OR VDD = 0V 1518/19 F05 Figure 5. Input Thevenin Equivalent U W U U APPLICATIONS INFORMATION Theory of Operation Fail-Safe Features Unlike typical line receivers whose propagation delay can vary by as much as 500% from package to package and show significant temperature drift, the LTC1518/LTC1519 employ a novel architecture that produces a tightly controlled and temperature compensated propagation delay. The differential timing skew is also minimized between rising and falling output edges, and the propagation delays of any two receivers within a package are very tightly matched. The LTC1518/LTC1519 have a fail-safe feature that guarantees the output to be in a logic HIGH state when the inputs are either shorted or left open (note that when inputs are left open, any external large leakage current might override the fail-safe). The fail-safe feature detects shorted inputs over the entire common mode range. When a fault is detected, the output will typically go high in 2µs. The precision timing features of the LTC1518/LTC1519 reduce overall system timing constraints by providing a narrow ±3.5ns window during which valid data appears at the receiver output. This output timing window applies to all receivers in all packages over all operating temperatures, thereby making the LTC1518/LTC1519 well suited for high speed data transmission. In clocked data systems, the low skew minimizes duty cycle distortion of the clock signal. The LTC1518/LTC1519 can propagate signals at frequencies of 26MHz (52Mbps) with less than 5% duty cycle distortion. When a clock signal is used to retime parallel data, the maximum recommended data transmission rate is 25Mbps to avoid timing errors due to clock distortion. Thermal shutdown and short-circuit protection prevent latchup damage to the LTC1518/LTC1519 during fault conditions. When some of the receivers within a package are not used, the open fail-safe feature will allow the user to let the receiver inputs float and maintain a high logic state at the output. Without the open fail-safe feature, any noise at the input would cause unwanted glitches at the output. When the inputs are left “open,” one must make sure that there are no sources of leakage current connected to one or both of the inputs. This can happen if the device is being driven single-endedly and both the signal and the DC bias are disconnected. If the capacitor used to bypass the DC bias is left connected to the input of the device and is leaky (>1µA), the output of the device might not be the desired high logic state. Also keep in mind that the inputs are high impedance (≥ 22kΩ). When left open, noisy traces should be kept away from the receiver inputs to minimize capacitive coupling of undesired signals. Even with the open fail-safe feature, for maximum noise immunity, grounding the negative input of unused receivers is recommended. 7 LTC1518/LTC1519 U W U U APPLICATIONS INFORMATION When the inputs are accidentally shorted (by cutting through a cable, for example), the short-circuit fail-safe feature will guarantee a high output logic level. Note also that if the line driver is removed and the termination resistors are left in place, the receiver will see this as a “short” and output a logic high. Both of these fail-safe features will keep the receiver from outputting false data pulses under fault conditions. Single-Ended Applications Over short distances, the LTC1518/LTC1519 can be configured to receive single-ended data by tying one input to a fixed bias voltage and connecting the other input to the driver output. In such applications, standard high speed CMOS logic may be used as a driver for the LTC1518/ LTC1519. With a 22k minimum input resistance, the receiver trip points may be easily adjusted to accommo- date different driver output swings by changing the resistor divider at the fixed input. Figure 6a shows a singleended receiver configuration with the driver and receiver connected via PC traces. Note that at very high speeds, transmission line and driver ringing effects must be considered. Motorola’s MECL System Design Handbook serves as an excellent reference for transmission line and termination effects. To mitigate transmission errors and duty cycle distortion due to driver ringing, a small output filter or a dampening resistor on the driver’s VDD may be needed as shown in Figure 6b. With an open circuit voltage of 3.3V at both inputs, the receivers can be used without an external bias applied to the fixed inputs. The fixed input should be bypassed with a 0.01µF ceramic capacitor. The positive input should be driven with a 5V CMOS pat in order to minimize the skew caused by the 3.3V threshold. Figure 6c shows this configuration. Note that due to the MC74ACT04 (TTL INPUT) PC TRACE – 5V MC74AC04 (CMOS INPUT) 2.2k 0.01µF 1/4 LTC1518 LTC1519 10Ω MC74AC04 + 0.01µF 10Ω PC TRACE 2.2k OR PC TRACE 10pF 1518/19 F06a 1518/19 F06b Figure 6b. Techniques to Minimize Driver Ringing Figure 6a. Single-Ended Receiver MC74ACT04 (TTL INPUT) PC TRACE – 1/4 LTC1518 LTC1519 MC74AC04 (CMOS INPUT) + 0.01µF 1518/19 F06c Figure 6c. Self Biased Single Ended Receiver 8 LTC1518/LTC1519 U U W U APPLICATIONS INFORMATION increased skew, this configuration might not operate at the highest data rates. To transmit single-ended data over short to medium distances, twisted pair is recommended with the unused wire grounded at both ends (Figure 7). Differential Transmission Data rates up to 52Mbps can be transmitted over 100 feet of high quality category 5 twisted pair. Figure 8 shows the LTC1518 receiving differential data from an LTC1685 transceiver. As in the single-ended configurations, care must be taken to properly terminate the differential data lines to avoid unwanted reflections, etc. 5V 100Ω 10-FT TWISTED PAIR – 100Ω MC74ACT04 MC74AC04 1/4 LTC1518 LTC1519 + 5V 3.3k 0.01µF 1k 1518/19 F07 Figure 7. Medium Distance Single-Ended Transmission Using a CMOS Driver RE 2 RO RE 2 1 1 7 7 DI 4 6 3 DE LTC1685 RO 100Ω 100Ω EN EN 4 A 1 2 B 1/4 LTC1518 12 4 6 DI 3 DE LTC1685 3 RO 1518/19 F08 Figure 8. LTC1518 Connected to LTC1685 High Speed RS485 Transceiver 9 LTC1518/LTC1519 U U W U APPLICATIONS INFORMATION Figure 9 shows a trace with 100ft category 5 UTP between an LTC1685 driver and an LTC1518 receiver. Notice that at the far end of the cable, the signal to the LTC1518 input has been reduced. Figure 10 shows a 52Mbps square wave. Output Short-Circuit Protection The LTC1518/LTC1519 employ voltage sensing shortcircuit protection at the output terminals. For a given input differential, this circuitry determines what the correct 2V/DIV output level should be. For example, if the input differential is ≥ 300mV, it expects the output to be a logic high. If the output is subsequently shorted to a voltage below VDD/2, this circuitry shuts off the output devices and turns on a smaller device in its place. A timeout period of about 50ns is used in order to maintain normal high frequency operation, even under heavy capacitive loads (>100mA transient current into the load). CABLE DELAY DRIVER INPUT 2V/DIV RECEIVER INPUT 5V/DIV RECEIVER OUTPUT NOTES: TOP TRACE: LTC1685 DRIVER INPUT MID TRACE: LTC1518 INPUT AT FAR END OF 100ft CATAGORY 5 UTP BOTTOM TRACE: LTC1518 OUTPUT 50ns/DIV LTC1518/19 • F09 Figure 9. 20ns Pulse Propagating Down 100ft of Category 5 UTP 1V/DIV RECEIVER INPUT 5V/DIV RECEIVER OUTPUT NOTES: TOP TRACE: LTC1518 INPUT AT FAR END OF 100ft CAT 5 UTP BOTTOM TRACE: LTC1518 OUTPUT 20ns/DIV LTC1518/19 • F10 Figure 10. 52Mbps Pulse Train Over 100ft of Category 5 UTP 10 LTC1518/LTC1519 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. S Package 16-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.386 – 0.394* (9.804 – 10.008) 16 15 14 13 12 11 10 9 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 2 3 4 5 6 7 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0° – 8° TYP 0.014 – 0.019 (0.355 – 0.483) 0.016 – 0.050 0.406 – 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE 8 0.050 (1.270) TYP S16 0695 **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC1518/LTC1519 U TYPICAL APPLICATION High Speed Receiver with Hot Swap Control BACK PLANE PLUG-IN CARD R1 0.005Ω Q1 MTB56N06V VCC 5V 5A VCC + R3 6.81k 1% R2 10Ω 5% 8 2 VCC C1 0.1µF 6 SENSE GATE FB ON CONNECTOR 1 CONNECTOR 2 ON/RESET 7 R4 2.43k 1% 5 µP LTC1422 RESET TIMER C4 2200µF 1 RESET GND 3 4 C2 0.33µF 3.3k GND 8 DATA BUS 2 LTC1518 + 1 – 6 + 7 – 10 + 9 – 14 + 15 – 16 4 3 5 3.3k 0.1µF D7 D6 11 13 D5 D4 8 2 LTC1518 + 1 – 6 + 7 – 10 + 9 – 14 + 15 8 – 16 4 3 5 D3 D2 11 13 D1 D0 1518 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC486/LTC487 Low Power Quad RS485 Drivers 10Mbps, – 7V to 12V Common Mode Range LTC488/LTC489 Low Power Quad RS485 Receivers 10Mbps, – 7V to 12V Common Mode Range LT®1016 UltraFastTM Precision Comparator Single 5V Supply, 10ns Propagation Delay LTC1520 High Speed, Precision Quad Differential Line Receiver 52Mbps, ±100mV Threshold, Rail-to-Rail Common Mode LTC1685/LTC1686/ LTC1687 High Speed, Precision RS485 Transceivers 52Mbps, Pin Compatible with LTC485/490/491 UltraFast is a trademark of Linear Technology Corporation. 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417● (408) 432-1900 FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com 15189fs, sn15189 LT/TP 0298 4K • PRINTED IN THE USA LINEAR TECHNOLOGY CORPORATION 1997