AD ADL5230

Preliminary Technical Data
FEATURES
400 MHz to 2700 MHz
Pre-driver RF Amplifier
ADL5320
FUNCTIONAL BLOCK DIAGRAM
Operation from 400 MHz to 2700 MHz
Gain of +13.7 dB Gain at 2140 MHz
OIP3 of+42.0 dBm at 2140 MHz
P1dB +25.6 dBm at 2140 MHz
Noise Figure of 4.2 dB at 2140 MHz
5V power supply
104 mA Power Supply Current
Internal Active Biasing
Thermally Efficient SOT-89 Package
GND
(2)
ADL5320
Bias
GENERAL DESCRIPTION
The ADL5320 is a broadband, linear pre-driver RF amplifier
that operates at frequencies from 400 MHz to 2700 MHz. The
device can be used in a wide variety of wired and wireless
applications, including ISM, WLL, PCS, GSM, CDMA and
WCDMA.
The ADL5320 operates with 5V supply voltage with a supply
current of 104 mA.
1
RFin
2
3
GND RFout
Figure 1.
The ADL5320 is fabricated on a GaAs HBT process. The device is
packaged in a low-cost SOT-89 that uses an exposed paddle for
excellent thermal impedance. It operates from −40°C to +85°C.
A fully populated evaluation board is also available.
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
ADL5320
Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................5
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................6
Functional Block Diagram .............................................................. 1
Evaluation Board ...............................................................................7
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 10
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 10
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
REVISION HISTORY
5/07—Rev. PrB: Preliminary Version
Rev. PrB | Page 2 of 10
Preliminary Technical Data
ADL5320
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
Input Return Loss (S11)
Output Return Loss (S22)
Reverse Isolation (S12)
FREQUENCY = 880 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 2140 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 2350 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
POWER INTERFACE
Supply Voltage
Supply Current
vs. Temp
Power Dissipation
Conditions
Min
Typ
400
Max
Unit
2700
MHz
−10
−10
−26
dB
dB
dB
∆f = 1 MHz , Output Power (POUT) = 10 dBm per tone
17.9
±0.4
± 0.6
TBD
25.8
47.8
dB
dB
dB
dB
dBm
dBm
VPOS = 5 V
3.8
dB
13.7
±0.2
±0.9
TBD
25.6
42.0
4.2
dB
dB
dB
dB
dBm
dBm
dB
12.6
±0.25
±0.88
TBD
26.1
42.8
4.6
dB
dB
dB
dB
dBm
dBm
dB
± 50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
± 30 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
∆f = 1 MHz , POUT = 10 dBm per tone
VPOS = 5 V
± 50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
∆f = 1 MHz , POUT = 10 dBm per tone
VPOS = 5 V
Pins RFOUT, Vcc
4.75
−40°C ≤ TA ≤ +85°C
VPOS = 5V
Rev. PrB | Page 3 of 10
5
104
109
520
5.25
V
mA
mA
mW
ADL5320
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table Summary
Table 2.
Parameter
Supply Voltage, VPOS
Input Power (re: 50 Ω)
Internal Power Dissipation (Paddle Soldered)
θJC (Junction to Paddle)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
6V
+20 dBm
660 mW
TBD °C/W
TBD °C
−40°C to +85°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. PrB | Page 4 of 10
Preliminary Technical Data
ADL5320
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
(2)
ADL5320
1
2
3
RFIN GND RFOUT
Figure 2.
Table 3. Pin Function Descriptions
Pin No.
1
2
3
Exposed
Paddle
Mnemonic
RFIN
GND
RFOUT
Description
RF Input. Requires a dc blocking capacitor
Ground: Connect to a low impedance ground plane
RF Output and Supply Voltage: DC bias is provided to this pin through an inductor that is tied to the external
power supply . RF path requires a DC blocking capacitor.
Exposed Paddle: Internally connected to GND. Solder to a low impedance ground plane.
Rev. PrB | Page 5 of 10
ADL5320
Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
50
27
26
48
25
46
Gain 25 Deg
P1 dB 25 Deg
23
44
Gain -40 Deg
22
OIP3 (dBm)
Gain, P1dB (dB, dBm)
24
P1 dB -40 Deg
21
Gain 85 Deg
P1 dB 85 Deg
20
42
40
800 MHz
850 MHz
880 MHz
38
900 MHz
960 MHz
19
18
17
36
16
34
15
800
-4
820
840
860
880
900
920
940
-2
0
2
4
6
960
8
10
12
14
16
18
20
Pout (dBm)
Frequency (MHz)
Figure 3. Gain and P1dB vs. Frequency and Temperature 800MHz – 960 MHz
Pout = 10 dBm
Figure 6. OIP3 vs. Pout and Frequency 800 MHz – 960 MHz
45
44
28
43
26
42
41
22
OIP3 (dBm)
Gain, P1dB (dBm)
24
Gain_5V_25
P1dB_5V_25
20
Gain_5V_-40
39
38
P1dB_5V_-40
18
40
Gain_5V_85
2110 MHZ
2140 MHz
2170 MHz
37
P1dB_5V_85
16
36
14
35
12
34
-4
-2
0
2
4
6
8
10
12
14
16
18
20
Pout (dBm)
10
2110
2120
2130
2140
2150
2160
2170
Frequency (MHz)
Figure 7. OIP3 vs. Pout and Frequency 2100 MHz – 2170 MHz
Figure 4. Gain and P1dB vs. Frequency and Temperature 2110MHz – 2170
MHz Pout = 10 dBm
45
44
43
28
42
26
41
OIP3 (dBm)
Gain, P1dB (dB, dBm)
24
22
Gain_5V_25
P1dB_5V_25
Gain_5V_-40
P1dB_5V_-40
20
18
40
2300 MHz
2350 MHz
2400 MHz
39
38
37
Gain_5V_85
P1dB_5V_85
36
16
35
14
34
-4
12
-2
0
2
4
6
8
10
12
14
16
18
20
Pout (dBm)
10
2300
2310
2320
2330
2340
2350
2360
2370
2380
2390
Figure 8. OIP3 vs. Pout and Frequency 2300 MHz – 2400 MHz
2400
Frequency (MHz)
Figure 5. Gain and P1dB vs. Frequency and Temperature 2300MHz – 2400 MHz
Pout = 10 dbm
Rev. PrB | Page 6 of 10
Preliminary Technical Data
ADL5320
EVALUATION BOARD
The basic connections for operating the ADL5320 are shown in
Figure 9. The inputs and outputs should be ac coupled with
appropriately sized capacitors. DC bias is provided to the
amplifier via an inductor connected to the RF output pin. A bias
voltage of 5 V is recommended.
Gnd
Vsup
C6 10 uF
(2)
GND
C5 10 nF
C4 100 pF
1
1
2
RFOUT
C1
47 pF
GND
RFIN
RFIN
ADL5320
3
L1
47 nH
2
3
C2
4 47 pF
RFOUT
C7
2.2 pF
C3
6.8 pF
Figure 9. Basic Connections default condition is for 800 MHz to 960 MHz
Table 4. Matching Component Spacing 800 MHz – 960 MHz
λ 11
200 mils
1
λ2
75 mils
λ3
100 mils
λ4
350 mils
50 ohm traces 25 mils wide, substrate used is FR4
Figure 10. Evaluation Board Layout showing component placement 800 MHz to 960 MHz operation
Rev. PrB | Page 7 of 10
ADL5320
Preliminary Technical Data
Table 5. Evaluation Board Configuration Options 800 MHz - 960 MHz
Component
C1, C2
C4, C5, C6
Function
AC - coupling capacitors
Power supply bypassing capacitors
L1
C3, C7
DC bias inductor
Tuning capacitors
Vsup, Gnd
Power supply connections
Default Value
0402 47 pF
C4 0603 100 pF
C5 0603 10 nF
C6 1206 10μF
0603 47 nH
C3 0402 6.8 pF
C7 0402 2.2 pF
Vsup red testloop
Gnd Black testloop
Figure 11. Evaluation Board Layout showing component placement 2110 MHz to 2170 MHz operation
Table 5. Matching Component Spacing 2110 MHz – 2170 MHz
λ 11
300 mils
1
λ2
75 mils
λ3
175 mils
λ4
275mils
50 ohm traces 25 mils wide, substrate used is FR4
Table 6. Evaluation Board Configuration Options 2110 MHz – 2170 MHz
Component
C1, C2
C4, C5, C6
Function
AC - coupling capacitors
Power supply bypassing capacitors
L1
C3, C7
DC bias inductor
Tuning capacitors
Vsup, Gnd
Power supply connections
Default Value
0402 22 pF
C4 0603 22 pF
C5 0603 10 nF
C6 1206 10μF
0603 47 nH
C3 0402 0.5 pF
C7 0402 1.5 pF
Vsup red testloop
Gnd Black testloop
Rev. PrB | Page 8 of 10
Preliminary Technical Data
ADL5320
Figure 12. Evaluation Board Layout showing component placement 2300 MHz to 2400 MHz operation
Table 7. Matching Component Spacing 2300 MHz – 2400 MHz
λ 11
225 mils
1
λ2
λ3
λ4
75 mils
125 mils
125mils
50 ohm traces 25 mils wide, substrate used is FR4
Table 8. Evaluation Board Configuration Options 2300 MHz to 2400 MHz
Component
C1, C2
Function
AC - coupling capacitors
C4, C5, C6
Power supply bypassing capacitors
L1
C3, C7
DC bias inductor
Tuning capacitors
Vsup, Gnd
Power supply connections
Default Value
C1 0402 12 pF
C2 0402 2.2 pF
C4 0603 12 pF
C5 0603 10 nF
C6 1206 10μF
0603 15 nH
C3 0402 1.2 pF
C7 0402 1.0 pF
Vsup red testloop
Gnd Black testloop
Figure 13. Evaluation Board Layout (BOTTOM)
Rev. PrB | Page 9 of 10
ADL5320
Preliminary Technical Data
OUTLINE DIMENSIONS
*1.55 REF
(2)
4.25
3.94
1
2
2.60
2.30
3
1.20
0.90
1.50 TYP
3.00 TYP
4.60
4.40
1.60
1.40
0.44
0.35
*0.52
0.32
END VIEW
*COMPLIANT TO JEDEC STANDARDS TO-243 WITH
EXCEPTION TO DIMENSIONS INDICATED BY AN ASTERISK.
040407-A
*0.58
0.40
Figure 14. 3-Lead Small Outline Transistor Package [SOT-89]
(RK-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADL5320ARKZ-R7 1
ADL5320ARKZ-WP1
ADL5230-EVALZ
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
Package Description
3 Lead SOT89 Tape and Reel
3 Lead SOT89 Waffle Pack
Evaluation Board
Package Option
RK-3
RK-3
Z = RoHS Compliant Part.
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR05840-0-5/07(PrB)
Rev. PrB | Page 10 of 10
Branding
TBD
TBD
Ordering Quantity
TBD
TBD