1 MHz to 2.7 GHz RF Gain Block AD8353 Fixed gain of 20 dB Operational frequency of 1 MHz to 2.7 GHz Linear output power up to 9 dBm Input/output internally matched to 50 Ω Temperature and power supply stable Noise figure: 5.3 dB Power supply: 3 V or 5 V APPLICATIONS FUNCTIONAL BLOCK DIAGRAM BIAS AND VREF RFIN COM1 VPOS RFOUT AD8353 COM2 02721-001 FEATURES Figure 1. VCO buffers General Tx/Rx amplification Power amplifier predrivers Low power antenna drivers GENERAL DESCRIPTION The AD8353 is a broadband, fixed-gain, linear amplifier that operates at frequencies from 1 MHz up to 2.7 GHz. It is intended for use in a wide variety of wireless devices, including cellular, broadband, CATV, and LMDS/MMDS applications. By taking advantage of ADI’s high performance, complementary Si bipolar process, these gain blocks provide excellent stability over process, temperature, and power supply. This amplifier is single-ended and internally matched to 50 Ω with a return loss of greater than 10 dB over the full operating frequency range. The AD8353 provides linear output power of 9 dBm with 20 dB of gain at 900 MHz when biased at 3 V and an external RF choke is connected between the power supply and the output pin. The dc supply current is 42 mA. At 900 MHz, the output third-order intercept (OIP3) is greater than 23 dBm and is 19 dBm at 2.7 GHz. The noise figure is 5.3 dB at 900 MHz. The reverse isolation (S12) is −36 dB at 900 MHz and −30 dB at 2.7 GHz. The AD8353 can also operate with a 5 V power supply; in which case, no external inductor is required. Under these conditions, the AD8353 delivers 8 dBm with 20 dB of gain at 900 MHz. The dc supply current is 42 mA. At 900 MHz, the OIP3 is greater than 22 dBm and is 19 dBm at 2.7 GHz. The noise figure is 5.6 dB at 900 MHz. The reverse isolation (S12) is −35 dB. The AD8353 is fabricated on ADI’s proprietary, high performance, 25 GHz, Si complementary, bipolar IC process. The AD8353 is available in a chip scale package that uses an exposed paddle for excellent thermal impedance and low impedance electrical connection to ground. It operates over a −40°C to +85°C temperature range, and an evaluation board is also available. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. AD8353 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications....................................................................................... 1 Theory of Operation ...................................................................... 13 Functional Block Diagram .............................................................. 1 Basic Connections...................................................................... 13 General Description ......................................................................... 1 Applications..................................................................................... 14 Revision History ............................................................................... 2 Low Frequency Applications Below 100 MHz........................... 14 Specifications..................................................................................... 3 Evaluation Board ............................................................................ 15 Absolute Maximum Ratings............................................................ 5 Outline Dimensions ....................................................................... 16 ESD Caution.................................................................................. 5 Ordering Guide .......................................................................... 16 Pin Configuration and Function Descriptions............................. 6 REVISION HISTORY 12/05—Rev. A to Rev. B Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 4 Changes to Figure 16........................................................................ 9 Changes to Figure 32...................................................................... 11 Moved Figure 39 to Page 15; Renumbered Sequentially ........... 15 Changes to Ordering Guide .......................................................... 16 8/05—Rev. 0 to Rev. A Updated Format..................................................................Universal Changes to Product Title ................................................................. 1 Changes to Features, Figure 1, and General Description............ 1 Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 4 Changes to Figure 2 and Table 4..................................................... 6 Changes to Figure 3 caption and Figure 6 caption....................... 7 Changes to Figure 17 caption and Figure 20 caption .................. 9 Changes to Basic Connections Section........................................ 13 Added Low Frequency Applications Below 100 MHz Section. 14 Changes to Table 5.......................................................................... 15 Changes to Ordering Guide .......................................................... 16 Updated Outline Dimensions ....................................................... 16 2/02—Revision 0: Initial Version Rev. B | Page 2 of 16 AD8353 SPECIFICATIONS VS = 3 V, TA = 25°C, 100 nH external inductor between RFOUT and VPOS, ZO = 50 Ω, unless otherwise noted. Table 1. Parameter OVERALL FUNCTION Frequency Range Gain Delta Gain Gain Supply Sensitivity Reverse Isolation (S12) RF INPUT INTERFACE Input Return Loss RF OUTPUT INTERFACE Output Compression Point Delta Compression Point Output Return Loss DISTORTION/NOISE Output Third-Order Intercept Output Second-Order Intercept Noise Figure POWER INTERFACE Supply Voltage Total Supply Current Supply Voltage Sensitivity Temperature Sensitivity Conditions Min Typ 1 Max Unit 2700 f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, −40°C ≤ TA ≤ +85°C f = 1.9 GHz, −40°C ≤ TA ≤ +85°C f = 2.7 GHz, −40°C ≤ TA ≤ +85°C VPOS ± 10%, f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz f = 1.9 GHz f = 2.7 GHz Pin RFIN f = 900 MHz f = 1.9 GHz f = 2.7 GHz Pin RFOUT f = 900 MHz, 1 dB compression f = 1.9 GHz f = 2.7 GHz f = 900 MHz, −40°C ≤ TA ≤ +85°C f = 1.9 GHz, −40°C ≤ TA ≤ +85°C f = 2.7 GHz, −40°C ≤ TA ≤ +85°C f = 900 MHz f = 1.9 GHz f = 2.7 GHz 19.8 17.7 15.6 −0.97 −1.15 −1.34 0.04 −0.004 −0.04 −35.6 −34.9 −30.3 MHz dB dB dB dB dB dB dB/V dB/V dB/V dB dB dB 22.3 20.9 11.2 dB dB dB 9.1 8.4 7.6 −1.46 −1.17 −1 26.3 16.9 13.3 dBm dBm dBm dB dB dB dB dB dB f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm f = 2.7 GHz, ∆f = 1 MHz, PIN = −28 dBm f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm f = 900 MHz f = 1.9 GHz f = 2.7 GHz Pin VPOS 23.6 20.8 19.5 31.6 5.3 6 6.8 dBm dBm dBm dBm dB dB dB 2.7 35 −40°C ≤ TA ≤ +85°C Rev. B | Page 3 of 16 3 41 15.3 60 3.3 48 V mA mA/V μA/°C AD8353 VS = 5 V, TA = 25°C, no external inductor between RFOUT and VPOS, ZO = 50 Ω, unless otherwise noted. Table 2. Parameter OVERALL FUNCTION Frequency Range Gain Delta Gain Gain Supply Sensitivity Reverse Isolation (S12) RF INPUT INTERFACE Input Return Loss RF OUTPUT INTERFACE Output Compression Point Delta Compression Point Output Return Loss DISTORTION/NOISE Output Third-Order Intercept Output Second-Order Intercept Noise Figure POWER INTERFACE Supply Voltage Total Supply Current Supply Voltage Sensitivity Temperature Sensitivity Conditions Min Typ Max Unit 2700 19.5 17.6 15.7 −0.96 −1.18 −1.38 0.09 −0.01 −0.09 −35.4 −34.6 −30.2 MHz dB dB dB dB dB dB dB/V dB/V dB/V dB dB dB 22.9 21.7 11.5 dB dB dB 8.3 8.1 7.5 −1.05 −1.49 −1.33 27 22 14.3 dBm dBm dBm dB dB dB dB dB dB 22.8 20.6 19.5 30.3 5.6 6.3 7.1 dBm dBm dBm dBm dB dB dB 1 f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, −40°C ≤ TA ≤ +85°C f = 1.9 GHz, −40°C ≤ TA ≤ +85°C f = 2.7 GHz, −40°C ≤ TA ≤ +85°C VPOS ± 10%, f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz f = 1.9 GHz f = 2.7 GHz Pin RFIN f = 900 MHz f = 1.9 GHz f = 2.7 GHz Pin RFOUT f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, −40°C ≤ TA ≤ +85°C f = 1.9 GHz, −40°C ≤ TA ≤ +85°C f = 2.7 GHz, −40°C ≤ TA ≤ +85°C f = 900 MHz f = 1.9 GHz f = 2.7 GHz f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm f = 2.7 GHz, ∆f = 1 MHz, PIN = −28 dBm f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm f = 900 MHz f = 1.9 GHz f = 2.7 GHz Pin VPOS 4.5 35 −40°C ≤ TA ≤ +85°C Rev. B | Page 4 of 16 5 42 4.3 45.7 5.5 52 V mA mA/V μA/°C AD8353 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage, VPOS Input Power (re: 50 Ω) Equivalent Voltage Internal Power Dissipation Paddle Not Soldered Paddle Soldered θJA (Paddle Soldered) θJA (Paddle Not Soldered) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering 60 sec) Rating 5.5 V 10 dBm 700 mV rms 325 mW 812 mW 80°C/W 200°C/W 150°C −40°C to +85°C −65°C to +150°C 240°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. B | Page 5 of 16 AD8353 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS COM1 1 NC 2 8 COM1 AD8353 NC = NO CONNECT 04862-002 7 RFOUT TOP VIEW RFIN 3 (Not to Scale) 6 VPOS 5 COM2 COM2 4 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1, 8 2 3 4, 5 6 7 Mnemonic COM1 NC RFIN COM2 VPOS RFOUT Description Device Common. Connect to low impedance ground. No Connection. RF Input Connection. Must be ac-coupled. Device Common. Connect to low impedance ground. Positive Supply Voltage. RF Output Connection. Must be ac-coupled. Rev. B | Page 6 of 16 AD8353 TYPICAL PERFORMANCE CHARACTERISTICS 90 90 120 120 60 150 150 30 210 330 30 180 60 330 02721-003 210 300 240 270 300 240 270 Figure 3. S11 vs. Frequency, VS = 3 V, TA = 25°C, dc ≤ f ≤ 3 GHz Figure 6. S22 vs. Frequency, VS = 3 V, TA = 25°C, dc ≤ f ≤ 3 GHz 25 25 GAIN AT –40°C 20 20 15 15 GAIN (dB) GAIN AT 2.7V 10 GAIN AT 3.0V GAIN AT +25°C GAIN AT +85°C 10 0 1000 1500 2000 2500 3000 FREQUENCY (MHz) 0 02721-004 500 0 0 1000 1500 2000 2500 3000 FREQUENCY (MHz) Figure 7. Gain vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C Figure 4. Gain vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C 0 –5 –5 REVERSE ISOLATION (dB) 0 –10 –15 –20 –25 S12 AT 3.0V S AT 2.7V 12 –30 500 02721-007 5 5 –10 –15 –20 S12 AT +25°C –25 S12 AT –40°C –30 –35 –35 S12 AT 3.3V 0 500 S12 AT +85°C –40 1000 1500 FREQUENCY (MHz) 2000 2500 3000 0 02721-005 –40 Figure 5. Reverse Isolation vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C 500 1000 1500 FREQUENCY (MHz) 2000 2500 3000 02721-008 GAIN (dB) GAIN AT 3.3V REVERSE ISOLATION (dB) 02721-006 180 Figure 8. Reverse Isolation vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C Rev. B | Page 7 of 16 AD8353 12 12 10 10 P1dB AT –40°C P1dB AT 3.3V 4 4 2 2 0 0 500 1000 1500 2000 2500 3000 FREQUENCY (MHz) 0 P1dB AT +85°C P1dB AT +25°C 6 0 500 1000 1500 2000 2500 3000 FREQUENCY (MHz) Figure 9. P1dB vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C 02721-012 P1dB AT 2.7V P1dB AT 3.0V 6 P1dB (dBm) 8 02721-009 P1dB (dBm) 8 Figure 12. P1dB vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C 45 30 40 25 30 PERCENTAGE (%) PERCENTAGE (%) 35 25 20 15 20 15 10 10 5 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.6 8.8 OUTPUT 1dB COMPRESSION POINT (dBm) 9.0 0 19.1 28 28 26 26 24 24 OIP3 (dBm) OIP3 AT 3.0V OIP3 AT 2.7V 21.1 21.5 21.9 OIP3 AT –40°C 20 OIP3 AT +85°C OIP3 AT +25°C 18 16 16 14 14 0 500 1000 1500 2000 2500 3000 FREQUENCY (MHz) 10 Figure 11. OIP3 vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C 0 500 1000 1500 2000 2500 3000 FREQUENCY (MHz) Figure 14. OIP3 vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C Rev. B | Page 8 of 16 02721-014 12 12 02721-011 OIP3 (dBm) 20 10 20.3 20.7 OIP3 (dBm) 22 OIP3 AT 3.3V 18 19.9 Figure 13. Distribution of OIP3, VS = 3 V, TA = 25°C, f = 2.2 GHz Figure 10. Distribution of P1dB, VS = 3 V, TA = 25°C, f = 2.2 GHz 22 19.5 02721-013 0 7.0 02721-010 5 AD8353 8.0 8.5 7.5 8.0 7.5 NOISE FIGURE (dB) 6.5 NF AT 3.3V 6.0 5.5 5.0 NF AT 2.7V 7.0 NF AT +85°C 6.5 6.0 NF AT +25°C 5.5 NF AT Ð –40°C 5.0 NF AT 3.0V 4.5 02721-015 4.5 4.0 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 Figure 15. Noise Figure vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C 4.0 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 02721-018 NOISE FIGURE (dBm) 7.0 Figure 18. Noise Figure vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C 35 50 IS AT 3.3V 45 30 SUPPLY CURRENT (mA) 40 PERCENTAGE (%) 25 20 15 10 IS AT 3.0V 35 IS AT 2.7V 30 25 20 15 10 5 0 –60 –40 –20 60 80 100 Figure 19. Supply Current vs. Temperature, VS = 2.7 V, 3 V, and 3.3 V Figure 16. Distribution of Noise Figure, VS = 3 V, TA = 25°C, f = 2.2 GHz 90 90 120 20 0 40 TEMPERATURE (°C) 02721-019 02721-016 5 0 5.90 5.95 6.00 6.05 6.10 6.15 6.20 6.25 6.30 6.35 6.40 6.45 6.50 6.55 6.60 NOISE FIGURE (dB) 120 60 150 150 30 180 30 180 0 330 0 330 210 300 240 300 240 270 270 Figure 20. S22 vs. Frequency, VS = 5 V, TA = 25°C, dc ≤ f ≤ 3 GHz Figure 17. S11 vs. Frequency, VS = 5 V, TA = 25°C, dc ≤ f ≤ 3 GHz Rev. B | Page 9 of 16 02721-020 02721-017 210 60 AD8353 25 25 GAIN AT 5.5V GAIN AT –40°C 20 20 15 GAIN (dB) GAIN AT 5.0V GAIN AT 4.5V 10 15 GAIN AT +25°C 10 5 5 500 1000 1500 2000 2500 3000 0 FREQUENCY (MHz) 0 0 –5 –5 REVERSE ISOLATION (dB) 2000 –10 –15 –20 S12 AT 5V S12 AT 5.5V 3000 –10 –15 –20 S12 AT +25°C –25 –30 S12 AT +85°C –35 –35 S12 AT 4.5V 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 02721-022 S12 AT –40°C –40 Figure 22. Reverse Isolation vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C –40 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 Figure 25. Reverse Isolation vs. Frequency, VS = 5 V, TA = −40°C, +25°C, and +85°C 10 12 P1dB AT 5.5V 9 P1dB AT +85°C 10 P1dB AT +25°C 8 7 8 6 P1dB (dBm) P1dB AT 4.5V P1dB AT 5.0V 5 4 P1dB AT –40°C 6 4 3 2 2 1 0 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 02721-023 P1dB (dBm) 2500 02721-025 REVERSE ISOLATION (dB) 1500 Figure 24. Gain vs. Frequency, VS = 5 V, TA = −40°C, +25°C, and +85°C 0 –30 1000 FREQUENCY (MHz) Figure 21. Gain vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C –25 500 02721-024 0 02721-021 0 0 0 500 1000 1500 2000 2500 3000 FREQUENCY (MHz) Figure 26. P1dB vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C Figure 23. P1dB vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C Rev. B | Page 10 of 16 02721-026 GAIN (dB) GAIN AT +85°C AD8353 30 45 40 25 PERCENTAGE (%) PERCENTAGE (%) 35 30 25 20 15 20 15 10 10 5 7.4 7.6 7.8 8.0 8.2 8.4 8.6 OUTPUT 1dB COMPRESSION POINT (dBm) 8.8 0 18.8 26 26 24 24 OIP3 (dBm) 18 OIP3 AT 4.5V 16 12 10 2500 3000 OIP3 AT +25°C OIP3 AT +85°C 16 12 1000 1500 2000 FREQUENCY (MHz) 21.6 OIP3 AT –40°C 18 14 500 21.2 20 14 02721-028 OIP3 (dBm) 20 0 20.8 22 OIP3 AT 5.5V OIP3 AT 5.0V 20.0 20.4 OIP3 (dBm) 19.6 Figure 30. Distribution of OIP3, VS = 5 V, TA = 25°C, f = 2.2 GHz Figure 27. Distribution of P1dB, VS = 3 V, TA = 25°C, f = 2.2 GHz 22 19.2 02721-030 7.2 10 0 Figure 28. OIP3 vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 27°C 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 02721-031 0 7.0 02721-027 5 Figure 31. OIP3 vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C 9.0 10 8.5 9 NOISE FIGURE (dBm) 7.5 7.0 NF AT 5.5V 6.5 6.0 NF AT 4.5V 5.5 8 7 NF AT +85°C 6 NF AT +25°C 5.0 5 NF AT 5.0V 4.5 4.0 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 Figure 29. Noise Figure vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C 4 0 500 1000 1500 2000 FREQUENCY (MHz) 2500 3000 02721-032 NF AT –40°C 02721-029 NOISE FIGURE (dB) 8.0 Figure 32. Noise Figure vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C Rev. B | Page 11 of 16 25 10 19 20 5 18 0 17 10 –5 16 5 –10 15 15 0 6.10 6.15 6.20 6.25 6.30 6.35 6.40 6.45 6.50 6.55 6.60 6.65 6.70 NOISE FIGURE (dB) Figure 33. Distribution of Noise Figure, VS = 5 V, TA = 25°C, f = 2.2 GHz –30 –25 –20 –15 –10 PIN (dBm) –5 0 5 Figure 35. Output Power and Gain vs. Input Power, VS = 3 V, TA = 25°C, f = 900 MHz 15 20 10 19 5 18 0 17 –5 16 –10 15 IS AT 5.5V 40 35 POUT (dBm) IS AT 5.0V 30 25 20 GAIN (dB) IS AT 4.5V 10 5 0 –60 –40 –20 20 0 40 TEMPERATURE (°C) 60 80 –15 –30 100 Figure 34. Supply Current vs. Temperature, VS = 4.5 V, 5 V, and 5.5 V 14 –25 –20 –15 –10 PIN (dBm) –5 0 5 02721-036 15 02721-034 SUPPLY CURRENT (mA) 14 –15 50 45 GAIN (dB) 20 02721-035 15 POUT (dBm) 30 02721-033 PERCENTAGE (%) AD8353 Figure 36. Output Power and Gain vs. Input Power, VS = 5 V, TA = 25°C, f = 900 MHz Rev. B | Page 12 of 16 AD8353 THEORY OF OPERATION The AD8353 is a 2-stage, feedback amplifier employing both shunt-series and shunt-shunt feedback. The first stage is degenerated and resistively loaded and provides approximately 10 dB of gain. The second stage is a PNP-NPN Darlington output stage, which provides another 10 dB of gain. Seriesshunt feedback from the emitter of the output transistor sets the input impedance to 50 Ω over a broad frequency range. Shuntshunt feedback from the amplifier output to the input of the Darlington stage helps to set the output impedance to 50 Ω. The amplifier can be operated from a 3 V supply by adding a choke inductor from the amplifier output to VPOS. Without this choke inductor, operation from a 5 V supply is also possible. It is critical to supply very low inductance ground connections to the ground pins (Pin 1, Pin 4, Pin 5, and Pin 8) as well as to the backside exposed paddle. This ensures stable operation. BASIC CONNECTIONS The AD8353 RF gain block is a fixed gain amplifier with single-ended input and output ports whose impedances are nominally equal to 50 Ω over the frequency range 1 MHz to 2.7 GHz. Consequently, it can be directly inserted into a 50 Ω system with no impedance matching circuitry required. The input and output impedances are sufficiently stable vs. variations in temperature and supply voltage that no impedance matching compensation is required. A complete set of scattering parameters is available at www.analog.com. When the supply voltage is 3 V, it is recommended that an external RF choke be connected between the supply voltage and the output pin, RFOUT. This increases the dc voltage applied to the collector of the output amplifier stage, which improves performance of the AD8353 to be very similar to the performance produced when 5 V is used for the supply voltage. The inductance of the RF choke should be approximately 100 nH, and care should be taken to ensure that the lowest series self-resonant frequency of this choke is well above the maximum frequency of operation for the AD8353. For lower frequency operation, use a higher value inductor. The input pin (RFIN) is connected directly to the base of the first amplifier stage, which is internally biased to approximately 1 V; therefore, a dc blocking capacitor should be connected between the source that drives the AD8353 and the input pin, RFIN. Bypass the supply voltage input, VPOS, using a large value capacitance (approximately 0.47 μF or larger) and a smaller, high frequency bypass capacitor (approximately 100 pF) physically located close to the VPOS pin. The AD8353 is designed to operate over a wide supply voltage range, from 2.7 V to 5.5 V. The output of the part, RFOUT, is taken directly from the collector of the output amplifier stage. This node is internally biased to approximately 2.2 V when the supply voltage is 5 V. Consequently, a dc blocking capacitor should be connected between the output pin, RFOUT, and the load that it drives. The value of this capacitor is not critical, but it should be 100 pF or larger. The recommended connections and components are shown in Figure 40. Rev. B | Page 13 of 16 AD8353 APPLICATIONS The AD8353 RF gain block can be used as a general-purpose, fixed gain amplifier in a wide variety of applications, such as a driver for a transmitter power amplifier (see Figure 37). Its excellent reverse isolation also makes this amplifier suitable for use as a local oscillator buffer amplifier that would drive the local oscillator port of an upconverter or downconverter mixer (see Figure 38). LOW FREQUENCY APPLICATIONS BELOW 100 MHz The AD8353 RF gain block can be used below 100 MHz. To accomplish this, the series dc blocking capacitors, C1 and C2, need to be changed to a higher value that is appropriate for the desired frequency. C1 and C2 were changed to 0.1 μF to accomplish the sweep in Figure 39. 21.0 dB-S21 AD8353 HIGH POWER AMPLIFIER 02721-037 20.5 Figure 37. AD8353 as a Driver Amplifier 20.0 19.5 19.0 18.5 MIXER 18.0 17.5 AD8353 02721-042 04862-038 LOCAL OSCILLATOR 17.0 16.5 16.0 Figure 38. AD8353 as a LO Driver Amplifier CH 1: START 300.000kHz STOP 100.000MHz Figure 39. Low Frequency Application from 300 kHz to 100 MHz at 5 V VPOS, −12 dBm Input Power Rev. B | Page 14 of 16 AD8353 EVALUATION BOARD Figure 40 shows the schematic of the AD8353 evaluation board. Note that L1 is shown as an optional component that is used to obtain maximum gain only when VP = 3 V. The board is powered by a single supply in the 2.7 V to 5.5 V range. The power supply is decoupled by a 0.47 μF and a 100 pF capacitor. AD8353 1 2 NC COM1 8 C2 1000pF OUTPUT C3 100pF C4 0.47μF RFOUT 7 C1 1000pF L1 4 RFIN COM2 VPOS 6 COM2 5 NC = NO CONNECT 04862-040 3 02721-039 INPUT COM1 Figure 41. Silkscreen Top Figure 40. Evaluation Board Schematic Table 5. Evaluation Board Configuration Options Function AC coupling capacitors. C3 High frequency bypass capacitor. C4 Low frequency bypass capacitor. L1 Optional RF choke, used to increase current through output stage when VP = 3 V. Not recommended for use when VP = 5 V. Default Value 1000 pF, 0603 100 pF 0603 0.47 μF, 0603 100 nH, 0603 04862-041 Component C1, C2 Figure 42. Component Side Rev. B | Page 15 of 16 AD8353 OUTLINE DIMENSIONS 1.89 1.74 1.59 3.25 3.00 2.75 1.95 1.75 1.55 TOP VIEW 12° MAX SEATING PLANE 5 BOTTOM VIEW * 8 EXPOSED PAD 4 2.95 2.75 2.55 PIN 1 INDICATOR 1.00 0.85 0.80 0.60 0.45 0.30 2.25 2.00 1.75 0.55 0.40 0.30 0.50 BSC 0.15 0.10 0.05 1 0.25 0.20 0.15 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF Figure 43. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 2 mm × 3 mm Body, Very Thin, Dual Lead CP-8-1 Dimensions shown in millimeters ORDERING GUIDE Model AD8353ACP-R2 AD8353ACP-REEL7 AD8353ACPZ-REEL7 1 AD8353-EVAL 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead LFCSP_VD 8-Lead LFCSP_VD, 7" Tape and Reel 8-Lead LFCSP_VD, 7" Tape and Reel Evaluation Board Package Option CP-8-1 CP-8-1 CP-8-1 Branding JB JB 0E Z = Pb-free part. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02721–0–12/05(B) T T Rev. B | Page 16 of 16