STV2102 PAL LUMA-CHROMA & DEFLECTION PROCESSOR PRELIMINARY DATA n n n n n n n RGB AND FAST BLANKING INPUTS AUTOMATIC CUT-OFF CONTROL DC-CONTROLLED BRIGHTNESS, CONTRAST AND SATURATION CERAMIC 500kHz VCO FOR LINE DEFLECTION PHASE-LOCKED REFERENCE OSCILLATOR USING A STANDARD 4.43MHz OSD CAPABILITY ON OUTPUTS VIDEO IDENTIFICATION GENERATOR SHRINK 42 (Plastic Package) DESCRIPTION The STV2102 is a PAL chroma decoder, video and H/V deflection processor for CTV. Used with the TDA8222, this IC permits a complete low cost solution with external output stages. It is pin compatible with STV2110 PAL/SECAM processor. ORDER CODE : STV2102 SUPPLY VOLTAGE Vcc 1 42 ICAT CATHODE CURRENT BLANKING INPUT BLK 2 41 Vcc SUPPLY VOLTAGE INPUT GREEN CUT-OFF CAPACITOR COG 3 40 BIN BLUE INPUT RED OUTPUT ROUT 4 39 GIN GREEN INPUT HORIZONTAL Vcc HVcc 5 38 COR RED CUT-OFF CAPACITOR GREEN OUTPUT GOUT 6 37 RIN RED INPUT BLUE OUTPUT BOUT 7 36 BRIG BRIGHTNESS CONTROL BLUE CUT-OFF CAPACITOR COB 8 35 FBL FAST BLANKING INPUT LUMINANCE SIGNAL INPUT YIN 9 34 CLPF CHROMA LOOP FILTER SCANNING LOOP FILTER SLPF 10 33 CXTL CHROMA XTAL SCANNING XTAL SXTL 11 32 CKP PAL KILLER CAPACITOR COMPOSITE VIDEO SIGNAL CVBS 12 31 NC NOT CONNECTED LINE FLYBACK INPUT LFB 13 30 ACC ACC CONTROL CAPACITOR VERTICAL OUTPUT VOUT 14 29 NC NOT CONNECTED HORIZONTAL OUTPUT HOUT 15 28 NC NOT CONNECTED CONTRAST CONTROL CTR 16 27 SAT SATURATION CONTROL NOT CONNECTED NC 17 26 NC NOT CONNECTED PAL CHROMA INPUT PALIN 18 25 NC NOT CONNECTED GROUND GND 19 24 GND GROUND DELAY CHROMA INPUT DLI 20 23 NC NOT CONNECTED CHROMA STANDARD PS 21 22 DLO CHROMA OUTPUT 2102-01.EPS PIN CONNECTIONS May 1992 1/12 This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without no tice. 2/12 2102-02.EPS NC 17 PALIN 18 22 DLO ACC 19 GND 20 23 DLI NC DL Matrix Killer Burst Detector ACC 30 CKP 32 90deg Phase Detector CLPF 34 24 GND 31 NC 21 PS 26 NC 25 NC FBL 35 29 28 NC NC Saturation Black Reference Clamp PAL Demod. Matrix Black Insertion SAT 27 Y Input Contrast HVcc 5 XVCO Vcc 41 CXTL 33 YIN 9 Vcc 1 RIN 37 BIN 40 SAT Mute CTR 16 13 LFB Burst Gate Generator Flip-Flop PAL RGB Switch Contrast + Clamp GIN 39 12 CVBS Sync. Sep. Leak. Current Meas. Phase Comp. 1 10 SLPF Phase Comp. 2 Line Counter Frame Sync. Separator Tube Temp Meas. Brightness BRIG 36 Divider Phase Shift Frame Output Decoder RGB Cut-off VCO Line Output Blank. Comp. 11 SXTL Blanking Blk. RGB 15 HOUT 14 VOUT 2 BLK 42 ICAT 8 COB 3 COG 38 COR 7 BOUT 6 GOUT 4 ROUT STV2102 BLOCK DIAGRAM STV2102 FUNCTIONAL DESCRIPTION DEFLECTION Synchronization Separator The synchronization separator is based on the bottom of synchronization pulses alignment to an internal reference voltage. An external capacitor permits to align synchro. pulses, two external resistors determines the detection threshold of synchro pulses. The frame synchronization pulses are locked to a 32µs reference signal to perfect interlacing. Horizontal Scanning The horizontal scanning frequency is obtained from a 500kHz VCO. The circuit uses two phase-locked loops (PLL). The first one controls the frequency; the second one, fully integrated, controls the relative phase of the synchronization and the line flyback signals. The first PLL has two times constants : a long time constant during the picture to have a good noise immunity, a short time constant at the beginning of the frame to recapture faster the phase in case of VCR video signal. More over, the PLL is in short time constant three lines before frame pulses occured, it permits to ensure good interlacing when the video signal comes from a VCR tape with high phase error. The horizontal output signal is 28µs width. On starting up, horizontal pulses are enabled at VCC = 6.8V. On shutting down, horizontal pulses are inhibited for VCC = 6.2V. The vertical output signal is 10.5 lines width. It permits to drive a sawtooth generator such as TDA1771. A video recognition function permits to sent the information of no video identification to SAT pin : it forces a low level when no video detection occurs. CHROMA ACC Amplifier, DL Matrix and Demodulator The correct chroma subcarrier input, issued from bandpass, is internally selected with the standard. The ACC amplifier envolves three stages : the first one select the correct input, the second one the -6dB in picture (PAL mode), the third one is controled by the ACC voltage. The dynamic range is over than 30dB. The chrominance output signal is fed to the delay line. The adding and substracting direct and delayed signals are performed by the DL matrix function. Two synchronous demodulators multiplies the (B-Y) signal with the 0 degree phase 4.43MHz reference signal and the (R-Y) signal with the alternate ± 90 deg. 4.43MHz phase reference signal. 4.43MHz Phase Locked Loop The oscillating frequency of the 4.43MHz crystal oscillator is controlled by the output voltage of the loop filter. The phase detector will lock the 90 degree reference signal to the direct burst signal. A 90 degree phase shifter permits to recover the 0 degree reference signal. A flip-flop driven by line pulses permits to generate the alternate ± 90 degree signal. ACC Control and Color Killer The direct burst signal is demodulatedwith the ± 90 degree reference signal. The demodulation result is used by ACC control and killer function. If the demodulation result is always positive, the killer capacitor is charged and the standard is identified (color ON). When demodulation result is always negative, the killer capacitor voltage reaches the flip-flop inhibition level, so the alternace sequence is reversed and the capacitor is charged again. In case of no video signal, the killer capacitor voltage is maintained about VCC/2, below the color off threshold. VIDEO The luminance input is controlled by the contrast control stage which range is 20dB. The luminance and color difference signals are added in the video matrix circuit to obtain the color signals. The color signals are sent to an RGB switch which will drive to the outputs either internal RGB signals or external RGB signals. Automatic Cut-off Control The black levels of the RGB outputs are controlled with the cut-off loops during three line periods after the frame retrace. The cut-off measurements are sequentially achieved during these three lines. The leakage current measurement is achieved during the frame retrace and memorized on an internal capacitor, thus the circuit is able to extract the cut-off current from the total current measurement. Warm-up Detector At the start-up, the cut-off loops are switch off, a white level is inserted on the luminance signal until a cathode current is detected. Then the cut-off loops are released. 3/12 STV2102 RGB Inputs To avoid the black level of the inserted signal differing from the black level of the normal video signal, the external RGB are clamped to the black level of the luminance signal. Therefore, an AC coupling is required for the RGB inputs. The RGB inputs are controlled by a 12dB range contrast control stage. Parameter Value 12 -55, +150 0, +70 Supply Voltage Storage Temperature Operating Temperature Unit V o C o C THERMAL DATA Symbol R th (j-a) Parameter Junction-ambient Thermal Resistance Value 70 Max. Unit C/W o 2102-02.TBL Symbol Vcc Tstg Toper 2102-01.TBL ABSOLUTE MAXIMUM RATINGS DC AND AC ELECTRICAL CHARACTERISTICS (VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol HV cc Vcc Icch Iccv&c PD Parameter Scanning Supply Voltage (Pin 5) Video & Chroma Supply Voltage (Pins 41-42) Scanning Supply Current (pin 5) Video & Chroma Supply Current (Pins 41-42) Total Power Dissipation Test Conditions Min. 8.1 8.1 No load No load No load Typ. 9 9 20 45 580 Max. 9.9 9.9 30 55 850 Unit V V mA mA mW 5 mVPP V µA µA 10 V V dB µA 10 V V µA LUMINANCE INPUT (Pin 9) VBW9 VDC9 Ig G9 Input Level before Clipping (black to white) DC Operating Voltage Input Current 350 2.5 ±100 No input signal • During burst period • Out of burst period Luma Gain 5.5 CONTRAST CONTROL (Pin 16) V16 V16 (Max.) G16 I16 Contrast Control Voltage Maximum Allowed Control Voltage Contrast Control Range Input Current 2 to 4 5 20 BRIGHTNESS CONTROL (Pin 36) V36 V36 (Max.) I36 Brightness Control Voltage Maximum Allowed Control Voltage Input Current 1.5 to 4.5 5 SATURATION CONTROL INPUT (Pin 27) I29 V29 V29 (Max.) G29 Input Current Saturation Control Voltage Maximum Allowed Control Voltage Saturation Control Range -50 µA V V dB ±150 1 µA µA 2 V 10 2 to 4 5 RGB CLAMP CAPACITORS (Pins 4-7-39) I4-7-39 Ii4-7-39 Control Current Leakage Current VBW 4-6-7 4/12 Output Signal Amplitude (black to white) • 0.35V B to W @ Pin 9 • Contrast @ max • Sat. & Brig. @ 3V 2102-03.TBL RGB OUTPUTS (Pins 4-6-7) STV2102 DC AND AC ELECTRICAL CHARACTERISTICS (continued) (VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit 2 7.8 0.7 20 mA V V mV 2 mV/ C MHz dB RGB OUTPUTS (Pins 4-6-7) (continued) -I4-6-7 VM4-6-7 Vblank 4-6-7 ∆Vtemp BW4-6-7 Individual Output Sinking Current Maximum Peak White Level Blanking Level Relative Variation in Black Level with Various CONT. SAT. BRIG between the 3 channels Black Level Thermal Drift Bandwith - 3dB Tracking between Luminance and Chrominance Signals over 10dB Contrast Control o 0.5 5 RGB INPUTS (Pins 37-39-40) VBW37-39-40 Maximum Input Level (B to W) Vclamp Clamp Level 2 V V Contrast max 1.5 -3dB 8 12 4 MHz dB 0.7 2.1 50 50 V V µA ns ns 1.75 250 V mV 37-39-40 BW 37-39-40 Bandwidth GCTR RGB Contrast Control Range G37-39-40 RGB Gain FAST BLANKING INPUT (Pin 35) VTH1-35 VTH2-35 I35 Tswitch T blank First Threshold (switching) Second Threshold (switching) Input Current Switching Delay Blanking Delay 0V @ Pin 35 50 CATHODE CURRENT INPUT (Pin 42) Leakage Current Reference Voltage CO Reference refered to Leakage Current Reference Low Voltage Output Current 200 µA AUTOMATIC CUT-OFF (Pin 3-8-38) V4-6-7 Capacitor Cut-off Positive Negative Clamping Start-beam Current Detection Reference Voltage Cut-off Output Range 100 2 µA V 3 V 900 30 mVPP mVPP 30 dB 8 3.5 kΩ V CHROMINANCE INPUT (Pin 18) GACC Input Level Before Clipping Minimum Burst Signal Amplitude within the ACC Control Range ACC Control Range R 18 VDC-18 Input Impedance DC Operating Voltage V18 Vburst-18 Change of burst over whole ACC Control Range < 1dB No input signal ACC CAPACITOR (Pin 30) I30 Ii30 Charging Current Leakage Current During burst gate period Out of burst gate period 1 µA µA 5 µA µA 250 I34 Ii34 Control Current Leakage Current 400 CHROMAXTAL (Pin 33) CR33 Catching Range 700 Hz 5/12 2102-04.TBL PLL LOOP FILTER (Pin 34) STV2102 DC AND AC ELECTRICAL CHARACTERISTICS (continued) (VCC = 9V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit SUBCARRIER OUTPUT (Pin 22) Vburst-22 Output Burst Amplitude (PAL mode) Within ACC Control Range 2.2 Vpp No chroma signal 4.9 5.4 3.2 250 6.0 V V V µA µA V 2.2 8 V kΩ KILLER CAPACITOR (Pin 32) VOFF-32 VON-32 VINH-32 I32 Ii32 Vnom-32 Collor off Voltage Color on Voltage PAL Flip-flop Inhibition Level Control Current Leakage Current Voltage with Nominal Input Signal 5 DELAYED CHANNEL INPUT (Pin 20) VDC-20 R20 DC Operating Voltage Input Impedance No input Signal PAL standard COMPOSITE VIDEO BASE BAND SIGNAL (Pin 12) VREF-12 V12 Voltage Reference Video Input Signal I12 = - 1µA 0.6 0.8 1.0 2.5 V VPP SCANNING XTAL (Pin 11) F 11 CR11 Frequency after Divider Frequency Control Range after Divider 15.625 ±700 kHz Hz 0.15 0.40 4 mA mA µs 0.6 5 V VPP V µA 5 6 V Vpp V µA µs PLL LOOP FILTER (Pin 10) Iiow-10 Ihigh-10 Low Loop Gain Output Current High Loop Gain Output Current Window Pulse Width DELAYED LINE FLYBACK INPUT (Pin 13) VTH-13 V13 VDC-13 I13 Threshold Line Flyback Amplitude Minimum Negative Voltage Input Current 1.5 -0.4 DIRECT BLANKING INPUT (Pin2) VTH-2 V2 VDC-2 I2 Ph22 Threshold Line Flyback Amplitude Minimum Negative Voltage Input Current External Adjustment 0.6 1.5 -0.4 Appli. Adjust. 2 4 26 28 1 6.8 6.2 10 HORIZONTAL OUTPUT (Pin 15) T 15 Vlow-15 Vstart -15 Vstop-15 ∆t15 Output Pulse Width Output Voltage (open collector) Vcc Start Level Vcc Stop Level ϕ2 Phase Range I15 = 10mA 29 µs V V V µs T 14 Tsync Vlow-14 6/12 Output Pulse Width Frame Synchro. Window Output Voltage (Open collector) 10.5 248 to 352 1 lines line V 2102-05.TBL VERTICAL OUTPUT (Pin 14) STV2102 Figure 1 : Pins 3-8-38-42 (COG, COB, COR, ICAT) 3-8-38 2102-03.EPS 42 Figure 2 : Pins 37-39-40 (RIN, GIN, BIN) Figure 3 : Pins 4-6-7 (ROUT, GOUT, BOUT) 4-6-7 Figure 4 : Pin 9 (YIN) 2102-05.EPS 2102-04.EPS 37-39-40 Figure 5 : Pin 10 (SLPF) 10 2102-07.EPS 2102-06.EPS 9 7/12 STV2102 Figure 6 : Pin 11 (SXTL) Figure 7 : Pin 12 (CVBS) VREF 11 Figure 8 : Pins 2-13 (BLK, LFB) 2102-09.EPS 2102-08.EPS 12 Figure 9 : Pins 14-15 (VOUT, HOUT) 2102-10.EPS Figure 10 : Pins 16-27 (CTR, SAT) 2102-11.EPS 14 15 2-13 Figure 13 : Pin 18 (PALIN) V REF2 18 16 8/12 2102-13.EPS 2102-12.EPS V REF STV2102 Figure 11 : Pin 20 (DLI) Figure 12 : Pin 21 (PS) 20 21 Figure 14 : Pin 32 (CKP) 2102-15.EPS 2102-14.EPS V REF1 Figure 15 : Pin 22 (DLO) 32 2102-17.EPS 2102-16.EPS 22 9/12 STV2102 2102-18.EPS Figure 16 : Pin 30 (ACC) 30 Figure 17 : Pin 36 (BRIG) Figure 18 : Pin 33 (CXTL) 33 2102-19.EPS 2102-20.EPS 36 Figure 19 : Pin 34 (CLPF) Base Current Compensation Figure 20 : Pin 35 (FBL) Phase Comparator 34 10/12 2102-22.EPS 2102-21.EPS 35 CVBS 3.3nF 10kΩ 2102-22.EPS 47nF CVBS 1kΩ 10µH CKS CKP ACC CLPF CXTL 750Ω 10nF DLO PS FBL 10µH 10µH DL RIN GIN 75Ω DLI 20 1kΩ 39 GIN 22nF 10nF 37 RIN 75Ω 390Ω Vcc HVcc FBL 1 41 5 35 330Ω 22 21 18 23 32 30 34 33 9 22nF 22nF YIN Vcc PALIN Vcc 10nF 6.8nF 33nF 4.43MHz 10nF 6.8nF 680kΩ 470kΩ 120pF 1kΩ V CC 1kΩ DL & TRAP 100µF 100µ F HVcc 38 COR COG 22nF 3 COB GND 24 GND 19 8 ICAT 42 ICAT 75Ω 100nF 100nF 100nF STV2102 40 BIN 22nF 75Ω BIN 13 LFB 2 1kΩ 4.7nF 5.6kΩ BLK CTR CTR 16 47kΩ Vcc BRIG 36 BRIG 15kΩ 22kΩ 39kΩ CVBS SLPF SXTL HOUT 500kΩ 12 10 11 15 VOUT SAT 2.2µF 100pF CVBS 1kΩ 3kΩ 500kHz 47nF 390Ω 1kΩ min. V CC MUTE 15kΩ 22kΩ 39kΩ +V 10nF 3.9kΩ RAMP GENERATOR (TDA1771) BOUT GOUT ROUT 100nF V CC 470Ω 470Ω 470Ω SAT 15kΩ 22kΩ 39kΩ 1kΩ min. 14 7 6 4 27 Vcc Vcc LBF EHT TRANSFORMER 1µ F LINE YOKE VERTICAL DEFLECTION V2 V1 STV2102 APPLICATION DIAGRAM 11/12 STV2102 PACKAGE MECHANICAL DATA 42 PINS - PLASTIC SHRINK DIP e4 A I b1 L a1 F b2 e b E Stand-off e3 A a1 b b1 b2 b3 D E e e3 e4 F i L 22 1 21 Min. 3.30 Millimeters Typ. 0.51 0.35 0.20 0.75 0.75 15.57 Max. Min. 0.130 0.020 0.014 0.008 0.030 0.030 0.59 0.36 1.42 39.12 17.35 1.778 35.56 15.24 Inches Typ. 0.613 Max. 0.023 0.014 0.056 1.540 0.683 0.070 1.400 0.600 14.48 5.08 2.54 0.570 0.200 0.100 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved 2 Purchase of I C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 12/12 SDIP42.TBL Dimensions 42 PMSDIP42.EPS D