PHILIPS GTL2010PWDH

INTEGRATED CIRCUITS
GTL2010
10-bit GTL Processor Voltage Clamp
Product specification
1999 Apr 05
Philips Semiconductors
Product specification
10-bit GTL Processor Voltage Clamp
FEATURES
GTL2010
PIN CONFIGURATION
• Direct interface with TTL level
• 6.5Ω ON-state connection between port Sn and Dn
GND 1
24
GREF
SREF 2
23
DREF
S1 3
22
D1
S2 4
21
D2
S3 5
20
D3
S4 6
19
D4
S5 7
DESCRIPTION
The GTL2010 is a high speed 10-bit voltage clamp. The low
ON-state resistance of the clamp allows connections to be made
with minimal propagation delay.
18
D5
S6 8
17
D6
S7 9
16
D7
S8 10
15
D8
S9 11
14
D9
S10 12
13
D10
The device is organized as one 10-bit voltage clamp. When S or D
is low, the clamp is in the ON–state and a low resistance connection
exists between the S and D ports. When S port and D port are high,
the clamp is in the OFF-state and a very high impedance exists
between the S and D ports. When port D is high, the voltage on the
S port is clamped to the applied reference voltage on the GREF
port.
SA00527
QUICK REFERENCE DATA
SYMBOL
CONDITIONS
Tamb = 25°C; GND = 0V
PARAMETER
TYPICAL
UNIT
tPLH
Propagation delay
Sn to Dn
VDD1 = 3.3V; VDD2 = 2.5V;
VREF = 1.5V; unloaded
1.5
ns
COFF
Channel capacitance (OFF-state)
VS = 1.5V
7.5
pF
ORDERING INFORMATION
PACKAGES
24-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
0°C to +85°C
GTL2010 PW
GTL2010PW DH
SOT355–1
PIN DESCRIPTION
CLAMP SCHEMATIC
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1
GND
Ground (0V)
2
SREF
Source of reference
transistor
3 – 12
Sn
Port S1 to Port S10
13 – 22
Dn
Port D1 to Port D10
23
DREF
Drain of reference
transistor
24
GREF
Gate of reference
transistor
DREF
SREF
FUNCTION TABLE
SN
DN
L
L
H
H
GREF
D1
D10
S1
S10
SA00526
H = High voltage level
L = Low voltage level
Z = High impedance “off ” state
1999 Apr 05
2
853-2153 21178
Philips Semiconductors
Product specification
10-bit GTL Processor Voltage Clamp
GTL2010
ABSOLUTE MAXIMUM RATINGS1, 2, 3
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VS_REF
DC source reference voltage
–0.5 to +7.0
V
VD_REF
DC drain reference voltage
–0.5 to +7.0
V
VG_REF
DC gate reference voltage
–0.5 to +7.0
V
VSn
DC voltage Port Sn
–0.5 to +7.0
V
VDn
DC voltage Port Dn
–0.5 to +7.0
V
IREFK
DC reference diode current
VI < 0
–50
mA
ISK
DC diode current Port Sn
VI < 0
–50
mA
IDK
DC diode current Port Dn
VI < 0
–50
mA
Channel in ON-state
±35
mA
–65 to +150
°C
IMAX
DC clamp current per channel
Tstg
Storage temperature range
NOTE:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
Min
Max
1.0
4.4
V
VS_REF
DC source reference voltage
VD_REF
DC drain reference voltage
VS_REF + 0.6
5
V
VG_REF
DC gate reference voltage
VS_REF + 0.6
5
V
VSn
DC voltage Port Sn (OFF-state)
VS_REF
5
V
VSn
DC voltage Port Sn (ON-state)
0
0.2
V
VDn
DC voltage Port Dn (OFF-state)
VS_REF
5
V
VDn
DC voltage Port Dn (ON-state)
0
0.4
V
IS
Switch input leakage current
(OFF-state) for Sn and Dn I/O
VS , VD = 5V
15
µA
II
GREF input leakage current
VG = 5V
2.5
µA
Operating ambient temperature range
In free air
+85
°C
Tamb
1999 Apr 05
0
3
Philips Semiconductors
Product specification
10-bit GTL Processor Voltage Clamp
GTL2010
DC CHARACTERISTICS for VDD1 = 3.0 to 3.6V; VDD2 = 2.36 to 2.64V; VREF = 1.365 to 1.635V range
Over recommended operating conditions. Voltage are referenced to GND (ground = 0V). Refer to the Test Circuit diagram.
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = 0°C to +85°C
Min
VOL
LOW level output voltage
Typ1
Max
260
350
VS = 0.175V; ICLAMP = 15.2mA
UNIT
mV
NOTE:
1. All typical values are measured at VDD1 = 3.3V, VDD2 = 2.5V, VREF = 1.5V and Tamb = 25 C
AC CHARACTERISTICS for VDD1 = 3.0 to 3.6V; VDD2 = 2.36 to 2.64V; VREF = 1.365 to 1.635V range
GND = 0V; tr = tf ≤ 3.0ns Refer to the Test Circuit diagram.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = 0 to +85°C
Propagation delay
Sn to Dn; Dn to Sn
tPLH2
UNIT
MIN
TYP1
MAX
0.5
1.5
5.5
ns
NOTE:
1. All typical values are measured at VDD1 = 3.3V, VDD2 = 2.5V, VREF = 1.5V and Tamb = 25 C
2. Propagation delay guaranteed by characterization
3. CON,MAX of 30pF and a COFF,MAX of 15pF is guaranteed by design
AC WAVEFORMS
TEST CIRCUIT
VDD1
VDD2
VDD2
VDD2
VI
INPUT
150Ω
200KΩ
VM
150Ω
150Ω
VM
GND
OUTPUT
HIGH-to-LOW
LOW-to-HIGH
VOL
VDD2
OUTPUT
HIGH-to-LOW
LOW-to-HIGH
VOL
DUT
tPLH
tPHL
VDD2
0
0
DREF
VM
GREF
D1
D10
S1
S10
VM
tPHL
tPLH
tPHL
tPLH
1
1
VM
SREF
VM
SA00524
VREF
Waveform 1. The Input (Sn) to Output (Dn) Propagation Delays
PULSE
GENERATOR
SA00525
Waveform 2. Load circuit
1999 Apr 05
4
Philips Semiconductors
Product specification
10-bit GTL Processor Voltage Clamp
GTL2010
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
1999 Apr 05
5
SOT355-1
Philips Semiconductors
Product specification
10-bit GTL Processor Voltage Clamp
GTL2010
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
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Document order number:
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Date of release: 10-98
9397-750-05519