TOSHIBA TMPN3120FE5M

TMPN3120FE5M
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TMPN3120FE5M
Neuron ® Chip
For Distributed Intelligent Control Networks (LONWORKS®)
The Neuron Chip TMPN3120FE5M provides double the
performance of previous Neuron Chips. It supports a response
time of 3 to 4 ms across a LONWORKS Network and has double
the input / output ( I / O ) performance of the previous Neuron
Chip in terms of both response time and data transmission speed.
The TMPN3120FE5M features an extra single-chip memory in the
form of 3 Kbytes EEPROM, 4 Kbytes SRAM and 16 Kbytes ROM.
It is therefore suitable for applications which require more
complex operations and high speed communication control.
Neuron Chips have all the built-in communications and control
functions required to implement LONWORKS nodes.
These nodes may then be easily integrated into highly-reliable
distributed intelligent control networks.
The typical functions for this chip are explained below.
FEATURES
Weight: 1.1g (Typ.)
z New features
( In comparison with TMPN3120E1M and TMPN3120FE5M )
• High-impedance communication port
• 3 Kbytes EEPROM
• 4 Kbytes static RAM
000707EBA1
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
• The information contained herein is subject to change without notice.
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z Main features of the 20 MHz Neuron Chip
( In comparison with the TMPN3120E1M and TMPN3120FE5M )
• Increased communication speed
The maximum transmission speed has been increased two-fold.
1.25 Mbps → 2.5 Mbps (*1)
*1: This value applies to Single-Ended Mode only.
• Shortened response time
The amount of time required from I / O input to I / O output has been greatly reduced.
Maximum speed 7 ms → 3 ~ 4 ms
• Increased IO object speed
The execution time for all objects has been halved.
Example ) Serial I / O 9600 bps
Parallel I / O 1.2 µs / byte
• Development tool support
The current LonBuilder® and NodeBuilder® development tools can be used to develop applications for
the TMPN3120FE5M (L.B ver 3.01 is needed.). Updated symbol table files for the Neuron Chip firmware
are available from Echelon. If your application requires a 20 MHz input clock, a utility program
available from Echelon may be used to convert the programmer files
*
The conversion utilities can be obtained from the Echelon Web Site at http://www.echelon.com.
z I / O Functions
• Eleven programmable I / O pins.
• Two programmable 16-bit timers and counters built in.
• 34 different types of I / O functions to handle a wide range of input and output.
• ROM firmware image containing pre-programmed I / O drivers, greatly simplifying application programs.
z Network functions
• Two CPUs for communication protocol processing built in.
The communications and application CPUs execute in parallel.
• Equipped with a built-in LonTalk protocol which supports all seven levels of the OSI reference model with
ISO.
• The ROM firmware image contains a complete network operating system, greatly simplifying application
programs.
• Built-in twisted-pair wire transceiver with improved common mode and drive current capabilities.
• Equipped with communications modes and communication speeds which support various types of external
transceivers.
Supports twisted-pair wire, power line, radio ( RF ), infrared, coaxial cables, and fiber optics.
• Communication port transceiver modes and logical addresses stored within the EEPROM.
Can be amended via the network.
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z Other functions
• Application programs are also stored within the EEPROM.
Can be updated by downloading over the network.
• Built-in watch-dog timer.
• Each chip has a unique ID number.
Effective during the logical installation of networks.
• Low electrical consumption mode supported with a sleep mode.
• Built in Selectable Reset time
Prolongs the power-ON reset time for at least 50 ms and keeps the operation stable during that time. The
reset time can be selected 50ms delay mode or 3 clock delay mode by program after the device is in
power-ON.
• High-impedance communication port ( CP0 to CP3 )
The Communication port pins ( CP0 to CP3 ) attain high impedance. This eliminates the need for an external
relay.
• Built-in low-voltage detection circuit.
Prevents incorrect operations and writing errors in the EEPROM during drops in power voltage.
An external LVD must be used to assert reset at power supply voltage below 4.5 V if Neuron Chip is operated
at 20 MHz.
• Programmable LVD (Low Voltage Detection) circuit.
LVDin pin is prepared in order to make it reset on arbitrary voltage.
• Firmware version 10.
z Timing for the main I / O objects during 20 MHz Neuron Chip operations
I / O MODEL
10 MHz TIMING
20 MHz TIMING
Parallel
2.4µs / byte
1.2µs / byte
Bitshift
1, 10 or 15 kbps
2, 20 or 30 kbps
Magcard
Up to 8334 bps
Up to 16668 bps
Magtrack1
Up to 7246 bps
Up to 14492 bps
Neurowire Master
1, 10 or 20 kbps
2, 20 or 40 kbps
Neurowire Slave
Up to 18 kbps
Up to 36 kbps
Serial
600, 1200, 2400 or 4800 bps
1200, 2400, 4800 or 9600 bps
Touch
Supported
Not supported
Resolution0.4 to 51.2µs
Resolution0.2 to 25.6µs
Max Range 26.21 to 3355 ms
Max Range 13.1 to 1678 ms
Resolution0.2 to 25.6µs
Resolution0.1 to 12.8µs
Max Range 13.1 to 1678 ms
Max Range 6.55 to 839 ms
Frequency Output
Other Timer / Counter
The specifications for the main timers during 20 MHz
operations are as follows :
Watchdog Timer
420 ms
Millisecond Timers
1 to 32000 ms
Second Timers
1 to 65000 s
Delay ( ) Function
1 to 32767 counts
Get_Tick_Count ( )
Function
409.6µs per count
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BLOCK DIAGRAM
ITEM
TMPN3120FE5M
CPU
8-bit CPU × 3
RAM
4,096 bytes
ROM
16,384 bytes
EEPROM
3,072 bytes
16-bit Timer / Counter
2 channels
External Memory Interface
Not available
Package
32-pin SOP
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PIN CONNECTION
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PIN FUNCTION
PIN No.
PIN NAME
I/O
15
CLK1
Input
14
CLK2
Output
1
~RESET
I/O
(built-in pull-up)
PIN FUNCTION
Oscillator connection, or external clock input.
Oscillator connection. Leave open when external
input to CLK1.
clock is
Reset pin. ( Active low )
I/O
8
~SERVICE
(built-in
configurable
pull-up)
7~4
IO0~IO3
I/O
I/O
Service pin. Indicator output during operation.
Large current sink capacity ( 20 mA ).
General I / O port.
General I / O port. One of IO4 to IO7 can be specified as
No.1 timer / counter input. Output signal can be output to
IO0.
IO4 can be used as the No.2 timer / counter input with IO1
as output.
3, 30~28
IO4~IO7
(built-in
configurable
pull-up)
27, 26, 24
IO8~IO10
I/O
General I / O port. Can be used for serial communication
with other device.
11, 12, 18, 25, 32
VDD
Input
Power input ( 5.0 V Typ. )
9, 10, 13, 16, 23, 31
VSS
Input
Power input ( 0 V GND )
2
LVDin
Input
Input pin for programmable LVD
( Normally connect to VDD )
19, 20, 17, 21, 22
CP0~CP4
I/O
Bidirectional port for communications. Supports several
communications protocols by specifying mode.
*:
● The ~SERVICE and IO4 to IO7 terminals are programmable pull-ups.
● All VDD terminals must be externally connected.
● All VSS terminals must be externally connected.
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MAXIMUM RATINGS ( VSS = 0V, VSS typ.)
ITEM
SYMBOL
RATING
UNIT
VDD
−0.3~7.0
V
Input Voltage
VIN (1)
−0.3 to VDD + 0.3 V
V
Input Voltage CP0-CP3
VIN (2)
−0.5 to VDD + 1.3 V
VIN (2) ≤ 7.3 (Note 1)
V
Drain Current
IDD
200
mA
Source Current
ISS
300
mA
Power Dissipation
PD
800
mW
Storage Temperature
Tstg
−65~150
°C
Power Supply Voltage
Note1 : VIN(2) don’t exceed the 7.3v.
OPERATING CONDITIONS
SYMBOL
MIN
TYP.
MAX
UNIT
VDD
4.5
5.0
5.5
V
VIH
2.0
―
VDD
V
VIL
VSS
―
0.8
V
VIH
VDD − 0.8 V
―
VDD
V
VIL
VSS
―
0.8
V
VIH
―
―
VDD + 1.0 V
( differential mode )
VIL
−0.1
―
―
Operating Frequency
fosc
0.625
―
20
MHz
Operating Temperature
Topr
−40
―
85
°C
ITEM
Operating Voltage
Input Voltage ( TTL )
Input Voltage ( CMOS )
Input Voltage CP0-CP3
V
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ELECTRICAL CHARACTERISTICS
DC characteristic ( VDD = 5.0 V ± 10%, VSS = 0 V, Ta = −40~85°C )
( Above operating conditions apply unless otherwise states. )
ITEM
SYMBOL
PINS
TEST CONDITION
MIN
MAX
UNIT
LOW Level Input Voltage (1)
VIL (1)
IO0~IO10
CP0, CP3, CP4,
~SERVICE
―
0
0.8
V
LOW Level Input Voltage (2)
VIL (2)
~RESET
―
0
VDD
× 0.3
V
HIGH Level Input Voltage (1)
VIH (1)
IO0~IO10
CP0, CP3, CP4,
~SERVICE
―
2.0
VDD
V
HIGH Level Input Voltage (2)
VIH (2)
~RESET
―
VDD
− 0.7 V
VDD
V
LOW Output Voltage (1)
VOL (1)
IO0~IO3
~SERVICE,
~RESET
IOL = 20mA
0
0.8
IOL = 10mA
0
0.4
LOW Output Voltage (2)
VOL (2)
CP2, CP3
IOL = 40mA
0
1.0
V
LOW Output Voltage (3)
VOL (3)
Others ( Note 1 )
IOL = 1.4mA
0
0.4
V
HIGH Output Voltage (1)
VOH (1)
IO0~IO3
IOH = −1.4mA
VDD
− 0.4 V
VDD
V
HIGH Output Voltage (2)
VOH (2)
~SERVICE
IOH = −1.4mA
VDD
− 0.4 V
VDD
V
HIGH Output Voltage (3)
VOH (3)
CP2, CP3
IOH = −40mA
VDD
− 1.0 V
VDD
V
HIGH Output Voltage (4)
VOH (4)
Others ( Note 1 )
IOH = −1.4mA
VDD
− 0.4 V
VDD
V
IIN
( Note 2 )
VIN = VSS~VDD
−10
10
µA
IPU
(Note 3)
IO4~IO7
~SERVICE,
~RESET
VIN = 0V
−30
−300
µA
VLVD
VDD
3.8
4.5
V
Input Current
Pull-up Current
Low-voltage Detection Level
―
V
Note1 : Output voltage characteristics exclude the CLK2 pin.
Note2 : Excludes pull-up input pins.
Note3 : The IO4 to IO7 and ~SERVICE pins have programmable pull-ups. ~RESET has a fixed pull-up.
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ITEM
Operating
Mode
Current
Consumption
Sleep Mode Current
Consumption
SYMBOL
TYP.
MAX
20 MHz Clock
34
55
10 MHz Clock
16
30
8.5
15
4.5
8
1.25 MHz Clock
2.3
5
0.625 MHz Clock
1.3
3
16
100
5 MHz Clock
2.5 MHz Clock
IDD (OP)
IDD (SLP)
UNIT
mA
µA
Note : Test conditions for current dissipation
VDD = 5V, all output = with no load, all input = 0.2 V or below or VDD − 0.2 V, programmable pull-up = off,
crystal oscillator clock input, differential receiver disabled.
The current value ( typ. ) is a typical value when Ta = 25°C.
The current value ( max ) applies to the rated temperature range at VDD = 5.5 V.
200µA ( typ. ) to 600µA ( max ) is added to the current of the differential receiver when the receiver is
enabled.
The differential receiver is enabled by either of the following conditions :
● When the Neuron Chip is in Run mode and the communication ports are in Differential mode.
● When the Neuron Chip is in Sleep mode, the communication ports are in Differential mode, and the
Comm Port Wakeup is not masked.
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z Echelon, Neuron, LON, LonTalk, LonBuilder, NodeBuilder, LONWORKS, 3150, 3120 and LonManager are the
registered trade marks of America’s Echelon Inc.
z The Neuron Chip is manufactured by Toshiba under license from Echelon Corporation, USA. A licensing
agreement between the customer and Echelon Corporation must be concluded before purchasing any of the
neuron chip products.
z The Neuron chip itself does not include the I2C object function. You need the “I2C Library” delivered by Echelon.
The Neuron chip and the I2C Library do not convey nor imply a right under any I2C patent rights of Philips
Electronics N.V. ( “Philips” ) to make, use or sell any product employing such patent rights. Please refer all
questions with respect to I2C patents and licenses to Philips at:
Mr. Gert-Jan Hessenlmann
Corporate Intellectual Property
Philips International B.V.
Prof. Holstlaan 6
Building WAH 1-100
P.O. Box 220
5600 AE, Eindhoven, The Netherlands
Phone : +31 40 274 32 61
Fax : +31 40 274 34 89
E-mail : [email protected].
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PACKAGE DIMENSIONS
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