SONY CXA1871S

CXA1871S
NTSC/PAL Y/C/Jungle
Description
The CXA1871S is a bipolar IC which integrates the
NTSC and PAL color TV luminance signal
processing, chroma signal processing, sync signal
processing, and RGB signal processing onto a
single chip.
Features
• I2C bus compatible. Various types of adjustments
and user controls performed with two bus lines
SCL and SDA.
• H and V oscillation frequencies made nonadjusting with a countdown system.
• Non-adjusting Y system filters (chroma trap, delay
line)
• Built-in V picture distortion correction circuit
• Built-in delay line aperture compensation
• Auto cut-off function for automatic CRT cut-off
adjustment and compensation for changes with
time
• Multiple inputs
Composite Video
2 systems
(Built-in 2-input, 1-output video switch)
Y/C separation input: 1 system
On screen display input: 1 system
• Multiple system configuration possible using a nonadjusting SECAM chroma decoder.
48 pin SDIP (Plastic)
Absolute Maximum Ratings
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
(Ta=25 °C)
VCC
12
V
Topr –20 to +75 °C
Tstg –65 to +150 °C
PD
1.8
W
Operating Conditions
Supply voltage
VCC
9±0.5
V
Applications
Color TV
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E95432-TE
VCC
6
46
45
48
CLAMP
DET SW
COLOR
47
CHROMA
DET.
COLOR
11
X' TAL PIN
PHASE
SHIFT
DEM
AXIS
AXIS
OSD BLK
PICTURE
AXIS
RGB SW
4
4.43/3.58
SW
CHROMA
VCO
HUE
YM
3
LPF
PHASE
DET.
ID AXIS
2fH
F.F
Y/C MIX
CLAMP
2
COLOR
KILLER
B.G.
PAL ID
NT/PAL
NT/PAL
AUTO
PEDESTAL
5
KILLER
TOT SW
HUE
CLAMP
13
TOT
NR
SUB HUE
SHARPNESS
ABL
BLK
22
IK
B CUTOFF
G CUTOFF
20
AKB
DC
SHIFT
18
DRIVE
24
CLAMP
BRIGHT
ABL
26
17
AKB
TIMING
GAMMA
28
16
REF
DYNAMIC
COLOR
BRIGHT
SUB BRIGHT
27
15
OSD
MIX
50/60
V COMPENSATION
V OFF
V ZOOMING
HV COMP
30
VOSC
29
14
PICTURE
VEX C MODE
V COUNT
DOWN
31
8
V.SYNC
SEP
BLUE
1
SECAM
ACC
ACC
DET.
DELAY
44
BLACK
XRAY
42
SECAM
REF
C IN 12
DELAY
TRAP
SUB COLOR
SUB
CONT
NR
H.DRIVE
PHASE
SHIFT
H PHASE
XRAY
PHASE
DET
32
V GND
Y IN 10
TRAP SW
SUB CONT
0/6DB AMP
IN SW SW GAIN
2fH
1/32
AFC HLOCK
PHASE
DET.
32fH
VCO
35
APC
V2 IN 25
SDA
X PAL1
V1 IN 7
H SYNC
X PAL2
9
H.SYNC
SEP
PRE OVER
X NTSC
SW OUT
SCL
IREF
IREF
BUS
DECORDER
REG
REGU
LATOR
33
34
J GND
A PED
I2C
36
AFC
37
HP
DC TRAN
39
CERA
SHARPNESS
43
OSD
BLK
38
OSD R
40
OSD G
41
OSD B
XRAY
B-Y OUT
VOSC
DY COL
V HOLD
OSD
V LPF
IK
HD
R-Y OUT
V LIN
R S/H
SCP
B-Y IN
V SIZE
G S/H
V SYNC
R-Y IN
V SHIFT
GAMMA
S CORR
G DRIVE
VD
B DRIVE
ABL LPF
PMUTE
V PLS
NT/PAL
B OFF
ABL IN
R OFF
B S/H
—2—
EXT
COLOR
G OFF
Block Diagram
23 BOUT
21 GOUT
19 ROUT
CXA1871S
CXA1871S
Pin Configuration
SECAM REF
1
48
R-Y OUT
X PAL1
2
47
B-Y OUT
X PAL2
3
46
B-Y IN
X NTSC
4
45
R-Y IN
APC
5
44
V SYNC
VCC
6
43
H SYNC
V1 IN
7
42
SCP
V HOLD
8
41
SDA
SW OUT
9
40
SCL
Y IN
10
39
REG
A PED 11
38
IREF
C IN 12
37
AFC
V GND 13
36
CERA
OSD BLK 14
35
J GND
OSD R 15
34
HP
16
33
XRAY
OSD B 17
32
HD
R S/H 18
31
V PLS
R OUT 19
30
V LPF
20
29
V OSC
G OUT 21
28
ABL LPF
B S/H 22
27
VD
B OUT 23
26
ABL IN
24
25
V2 IN
OSD G
G S/H
IK
—3—
CXA1871S
Pin Description
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
VCC
VCC
6k
1
SECAM
REF
20 p
1.3 V
1
20 k
When the IC is in the SECAM
identification mode, the 4.43 MHz
VCO oscillation waveform is output
from this pin only during the VBLK
period centering on DC = 1 V. If
current of 150 µA is led from this pin
during this identification mode, the IC
switches to the SECAM mode. In the
SECAM mode, DC = 5 V.
VCC
4k
2
3
4
X PAL 1
X PAL 2
X NTSC
Crystal oscillator connection pins.
Connect the PAL/N and 4.43 MHz
crystals to Pin 2, the PAL/M crystal to
Pin 3, and the NTSC crystal to Pin 4.
VCC
2.6 V
2
500
3
4
VCC
1.2 k
VCC
5
5
APC
5V
6
VCC
9V
1.2 k
25 k
APC lag-lead filter CR connection pin.
Power supply pin.
VCC
7
7
25
V1 IN
V2 IN
2V
Video switch input pins. Sync tip
clamping is performed, so input via
capacitors.
150
25
—4—
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
55 k
VCC
8
V HOLD
0.7 V
150
Peak hold pin for V sync separation.
Connect a capacitor.
1k
8
50 k
VCC
VCC
9
SW OUT
VCC
500
—
Video switch output pin.
30 k 12 k
9
2k
25 k
VCC
VCC
1.2 k
10
Y IN
3.5 V
Y signal input pin. Input via a
capacitor.
Standard input level: 2 Vp-p
50 k
10
VCC
VCC
VCC
16 k
20 k
1.2 k
VCC
11
A PED
3.5 V
11
20 k
—5—
Auto pedestal (black stretch) black
peak hold pin. Connect a capacitor.
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
Chroma signal input pin.
30 k
12
C IN
—
12
13
V GND
Standard input level (burst level)
: 570 mVp-p
30 k
6k
6k
—
Video system (Y/C/RGB) GND pin.
VCC
VCC
15 k
40 k
Blanking signal input pin for OSD
RGB input.
14
60 k
14
OSD BLK
60 k
—
60 k
2k
30 k
2k
30 k
VCC
2k
30 k
2k
VCC
Digital R, G and B signal input pins for
on screen display.
15
15
16
17
OSD R
OSD G
OSD B
—
0 to 1 V: Blanking not performed.
2 to 3 V: Signal from Y IN/C IN
lowered by –6 dB.
4 to 6 V: R, G and B outputs become
lower than black level.
16
0 to 1 V: No OSD display.
2 to 3 V: OSD level 49 IRE (34 IRE)
4 to 6 V: OSD level 96 IRE (67 IRE)
Figures in parentheses are for when
the I2C OSD register is set to 0.
17
VCC
18
18
20
22
R S/H
G S/H
B S/H
20
—
1.2 k
22
—6—
Sample-and-hold pins for R, G and B
AKB (Auto Kinetic Bias). Connect to
GND via capacitors.
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
VCC
R OUT
G OUT
B OUT
VCC
150
VCC
19
21
23
Description
19
—
R, G and B output pins.
5k
21
23
VCC
VCC
24
IK
—
Inputs the signal obtained by
converting the CRT beam current (IK)
into voltage. Connect to an emitter
follower via a capacitor.
150
24
VCC
10 k
26
ABL IN
30 k
150
—
ABL voltage input pin.
26
VCC
VCC
3k
3k
VCC
27
VD
—
Vertical deflection sawtooth wave
output pin.
15 k
27
5k
VCC
VCC
VCC
24 k
28
28
ABL LPF
—
24 k
ABL signal LPF pin. Connect a
capacitor. If the AKB loop is unstable
when the power is turned on, this pin
is lowered to around 0.3 V.
100 k
VCC
35 k
10 k
—7—
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
VCC
VCC
100
29
V OSC
—
Connect a capacitor to generate the V
sawtooth wave.
29
100
VCC
30
V LPF
5V
VCC
30
V pulse output pin. A negative
polarity pulse 3 to 3.5 H width is
output from this pin.
VCC
VCC
74 k
31
V PLS
—
Connect a capacitor to hold the AGC
voltage which maintains the V
sawtooth wave at a constant
amplitude.
31
18 k
High level: 4.5 V
Low level: 0 V
VCC
32
32
HD
—
20 k
H drive output pin. This pin is output
at the open collector.
20 k
VCC
VCC VCC
VCC
63 k
19 k
33
33
XRAY
—
30 k
30 k
27 k
X-ray protection circuit input pin.
When a pulse with a width of 7 V or
more is input, HD output becomes low
and R, G and B outputs are blanked.
This status is maintained until the
power supply is turned off.
40 k
Vilmax = 2.4 V
Vihmin = 3.0 V
—8—
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
VCC
34
HP
3.3 V
(at no
signal)
35
J GND
—
VCC
10 k
60 k
H pulse input pin. Inputs a 3 to 5 Vp-p
signal via a capacitor.
34
Jungle system (H/V) GND pin.
VCC
VCC
10 k
VCC
28 k
36
CERA
2.3 V
330
36
Connect a 32 fh (503.5 kHz) ceramic
oscillator.
VCC
VCC
VCC
46 k
37
AFC
3.2 V
AFC lag-lead filter CR connection pin.
37
1.2 k
VCC
38
IREF
2.6 V
150
20 k
38
—9—
Connect a 15 kΩ resistor between this
pin and GND.
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
VCC
VCC
Description
VCC
VCC
VCC
40 k
4p
39
REG
7V
Regulator pin for voltage generated
internally from V CC . Connect a
39
1.2 k
capacitor for stabilization.
50 µA
VCC
I2C bus SCL (Serial Clock) and SDA
(Serial Data) pins.
VCC
40
41
SCL
SDA
—
40
4k
Vilmax = 1.5 V
Vihmin = 3 V
Volmax = 0.4 V
41
4k
VCC
VCC
Outputs BGP, HBLK and VBLK as
SCP (Sand Cathle Pulse).
The Typ. waveform is as follows.
1.2 k
VCC
42
SCP
—
5.0 V
BGP
2.5 V
500 µA
H,VBLK
0.3 V
VCC
14 k
24 k
43
H SYNC
150
2.6 V
20 k
43
10 µA
VCC
H sync separation input pin. Inputs a
2 Vp-p video signal via a capacitor
and resistor.
10 k
26 k
150
31 k
44
44
V SYNC
3.8 V
20 µA
10 k
20 k
—10—
V sync separation input pin. Inputs a
2 Vp-p video signal via a capacitor
and resistor.
CXA1871S
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
VCC
Color difference signal input pins.
Input via capacitors.
45
1.2 k
46
45
46
R-Y IN
B-Y IN
5.2 V
50 k
Standard input level
B-Y: 1.33 Vp-p
R-Y: 1.05 Vp-p
BGP
100 µA
VCC
47
47
48
B-Y OUT
R-Y OUT
VCC
VCC
VCC
20 k
10 k
Color difference signal output pins.
48
80 k
5V
—11—
Standard input level
B-Y: 0.665 Vp-p
R-Y: 0.525 Vp-p
CXA1871S
Electrical Characteristics
Setting conditions
• Ta = 25 °C, VCC = 9 V
• I2C bus register should be set to “I2C Bus Register Initial Settings”.
Item
No.
1 Current consumption 1
Symbol
Measurement
Measurement
conditions
pin
ICC1
6
Measurement method
Min. Typ. Max.
70
Measure the VCC pin inflow current.
105
Unit
140
mA
Min. Typ. Max.
Unit
H system items
No.
2
3
Item
Horizontal free running
frequency
Horizontal sync pull-in
range
Symbol
Measurement
Measurement
conditions
pin
15.47 15.65 15.83 kHz
32
Hfree
∆H
Measurement method
Video In: Sig-H2,H3
–400
Check that I2C register HLOCK is 1.
AFC: 0
—
400
Hz
0.12 0.30 0.48
µs
Video In: Sig-H6
4 AFC gain 1
AFCmax
AFC: 0
Video In: Sig-H7
34
t1: Video In: Time from fall
AFCmax=t1-t2
of Sig-H6 to rise of Pin 34.
AFC: 0
Video In: Sig-H6
5 AFC gain 2
AFCcen
AFC: 1
Video In: Sig-H7
34
t2: Video In: Time from fall
AFCcen=t1-t2
—
0.5
—
µs
AFCmin=t1-t2
0.75
1.2
1.75
µs
24
26
28
µs
8.7
9
—
V
0.5
0.8
1.1
V
–4.3 –3.3 –2.3
µs
–1.5 –0.5
0.5
µs
1.3
2.3
3.3
µs
—
100
—
ns
—
100
—
ns
4
5.0
6
V
of Sig-H7 to rise of Pin 34.
AFC: 1
Video In: Sig-H6
6 AFC gain 3
AFCmin
AFC: 2
Video In: Sig-H7
34
AFC: 2
7 HD output pulse width
HD, W
Video In: Sig-H1
8 HD output high level
HD, H
Video In: Sig-H1
9 HD output low level
10
11
12
13
Horizontal phase
HD, L
HPHmax
Horizontal phase
HPHcen
operating range 2
Horizontal phase
HPHmin
HD,W
Video In: Sig-Y1
Pin 23
Video In: Sig-Y1
23
HPHASE: 7
34
Video In: Sig-Y1
HPH
HPHASE: 0
operating range 3
HP blanking delay
Video In: Sig-H1
HPHASE: F
operating range 1
HD,L
HD,H
32
HPBLK1
time 1
Video In: Sig-Y1
23
Pin 23
34
14
HP blanking delay
time 2
15 SCP BGP output level
Pin 34
HPBLK2
HPBLK1
HPBLK2
VSB
VSB
16 SCP BLK output level
VSBL
42
VSL
17 SCP low level
18
Overvoltage protection
circuit VTH
VSBL
VSL
XVTH
32
Check that HD appears at 2.4 V and disappears
at 2.8 V.
—12—
2.4
2.5
V
0.3
V
2.6
2.8
V
CXA1871S
V system items
No.
Item
19 V PLS high level
Symbol
Measurement
Measurement
conditions
pin
VPLS, H
Video In:Sig-V1
20 V PLS low level
21
VD output
Measurement method
Min. Typ. Max.
Unit
4
4.5
5
V
0
0.1
0.5
V
2.9
3.05
V
VPLS, H
31
VPLS, L
VPLS, L
VDcen
V SHIFT:F
Vb
2.75
VSHIFT–
V SHIFT:0
Vb-VDcen
–140 –125 –115
mV
VSHIFT+
V SHIFT:1F
Vb-VDcen
110
120
140
mV
Vc-Va
0.9
1.1
1.2
V
Vc-Va
1.5
1.65
1.8
V
45
65
85
mV
–55
–35
–15
mV
90
120
140
mV
60
90
110
mV
0
3
15
mV
60
80
100
mV
center voltage
22
V SHIFT
variable range 1
23
V SHIFT
variable range 2
24
V SIZE
VSIZE–
V SIZE:0
Vc
variable range 1
25
V SIZE
Pin 27
VSIZE+
V SIZE:3F
variable range 2
Vsa=Va
S CORR:0
26
variable range 1
∆Sa
S CORR:F
27
Vb
S CORR
S CORR
variable range 2
∆Sc
GND
Video
In:
Sig-V1
28
Va
Vc-Vsc
VTRIG
variable range 1
∆La
V LIN
∆Lc
variable range 2
Va-Vla
0.1 ms
Vc-Vlc
8.75
ms
HV COMP: 0,
Pin 26: 6 V
16.57
ms
HV COMP: 7,
30 V zooming 1
31 V zooming 2
Vla=Va
Vlc=Vc
V LIN
V LIN:F
29
Va-Vsa
27
V LIN:0
Vsc=Vc
Vsmin=
Vc-Va
Vsmax=
Pin 26: 6 V
Vc-Va
∆VZ1
HV COMP: 0,
Vsmin-
Pin 26: 0 V
(Vc-Va)
∆VZ2
HV COMP:7,
Vsmax-
Pin 26: 0 V
(Vc-Va)
—13—
CXA1871S
Y system items
No.
Item
32 R output level
33
34
Sub-contrast
variable range 1
Sub-contrast
variable range 2
Symbol
VR
Measurement
Measurement
conditions
pin
Video In:Sig-Y1
Gsc, max SUBCONT: F
Gsc, min SUBCONT: 0
TRAP SW: 0
35 Trap attenuation 1
Measurement method
Video In:
VR
19
Sig-Y1
Vsc1
20log
Vsc2
20log
Vsc1
VR
Vsc2
VR
Video In:
ATT
Sig-Y2
trap1
fsc=
TRAP SW: 1
Min. Typ. Max.
Unit
—
2.5
—
V
2.2
2.7
3.2
dB
–3.8 –3.3 –2.8
dB
Vtr1
20log
19
Vtr2
Vtr1
Vtr2
—
–30
–20
dB
—
–30
–20
dB
5.5
7.0
8.5
dB
1.5
2.5
4.5
dB
–7.5 –5.5 –3.0
dB
3.58 MHz
TRAP SW: 0
36 Trap attenuation 2
Video In:
ATT
Sig-Y2
trap2
fsc=
TRAP SW: 1
Vtr1
20log
19
Vtr2
Vtr1
Vtr2
4.43 MHz
37
38
39
40
41
Sharpness
characteristics 1
Sharpness
characteristics 2
Sharpness
characteristics 3
RGB output
frequency response 1
RGB output
frequency response 2
Gsh, max
Gsh, cen
Gsh, min
Gfreq1
Gfreq2
SHARP
NESS: F
SHARP
NESS: 7
SHARP
NESS: 0
DELAY=0
Sig-Y4
20log
19
Vs2
(Sig-Y5)
Sig-Y5
Video In:
Video In:
Sig-Y4, Y6
Vs2
Vs1
Video In:
Sig-Y4, Y6
DELAY=2
Vs1
(Sig-Y4)
Video In:
Vf1
(Sig-Y4)
19
20log
21
23
Vf2
(Sig-Y6)
19
Vf1
(Sig-Y4)
21
–6
–3.0
0
dB
–7
–4.2
–1
dB
96
99
100
%
73
78
85
%
Voff-Von
280
340
400
mV
Voff-Von
80
130
170
mV
Vf1
20log
Vf2
(Sig-Y6)
23
Vf2
Vf2
Vf1
Vdpp
Video In:
Sig-Y3
42
DC transmission
rate 1
Gdt1
DC TRAN: 0
Video In:
Vdw-Vdb
Vdw
Sig-Y1
Vdpp
Video In:
Vdb
Sig-H1
Video In:
Sig-Y3
43
DC transmission
rate 2
19
Video In:
Gdt2
DC TRAN: 7
45
Auto pedestal
operation 1
Auto pedestal
operation 2
Vdw-Vdb
Vdw
Sig-Y1
Vdpp
Video In:
Sig-H1
44
Vdpp
Pin 11: 3 V
Vdp1
Pin 11: 5 V
Pin 11: 3 V
Vdp2
Pin 11: OPEN
Video In:
Sig-H1
Video In:
Sig-Y10
Vdb
Voff
19
Von
Voff
19
Von
—14—
CXA1871S
No.
Item
Symbol
Measurement
Measurement
conditions
pin
NR: 1
46 NR operation
Von
20log
19
Sig-Y7
NR: 0
Min. Typ. Max.
Von
Video In:
Gnr
Measurement method
Voff
Unit
–6
–4.5
–3
dB
5.5
6
6.5
dB
–0.5
0
0.5
dB
Voff
47 SW gain 1
Gsw1
SW GAIN: 1
48 SW gain 2
Gsw2
SW GAIN: 0
Video In:
Vin
(Pins 7 and 25) 20log Vout
7, 25
Sig-Y1
9
Vin
Vout (Pin 9)
C system items
No.
49
50
Item
APC pull-in
range 1
APC pull-in
range 2
Symbol
∆f, apc1
∆f, apc2
Measurement
Measurement
conditions
pin
Check that the burst frequency is changed to
Video-In: Sig-H1
C In: Sig-C1, C2
23
Video-In: Sig-H1
Vcl
COLOR: 3F
23
Video-In: Sig-H1
52
level
Vrcl
C In: Sig-C3
COLOR: 3F
54
55
56
57
58
59
60
61
62
Color variable
range 1
Color variable
range 2
Sub-color variable
range 1
Sub-color variable
range 2
Hue variable
range 1
Hue variable
range 2
Hue variable
range 3
Sub-hue variable
range 1
Sub-hue variable
range 2
AAAAA
A
A
AA
f=fsc (3.58 MHz
or 4.43 MHz)
fsc (3.58 MHz or
4.43 MHz)
component and
2 fsc component
Vrcl
SUBCOLOR: F
53 Color output level
Check that the burst frequency is changed to
Vcl
SUBCOLOR: F
Residual carrier
3579545 ±350 Hz and pulled in.
4433619 ±350 Hz and pulled in.
C In: Sig-C1, C2
Video-In: Sig-H1
51 Carrier leak
Measurement method
Vco, cen
Vco0
Vco
Gco, max COLOR: 3F
20log
Gco, min COLOR: 0
Gsc, max
Gsc, min
Video In:
Sig-H1,
SUB COLOR C In: Sig -C5
23
SUB COLOR
Vco2
20log
Vco0
Vsc1
20log
Vsc2
20log
Vsc1
Vco0
Vsc2
:0
Vco0
During Sig-C3
φcen
φmax
HUE: 3F
φmin
HUE: 0
Vc1
Vc2
Video In:
Sig-H1,
C In: Sig -C3
20
Vc1-Vc2
tan–1
Vc4-Vc3
During Sig-C4
-C4
φs, max SUB HUE: F
φs, min
Vco2
f=100 kHz
:F
SUB HUE:0
φr1
Vc3
Vc4
∆V2
C In: Sig -C4
-C3
φg1
Vr2
Vr1
Vr2
∆V1
Sig-H1,
Vg1
–350
—
350
Hz
–350
—
350
Hz
—
—
50
mV
—
—
200
mV
0.6
0.9
1.2
V
5.6
6.3
6.9
dB
—
–50
–40
dB
2.1
2.7
3.3
dB
–5.4 –3.7 –2.0
dB
–10
0
10
deg
–54
–44
–34
deg
23
33
43
deg
–21
–15
–9
deg
8
13
20
deg
105
112
119
deg
244
251
259
deg
0.7
0.8
0.9
—
0.26
0.3
0.34
—
270°–
tan–1
21
Unit
90°+
tan–1
19
Video In:
AXIS: 0
64 Detective axis G1
Vco0
Vco1
Vr1
63 Detective axis R1
Vco1
Min. Typ. Max.
Vg2
Vg1
Vg2
65
66
Detective output
ratio R1
Detective output
ratio G1
Vx
Video In:
Gr1
AXIS: 0
Gg1
19
Vrg
Sig-H1,
C In: Sig -C5
Vx
VBW
Gcomax VRW
21
f=100 kHz
—15—
Vgg
Vx
VBW
Gcomax VGW
CXA1871S
No.
Item
Symbol
Measurement
Measurement
conditions
pin
Measurement method
Vr1
67 Detective axis R2
φr2
Video In:
AXIS: 1
68 Detective axis G2
19
Vr2
∆V1
Sig-H1,
φg2
90°+
tan–1
Vg1
21
69
70
71
72
ratio R2
Detective output
ratio G2
AGC
characteristics 1
AGC
characteristics 2
73 Killer point 1
74 Killer point 2
75
Chroma frequency
response 1-1
Video In:
Gr2
AXIS: 1
tan–1
Gacc1
Gacc2
KPNT
KPPAL
Gcf1–
Vx
Sig-C6,
Sig-H1
C In:
Sig-H1
During
C In: Sig-C8
Vg2
229
236
243
deg
VBW
—
–1.0
0.1
1.0
dB
–3
–1
0
dB
–38
–34
–30
dB
–38
–34
–30
dB
—
–3
—
dB
—
–1
—
dB
–2.3
—
0.2
dB
–2.7
—
0.2
dB
—
–3
—
dB
—
–1
—
dB
–2.3
—
0.2
dB
–2.7
—
0.2
dB
48
—
0.5
—
Vp-p
47
—
0.62
—
Vp-p
—
1.26
—
Vgg
Vac2
VBW
Gcomax VGW
20log
20log
Vac1
Vco0
Vac2
Vco0
Check that output
disappears at –38 dB
23
and appears at –30 dB.
-C9
C In: Sig-C5
-C11
Video-In:
deg
0.29 0.34 0.39
f=100 kHz
f=100 kHz
Video In:
PAL input
Vx
20
NTSC input
97
Vg1
Gcomax VRW
Vx
20
Sig-C7
TOT SW: 1
Vrg
Vac1
During
90
—
C In:
Video In:
83
Vr1
0.49 0.56 0.63
19
Sig-H1
C In: Si -C5
Gg2
Vr2
270°–
Vg2
Detective output
Unit
∆V2
C In: Sig-C4,
-C3
Min. Typ. Max.
Sig-H1
76
77
Chroma frequency
response 1-2
Chroma frequency
response 2-1
Gcf1+
Gcf2–
fsc
=3.58 MHz
TOT SW: 0
C In: Sig-C10
C In: Sig-C5
-C11
Video-In:
Sig-H1
78
79
Chroma frequency
response 2-2
Chroma frequency
response 3-1
Gcf2+
Gcf3–
fsc
=3.58 MHz
TOT SW: 1
Video-In:
C In: Sig-C10
C In:
80
81
response 3-2
Chroma frequency
response 4-1
Gcf3+
Gcf4–
C In:
=4.43 MHz
Sig-C10
TOT SW: 0
Video-In:
82
83
84
85
response 4-2
R-Y output
amplitude
B-Y output
amplitude
Output amplitude
ratio
Gcf4+
VRY
VBY
Sig-C5
-C11
VBR
fsc
C In:
=4.43 MHz
Sig-C10
Video-In: Sig-H1
C In: Sig-C13
Video-In: Sig-H1
C In: Sig-C12
Vx (Sig-C5)
C In:
Sig-H1
Chroma frequency
Vx
Vref
Vref=
-C11
fsc
20log
23
Sig -C5
Sig-H1
Chroma frequency
Vx
—
VBR=VBY/VRY
—16—
CXA1871S
RGB system items
No.
86
Item
Drive variable
range 1
Symbol
Measurement
Measurement
conditions
pin
19
Gdr1
G DRIVE: 1F
B DRIVE: 1F
87
88
89
90
Drive variable
range 2
Picture variable
range
Dynamic color
operation R
Dynamic color
operation B
Measurement method
Gdr2
G DRIVE: 0
B DRIVE: 0
Vr0
20log
Video-In:
Sig-H1
Y In:
23
20log
PICTURE: 0
21
Video-In:
Gdy, r
DY COL: 0
Gdy, b
Sig-H1
Y In:
Sig-R1
Video-In:
GAM1
Gamma
0/7
Y In:
Vr1
20log
19
Vdyr
Vdyr
Vr0
Vdyb
23
Sig-R1
GAM2
OSD BLK
black variation
99
OSD BLK
attenuation
ABL threshold
value
100 ABL gain
Vosd2
19
Video-In:
OSD BLK:
Vosd3
94.5
98.5
%
X100
103 105.5 107
%
97
10
18
26
IRE
–8
0
8
IRE
55
65
75
IRE
23
33
43
IRE
82
92
102
IRE
36
46
56
IRE
–150 190
410
mV
Vg2 (GAMMA: 0)
21
Vg2 (GAMMA: 7)
23
–Vg2 (GAMMA: 0)
Sig-R3
VOSD
19
V1
21
VOSD2(4)
23
V1
X100
V1=100IRE
Vosd4
∆Vosd
OSD BLK:
Video In:
Sig-R2 (5 V) Sig-Y1
Gosd
OSD BLK:
Video In:
Sig-R2 (3 V) Sig-Y1
Vth, abl Video In: Sig-Y1
Gabl1
Vabl1
Gabl2
ABL: 0
103 ABL black level 2
X100
Vr0
–Vg1 (GAMMA: 0)
Vg1
19
VD –
21
VOSDBLK
23
VD
19
V2
V1
21
20log
23
19
Vabl2
V2
V1
Vary the voltage applied to Pin 26 and measure the
voltage at which picture ABL operates
Vp, 5 V
20log
Vp, 9 V
Video In:
Vp
Sig-Y1
Vb, 5 VVb, 9 V
19
102 ABL gain 2
dB
Vr1
VOSD1(3)
Sig-H1
ABL: 3
101 ABL black level 1
–15.7 –14.7 –13.7
Vr0
Vg1 (GAMMA: 7)
Vg2
VOSDBLK
98
dB
Vdr2
Vosd1
OSD: 1
97
–5.2 –4.5 –3.3
1.5
Vg2 (GAMMA: 0)
OSD: 0
96 OSD level 4
Vdyb
Vdr1
(100 IRE)
95 OSD level 3
dB
23
Sig-H1
94 OSD level 2
2.2
Vr0
19
Gpic
GAMMA:
93 OSD level 1
0.7
Vdr1
Vdr2
Sig-R1
(50 IRE)
92 characteristics 2
Unit
Vdr1
21
Gamma
91 characteristics 1
Min. Typ. Max.
Vb
Pin 28:
9 V/5 V
Vp, 5 V
20log
Vp, 9 V
Vb, 5 VVb, 9 V
–7
–6
–5
dB
1.1
1.2
1.3
V
–3.4 –2.4 –1.4
dB
140
340
mV
–8.8 –6.8 –4.8
dB
–100
0
100
mV
0
0.2
0.4
V
240
19
104 Blanking level
Vblk
Video In: Sig-R1
21
Measure the R, G and B blanking levels.
23
—17—
CXA1871S
No.
Item
105 Ik clamp level
106 Ik R level
107
108
109
110
Ik variable
range 1
Ik variable
range 2
RGB output
DC range 1
RGB output
DC range 2
111 Bright center -R
Symbol
Measurement
Measurement
conditions
pin
B
VIk, clp
VIk, r
VIk, max
VIk, min
Video In:
G CUTOFF: F Sig-V1
114
115
116
117
118
119
120
range 1-R
Bright variable
range 1-G, B
Bright variable
range 2-R
Bright variable
range 2-G, B
Sub-bright variable
range 1-R
Sub-bright variable
range 1-G, B
Sub-bright variable
range 2-R
Sub-bright variable
range 2-G, B
VIK
Min. Typ. Max.
Unit
1.25 1.35 1.45
V
0.76 0.86 0.96
V
0.25 0.35 0.45
V
–0.64 –0.54 –0.44
V
24
Vlk,b Vlk,g Vlk,r
Vlkg, b-Vlk, r
G CUTOFF: 0
Vlk,clp
B CUTOFF: 0
Vsh: 4.6 V
Vref, max (Pins 18,
3.2
19
20 and 22)
21
Vsh: 8 V
Vref, min (Pins 18,
3.5
4.0
V
0.45 0.85 1.25
V
–0.5 –0.4 –0.3
V
–0.46 –0.36 –0.26
V
Vref
23
20 and 22)
19
Vbcen, r
23
Vbrt1, r
BRIGHT: 3F
Vbrt1, gb
Vbrt2, bg
Vsbrt2, r
Vsbrt2, gb
Sig-V1
19
REFP Vsig
0.3
21
19
BRIGHT: 0
Vsbrt1, gb
Video In:
23
Vbrt2, r
Vsbrt1, r
Vsig-Vref
21
112 Bright center -G, B Vbcen, gb
Bright variable
G
B CUTOFF: F
BRIGHT: 1F
113
Measurement method
Vref
21
23
SUB
BRIGHT: 3F
19
21
23
SUB
BRIGHT: 0
19
21
23
—18—
0.35
0.4
V
0.27 0.32 0.37
V
–0.38 –0.33 –0.28
V
–0.36 –0.31 –0.26
V
Vsig
(BRIGHT: 1F)
–Vsig
0.3
0.35
0.4
V
0.27 0.32 0.37
V
–0.38 –0.33 –0.28
V
–0.36 –0.34 –0.26
V
CXA1871S
I2C bus system items
No.
Item
Symbol
Min.
Typ.
Max.
Unit
121
High level input voltage
Vih
3.0
—
5.0
V
122
Low level input voltage
Vil
0
—
1.5
V
123
High level input current
Iih
—
—
10
µA
124
Low level input current
Iil
—
—
10
µA
125
Low level output voltage
During current inflow of 3 mA to SDA (Pin 41)
Vol
0
—
0.4
V
126
SDA inflow current
Iol
3
—
—
mA
127
Input capacitance
Ci
—
—
10
pF
128
Clock frequency
fscl
0
—
100
kHz
129
Data change minimum waiting time
tbuf
4.7
—
—
µs
130
Data transfer start waiting time
thd;sta
4.0
—
—
µs
131
Low level clock pulse width
tlow
4.7
—
—
µs
132
High level clock pulse width
thigh
4.0
—
—
µs
133
Start preparation waiting time
tsu;sta
4.7
—
—
µs
134
Data hold time
thd;dat
5
—
—
µs
135
Data preparation time
tsu;dat
250
—
—
ns
136
Rise time
tr
—
—
300
ns
137
Fall time
tf
—
—
300
ns
138
Stop preparation waiting time
tsu;sto
4.7
—
—
µs
—19—
CXA1871S
Signals Used for Measurements
H system
63.556 µs
fH=15.734 kHz
SIG-H1
4.8 µs
0.57 V
61.98 µs
SIG-H2
fH+400 Hz
4.65 µs
0.57 V
65.21 µs
SIG-H3
fH–400 Hz
4.96 µs
0.57 V
59.759 µs
fH+1 kHz
SIG-H4
4.51 µs
0.57 V
67.870 µs
SIG-H5
fH–1 kHz
5.13 µs
0.57 V
62.563 µs
fH+250 Hz
SIG-H6
4.73 µs
0.57 V
64.583 µs
fH–250 Hz
SIG-H7
4.88 µs
0.57 V
—20—
CXA1871S
V system
Equivalent pulse 3 H
Vsync3 H
Equivalent pulse 3 H
SIG-V1
fV = fH / 262
4.8 µs
Equivalent pulse interval 1/ 2 H
1 H=63.556 µs
Vsync interval 1/ 2 H
—21—
2.5 µs
CXA1871S
Y system
1.7 µs
1.43 V
9.5 µs
SIG-Y1
4.8 µs
0.57 V
0.7 V
f = 3.58 MHz
SIG-Y2
1.7 µs
9.5 µs
1.43 V
26 µs
SIG-Y3
4.8 µs
0.57 V
0.7 V
f = 100kHz
SIG-Y4
0.7 V
f = 3MHz
SIG-Y5
—22—
CXA1871S
0.7V
f = 8MHz
SIG-Y6
0.28V
f = 5 MHz
SIG-Y7
1.4V
f = 5MHz
SIG-Y8
0.7V
f = 9 MHz
SIG-Y9
0.14V
SIG-Y10
6.6µs
9.8µs
1.43V
4.8µs
0.57V
SIG-Y11
63.556µs
—23—
CXA1871S
C system
63.556 µs
SIG-H1
fH = 15.734 kHz
4.8 µs
1.7 µs
0.57 V
0.5 µs
fsc+350 Hz
fsc+100kHz, 0.1 Vp-p
SIG-C1
0.5 Vp-p
3 µs
fsc–350 Hz
fsc+100 kHz, 0.1 Vp-p
SIG-C2
0.5 Vp-p
fsc0°
fsc+90°, 0.3 Vp-p
fsc-90°, 0.3 Vp-p
SIG-C3
0.5 Vp-p
fsc0°
35.5 µs
fsc+0°, 0.3 Vp-p
fsc+180°, 0.3 Vp-p
SIG-C4
0.5 Vp-p
fsc
35.5 µs
fsc+100 kHz, 0.5 Vp-p
SIG-C5
0 dB
0.5 Vp-p
fsc
fsc+100 kHz, 1.0 Vp-p
SIG-C6
6 dB
1 Vp-p
—24—
CXA1871S
63.556 µs
SIG-H1
4.8 µs
1.7 µs
0.57 V
fH = 15.734 kHz
0.5 µs
fsc
fsc+100 kHz, 50 mVp-p
SIG-C7
–20 dB
50mVp-p
3µs
fsc
fsc+100 kHz, 32 mVp-p
SIG-C8
–30 dB
32 mVp-p
fsc
fsc+100 kHz, 5 mVp-p
–40 dB
SIG-C9
5 mVp-p
fsc
fsc+500 kHz, 0.1 Vp-p
SIG-C10
0.5 Vp-p
fsc
fsc–500 kHz, 0.1 Vp-p
SIG-C11
0.5 Vp-p
fsc0°
fsc–13°, 0.96 Vp-p
fsc+167°, 0.96 Vp-p
SIG-C12
0.5 Vp-p
fsc0°
35.5 µs
fsc+104°, 1.36 Vp-p
SIG-C13
0.5 Vp-p
35.5 µs
—25—
fsc–76°, 1.36 Vp-p
CXA1871S
RGB system
1.43 Vp-p
0.7 Vp-p
SIG-R1
3 V or 5 V
SIG-R2
5V
2.5 V
SIG-R3
—26—
CXA1871S
Mesurement Method
I2C Bus Register Initial Settings
No.
of bits
6
2
6
1
6
1
6
1
4
4
4
4
6
1
1
Initial
setting
3 FH
3H
1 FH
0H
1 FH
0H
1 FH
0H
7H
7H
7H
7H
1 FH
0H
0H
PIX ON
1
1H
R ON
G ON
B ON
PRE OVER
1
1
1
3
1H
1H
1H
0H
AXIS
1
0H
BLACK
DYCOL OFF
REF
ABL
BLUE
1
1
2
2
1
0H
1H
1H
0H
0H
Register name
PICTURE
RGB LIM
HUE
IN SW
COLOR
SW GAIN
BRIGHT
NR ON
SHARPNESS
SUB CONT
SUB HUE
SUB COLOR
SUB BRIGHT
TRAP ON
TOT ON
Description
Maximum value
Maximum value
Center value
V1 IN selected
Center value
0 dB gain
Center value
NR OFF
Center value
Center value
Center value
Center value
Center value
TRAP OFF
TOT OFF
Picture mute
OFF
R output ON
G output ON
B output ON
Minimum value
NTSC detective
axis
BLACK OFF
DY COL OFF
Center value
Minimum value
BLUE OFF
No.
of bits
Initial
setting
OSD
1
0H
G DRIVE
DC TRAN
B DRIVE
GAMMA
G CUTOFF
B CUTOFF
H PHASE
V ON
5
3
5
3
4
4
4
1
FH
0H
FH
0H
7H
7H
7H
1H
V EX OFF
1
1H
AFC
V SHIFT
HV COMP
V SIZE
C MODE
V LIN
SCORR
SYSTEM1
SYSTEM2
SYSTEM3
SYSTEM4
SYSTEM5
X’TAL PIN
DELAY
4.43X’TAL
2
5
3
6
1
4
4
1
1
1
2
1
2
2
1
1H
FH
3H
1 FH
0H
7H
7H
1
0
0
0
0
2
0
0
EXT COLOR
1
0
Register name
—27—
Description
Luminance level
small
Center value
Minimum value
Center value
Correction OFF
Center value
Center value
Center value
VD output ON
V sync
expansion OFF
Center value
Center value
Center value
Center value
Countdown ON
Center value
Center value
Fixed mode
60 Hz
60 Hz
NTSC
3.58 MHz
Pin 4
Y Delay 0ns
3.58 MHz x’tal
Identification
switching
CXA1871S
Electrical Characteristics Measurement Circuit
5V
47 µ
12 p
2.2 k
12p
2
X PAL1
B-Y OUT
47
3
X PAL2
B-Y IN
46
4
X NTSC
R-Y IN
45
5
APC
V SYNC
44
1µ
1µ
2.2 k
470 p
330
220 k
0.47 µ 15 k
47 µ
0.01 µ
H SYNC
43
V1 IN
SCP
42
8
V HOLD
SDA
41
9
SW OUT
SCL
40
10 Y IN
REG
39
11
A PED
IREF
38
12
C IN
AFC
37
6
VCC
7
560
0.22 µ
330 k
4700 p
100 k
0.47 µ
2.2 k
3/5 V
I 2C
4.7 µ
0.22 µ
0.47 µ
15 k
14
OSD BLK
5.6 k 2.2 µ
CERA
36
J GND
35
HP
34
15 OSD R
16
OSD G
XRAY
33
17
OSD B
HD
32
500 kHz
ceramic
oscillator
HP
GEN.
C IN
13 V GND
CXA1871S
0.01 µ
X RAY 0 V
∗
VDC 6.7 V
2.2 k
18 R S/H
V PLS
31
V LPF
30
V OSC
29
ABL LPF
28
VD
27
ABL IN
26
V2 IN
25
0.1 µ film
19
R OUT
∗
0.22 µ film
20
G S/H
4.7 µ
21 G OUT
9/5 V
∗
22
B S/H
23
B OUT
0/6V
CRT
DRIVE
VCC 9 V
1µ
100 p 3.3 k
2.2 k
48
10 k
12 p
SECAM REF R-Y OUT
1H DELAY LINE
0.01 µ
1
24 IK
∗ 10 µ
0.22 µ
—28—
∗ Pin 18, 20, 22 and 24 switches are
ON only for electrical characteristic
measurements No. 106 to 109.
CXA1871S
Reference Circuit
CRT Drive Circuit
+9 V
1.1 k
110 k 1.1 k
2SA
1175
110 k 1.1 k
2SA
1175
2SC
2785
2SC
2785
110 k
2SA
1175
68 k
to IK of the IC
2SC
2785
2SC
2785
100
1k
100
1k
470
2SC
2785
2SA1175
2SC
2785
100
1k
470
47 k
470
GND
from Pins R, G and B OUT of the IC
HP Gen
+9 V
10 k
Pulse width 12 µ
6.8 k
1µ
3.3 k
0.022 µ
HP
1000 p
6.8 k
16
15
14
13
1
2
3
4
12
11
10
9
6
7
8
4538
5
470 p
HD
10 k
Delay 10 µs
B-Y OUT
B-Y IN
R-Y IN
+5 V
1000 P
R-Y OUT
1000 P
1H DELAY LINE
16
15
14
13
12
11
10
9
6
7
8
TDA4665
1
2
3
4
5
SCP
—29—
CXA1871S
Application Circuit
PAL/N or
4.43 MHz 1
∗1 X'TAL ∗2
2.2 k
12 p
PAL/M X'TAL
2.2 k
12 p
R-Y OUT 48
2
X PAL1
B-Y OUT 47
3
X PAL2
B-Y IN 46
4
X NTSC
R-Y IN 45
5
APC
Color difference
output to 1 H
delay line
1µ
Color difference
input from 1 H
delay line
470 p
1µ
330
V SYNC 44
0.47 µ 15 k
47 µ
220 k
6
VCC
7
V1 IN
SCP 42
8
V HOLD
SDA 41
H SYNC 43
0.01 µ
560
0.22 µ
Composite
video 1 input
330 k
100 p
+9 V
3.3 k
1µ
10 k
NTSC X'TAL
2.2 k
12 p
SECAM REF
4700 p
Sand Cathle Pulse
output
220
0.47 µ
2.2 k
9
SW OUT
SCL 40
10
Y IN
REG 39
11
A PED
IREF 38
12
C IN
AFC 37
13
V GND
CERA 36
14
OSD BLK
J GND 35
I2 C
220
4.7 µ
0.22 µ
4.7 µ
15 k
0.01 µ
5.6 k 2.2 µ
500 kHz
ceramic
oscillator
220
OSD
inputs
2.2 k
1µ
220
15
OSD R
HP 34
16
OSD G
XRAY 33
220
H pulse input
10 k
X-ray protection input
1µ
220
17
100 p
0.1 µ film
18
V PLS 31
R S/H
19
R OUT
V LPF 30
20
G S/H
V OSC 29
21
G OUT
22
B S/H
23
B OUT
0.1 µ film
0.22 µ film
4.7 µ
220
ABL LPF 28
0.1 µ film
VD 27
220
47 k
Ik input
V pulse output
0.1 µ film
220
RGB
outputs
H drive output
HD 32
OSD B
10 k
V drive output
1.5 k
ABL IN 26
ABL input
1µ
0.47 µ
24
V2 IN 25
IK
100
Composite
video 2 input
0.22 µ
∗ When 4.43 MHz XTAL is connected to Pin 2
change the capacitance of +1 to 10 pF and
the resistor of ∗2 to 470 Ω, and then use them.
47 p
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
—30—
CXA1871S
Description of Operation
1. Synchronizing and picture distortion correction systems
The video signals (2 Vp-p standard) input to Pins 43 and 44 are led to the horizontal and vertical sync
separation circuits for sync separation.
This horizontal sync signal is compared with the signal obtained by 1/32 frequency dividing the 32 fh VCO
output using the ceramic oscillator (frequency: 503.5 kHz) to detect a phase difference. The error voltage
resulting from the phase difference is applied to the H oscillator after attenuating the medium and high
frequency components by a lag-lead filter. The phase of the H oscillator output is compared and shifted to
match the phase of the H deflection pulse (flyback pulse) input from Pin 34, and then output from Pin 32.
After the vertical sync signal is synchronized to the input signal by the V countdown system, a sawtooth
wave is generated by charging and discharging the capacitor attached externally to Pin 29. AGC is
performed to ensure that the amplitude of the sawtooth wave output is maintained constant regardless of
the vertical frequency of the input, after which the sawtooth wave passes through the picture distortion
correction circuit and is output from Pin 27.
Note that there is no need to adjust the free running frequency for either the H or V oscillator.
When voltage of 3 V or more is applied to Pin 33, the H drive output is held at low level. A time constant
circuit is included to protect against overvoltages, and H drive is output normally when high voltage input
continues for less than 7 V cycles. To release holddown, the IC must be turned off and then started up
again.
BGP, HBLK and VBLK are output to Pin 42 as SCP (Sand Cathle Pulse).
Note)
If external capacitance of Pin 30 is used with 0.1 µF or less of the recommended value, vertical sync output
may be unstable.
When changing the capacitance value, use it with 0.047 µF or more.
—31—
CXA1871S
2. Y/C system
The Y/C system has the following three input systems.
Composite video input (1 Vp-p/2 Vp-p) → 2 systems (The gain can be switched between 0 and 6 dB for
both systems.)
Y/C separation input (2 Vp-p)
→ 1 system
The Y signal (specified input level 2 Vp-p) input to Pin 10 is passed through the sub-contrast control,
chroma trap (or delay line), delay line, sharpness control, noise reduction, clamp and auto pedestal circuits.
The signal is then mixed with the color difference signal, passed through the clamp and Y/C MIX circuits
again, and input to the RGB interface system block.
Since a built-in chroma trap is provided, the video signal can be directly input. Trap frequency adjustment
is not necessary as a dummy filter is provided inside the IC and feedback is applied using the 3.58 MHz or
4.43 MHz signal generated by a crystal oscillator for reference. When the chroma trap is off, the Y system
frequency response is approximately 8 MHz, –3 dB for R, G and B outputs.
Sharpness control is delay line type with a variable PRE/OVER ratio.
Dynamic picture control consists of pulling in the signal below 40 IRE to the black side so that the signal
black peak held by Pin 11 becomes the pedestal level.
The chroma signal (specified input level, burst 570 mVp-p, or video signal 2 Vp-p) input to Pin 12 is passed
through the ACC and TOT, and the burst only is set to the maximum gain by the B.G. This burst is then
peak detected by ACC DET, level controlled by the I2C bus register, and fed back to the ACC again. When
the B.G. output burst signal is smaller than a certain level, killer turns on, the chroma signal is replaced with
DC by the B.G., and the color gain is set to the minimum. The burst signal is detected using the VCO
oscillation output which has received hue control as the carrier, and a signal (the R-Y axis sub-carrier due
to chroma demodulation) whose phase is offset 90° from the burst signal is generated. During PAL input,
this sub-carrier is inverted 180° every 1 H and output. The phase is not inverted during NTSC input. The
chroma signal is demodulated into the color difference signals R-Y and B-Y by this sub-carrier. The signal
is set to 6 dB during NTSC input, or passed through the 1 H delay line and set to 0 dB during SECAM and
PAL input, after which it is input to the matrix circuit where the G-Y color difference signal is generated.
Then, the color difference signals are passed through the Y/C MIX circuit, and input together with the Y
signal to the RGB interface system block.
The detective axis (NTSC/PAL) can be switched by the I2C bus register.
NTSC or PAL input is automatically identified and output to the status register. In addition, during PAL
input, the phase relationship between the burst and R-Y sub-carrier is detected. If a phase error is detected
at this time, it is corrected by applying feedback to the flip flop.
—32—
CXA1871S
3. RGB interface system
YS/YM switching is performed according to the amplitude of the OSD RGB input blanking signal input from
Pin 14.
0 to 1.5 V
→
TV (Y/C input)
1.5 to 3.5 V →
TV –6 dB
3.5 to 5.5 V →
Black
The R, G and B signals of the Y/C system pass through the RGB switch (BLUE and BLACK ON/OFF) and
receive picture control. These signals are mixed with the digital R, G and B signals (specified input level 0
to 5 V DC) input from Pins 15, 16 and 17, passed through the dynamic color, gamma correction, bright
control, drive adjustment (R channel is fixed, G and B channels are variable.), cut-off adjustment (R channel
is fixed, G and B channels are variable.) and auto cut-off DC level shift circuits, and then output from Pins
19, 21 and 23 as the R, G and B signals. The RGB output amplitude has a limit voltage whose setting
value can be controlled with the I2C bus register. The digital R, G and B signals are mainly used for on
screen display of channels, etc. and the display level can be set with the I2C bus register.
The signal input to Pin 26 (ABL IN) is compared with the internal reference voltage and is then integrated by
the capacitor connected to Pin 28 (ABL LPF) for picture and brightness control. Picture ABL mode and
combined picture ABL and brightness ABL mode can be switched with the I2C bus register.
Note)
When the digital R, G and B signals and OSDBLK signal are not used, connect Pins 14, 15, 16 and 17 to
GND.
Auto cut-off
For white balance, drive control (gain control between R, G and B outputs) and cut-off control (black side
DC level control) are involved. This IC uses the I2C bus register for drive control. For cut-off control, a loop
is formed between the IC and CRT to achieve auto cut-off control.
This auto cut-off arrangement makes it possible to compensate for CRT changes with time. To absorb the
CRT variance, the cut-off voltages of the G and B outputs are adjusted by the I2C bus register.
The auto cut-off loop is configured as described below.
(1) R, G and B reference pulses for auto cut-off, shifted 1H each in the order mentioned, are added to
the top of the picture.
(2) The IK of each of the R, G and B outputs is converted to a voltage and input to Pin 24.
(3) The voltage input to Pin 24 is compared with the reference voltage in the IC to change the DC level
of the reference pulses.
The loop mentioned above determines the shift level of the R, G and B outputs and lets the capacitances
connected to Pins 18, 20 and 22 hold the DC shift level during the 1 V period. If the voltage at any one of
Pins 18, 20 and 22 is less than 4.2 V, the status register IK (bit 6) becomes “1”. Use this information to
blank the R, G and B outputs with the I2C bus register. The positions of the reference pulses can be
changed by the I2C bus register.
—33—
CXA1871S
System Identification Method (when 443XTAL = 0)
fSC
fH
fV
PIN
NO.
PAL/N
3582056 15625
[Hz]
[Hz]
50
[Hz]
Pin 2
PAL/M
3575611 15734
[Hz]
[Hz]
60
[Hz]
Pin 3
NTSC
3579545 15734
[Hz]
[Hz]
60
[Hz]
Pin 4
Conditions for locking the
system to this pin
Conditions for releasing the lock
(1) KILLER=ON
(1) KILLER=ON
(2) When NT/PAL identification
(2) 50/60 identification result
result changes from PAL to
= 50 Hz∗1
NTSC∗2
(1) KILLER=ON
(2) When NT/PAL identification
result changes from PAL to
(1) KILLER=OFF
NTSC∗2
(3) When 50/60 identification
result changes from 60 to 50
(1) KILLER=ON
(1) KILLER=OFF
(2) When 50/60 identification
result changes from 60 to 50
∗1 When the 50/60 identification result changes from 60 Hz to 50 Hz, pin switching is performed until the
system is locked to Pin 2. However, when the 50/60 identification result changes from 50 Hz to 60 Hz,
identification is ignored.
∗2 NTSC→PAL = Don’t care
System Identification Method (when 443XTAL = 1)
fSC
fH
fV
4433619 15625
[Hz]
[Hz]
50
[Hz]
4406250 15625
SECAM 4250000 [Hz]
[Hz]
50
[Hz]
4.43/PAL
4.43
NTSC
4433619 15734
[Hz]
[Hz]
PIN
NO.
Pin 2
60
[Hz]
Conditions for locking the
system to this pin
Conditions for releasing the lock
(1) KILLER=ON
(1) KILLER=ON
(2) When NT/PAL identification
(2) 50/60 identification result
result changes from PAL to
= 50 Hz∗1
NTSC∗2
(1) KILLER=ON
(1) When any one of the
(2) 50/60 identification result
conditions to the left is not
= 50 Hz∗1
met
(3) SECAM ID=ON
(1) KILLER=OFF
PAL/M
3575611 15734
[Hz]
[Hz]
60
[Hz]
Pin 3
(1) KILLER=OFF
NTSC
3579545 15734
[Hz]
[Hz]
60
[Hz]
Pin 4
(1) KILLER=OFF
(1) KILLER=ON
(1) KILLER=ON
(2) When NT/PAL identification
result changes from PAL to
NTSC∗2
(3) When 50/60 identification
result changes from 60 to 50
(1) KILLER=ON
(2) When 50/60 identification
result changes from 60 to 50
∗1 When the 50/60 identification result changes from 60 Hz to 50 Hz, pin switching is performed until the
system is locked to Pin 2. However, when the 50/60 identification result changes from 50 Hz to 60 Hz,
identification is ignored.
2
∗ NTSC→PAL = Don’t care
—34—
CXA1871S
Definition of I2C Bus Registers
Slave addresses
88H: Slave Receiver
89H: Slave Transmitter
Register table
• All registers are set to 0 when the IC power is turned on.
• “X” indicates “don’t care”; “∗” indicates undefined.
Control registers
Sub
bit 7
bit 6
bit 5
bit 3
bit 4
bit 2
bit 1
bit 0
Address
XXX00000
PICTURE
XXX00001
HUE
∗
IN SW
XXX00010
COLOR
∗
SW GAIN
XXX00011
BRIGHT
∗
NR ON
TRAP ON
TOT ON
RGB LIM
XXX00100
SHARPNESS
SUB CONT
XXX00101
SUB HUE
SUB COLOR
XXX00110
SUB BRIGHT
XXX00111
PIX ON
R ON
XXX01000
BLACK
DY COL OFF
G ON
PRE OVER
B ON
AXIS
ABL
REF
BLUE
XXX01001
G DRIVE
DC TRAN
XXX01010
B DRIVE
GAMMA
XXX01011
G CUTOFF
XXX01100
H PHASE
XXX01101
V ON
VEX OFF
AFC
HV COMP
0
V SIZE
XXX01111
XXX10000
B CUTOFF
VSHIFT
XXX01110
SYSTEM1
SYSTEM2
DELAY
C MODE
S CORR
V LIN
XXX10001
OSD
SYSTEM3
SYSTEM5
SYSTEM4
4.43X’TAL
EXT COLOR
∗
∗
X’TAL PIN
∗
∗
Status register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit0
H LOCK
IK
KILLER
XRAY
NT/PAL
50/60
VCO-F
SECAM
—35—
CXA1871S
Description of I2C Bus Registers
Sub Address
00000
PICTURE (6)
Picture control
0 = Minimum
63 = Maximum
RGB LIM (2)
RGB output amplitude limiter voltage control
0 = Limited at 4.9 V (with a black level of 2 V)
1 = Limited at 5.1 V (with a black level of 2 V)
2 = Limited at 5.3 V (with a black level of 2 V)
3 = Limited at 5.5 V (with a black level of 2 V)
Sub Address
00001
HUE (6)
Hue control
0 = Skin color nearer to red
63 = Skin color nearer to green
IN SW (1)
0 = V1 IN
1 = V2 IN
Sub Address
00010
Input selector switch
COLOR (6)
Color control
0 = Minimum
63 = Maximum
SW GAIN (1)
SW output gain switching
0 = SW GAIN 0dB
1 = SW GAIN 6dB
Sub Address
00011
BRIGHT (6)
Brightness control
0 = Minimum
63 = Maximum
NR ON (1)
0 = OFF
1 = ON
Sub Address
00100
Y signal noise reduction ON/OFF
SHARPNESS (4) Sharpness control
0 = Minimum
15 = Maximum
SUB CONT (4)
Sub-contrast control
0 = Minimum
15 = Maximum
—36—
CXA1871S
Sub Address
00101
SUB HUE (4)
Hue center control
0 = Skin color nearer to red
15 = Skin color nearer to green
SUB COLOR (4) Color center control
0 = Minimum
15 = Maximum
Sub Address
00110
Sub Address
00111
SUB BRIGHT (6) Sub-bright control
0 = Minimum
63 = Maximum
TRAP ON(1)
0 = OFF
1 = ON
Chroma trap in Y system ON/OFF
TOT ON (1)
0 = OFF
1 = ON
Chroma TOT filter ON/OFF
PIX ON (1)
Picture mute ON/OFF
0 = Picture mute (Auto cut-off reference pulse also muted.)
1 = Picture mute released.
R ON (1)
R OUT ON/OFF
0 = R OUT OFF
1 = R OUT ON
G ON (1)
G OUT ON/OFF
0 = G OUT OFF
1 = G OUT ON
B ON (1)
B OUT ON/OFF
0 = B OUT OFF
1 = B OUT ON
PRE OVER (3)
Sets the sharpness preshoot and overshoot ratio.
0 = Pre Shoot 100 %, Over shoot 0 %
7 = Pre Shoot 25 %, Over shoot 75 %
AXIS(1)
0 = NTSC
1 = PAL
Detective axis switching
—37—
CXA1871S
Sub Address
01000
BLACK (1)
Blanks the Y IN/C IN signals and sets the R, G and B outputs to black
level.
0 = OFF
1 = ON
DY COL OFF (1) Dynamic color ON/OFF
0 = Dynamic color ON
1 = Dynamic color OFF
REF (2)
0 = B-18H
1 = B-20H
2 = B-22H
3 = B-24H
Switches the auto cut-off reference pulse position.
G-19H R-20H
G-21H R-22H
G-23H R-24H
G-25H R-26H
ABL (2)
ABL mode setting
0 = Picture ABL mode (including protective bright ABL)
1 = Combined picture ABL and bright ABL mode (bright ABL low)
2 = Combined picture ABL and bright ABL mode (bright ABL medium)
3 = Combined picture ABL and bright ABL mode (bright ABL high)
BLUE (1)
On screen display B IN ON/OFF. Setting to ON turns the entire screen
BLUE.
0 = OFF
1 = ON
OSD (1)
On screen display luminance setting
0 = Level small
1 = Level large
Sub Address
01001
G DRIVE (5)
G OUT drive control
0 = Minimum
31 = Maximum
DC TRAN (3)
DC transmission ratio setting
0 = Maximum (100 %)
7 = Minimum (75 %)
Sub Address
01010
B DRIVE (5)
B OUT drive control
0 = Minimum
31 = Maximum
GAMMA (3)
γcorrection value setting
0 = Correction OFF
7 = Maximum correction
—38—
CXA1871S
Sub Address
01011
G CUTOFF (4)
G OUT cut-off voltage control
0 = Minimum
15 = Maximum
B CUTOFF (4)
B OUT cut-off voltage control
0 = Minimum
15 = Maximum
Sub Address
01100
HPHASE (4)
Horizontal position control
0 = Screen shifted to right
15 = Screen shifted to left
V ON(1)
VD output ON/OFF
0 = VD output stopped. (Picture mute applied simultaneously. Auto cut-off reference
pulse also muted.)
1 = VD output
V EX OFF (1)
V sync expansion ON/OFF
0 = V sync expansion ON
1 = V sync expansion OFF
AFC (2)
AFC loop gain switching
0 = AFC loop gain large
1 = AFC loop gain medium
2 = AFC loop gain small
3 = AFC loop open, free running mode
Sub Address
01101
V SHIFT (5)
0 = Rise
31 = Lower
Vertical position control
HV COMP (3)
Vertical correction amount setting for high voltage fluctuations
0 = Correction amount minimum
7 = Correction amount maximum
Sub Address
01110
V SIZE (6)
Vertical amplitude control
0 = V size minimum
63 = V size maximum
C MODE (1)
V countdown system mode switching
0 = Non-standard signal mode, standard signal mode and no signal mode switched
automatically.
1 = Fixed to non-standard signal mode (wide V sync window mode).
—39—
CXA1871S
Sub Address
01111
V LIN (4)
Vertical linearity control
0 = Top of screen compressed, bottom of screen expanded.
15 = Top of screen expanded, bottom of screen compressed.
S CORR (4)
Vertical S correction control
0 = S correction amount minimum
15 = S correction amount maximum
—40—
CXA1871S
Sub Address
10000
SYSTEM1(1)
Selects the internal mode switching method.
0 = Automatic switching
1 = Fixed according to the bus data
(When ∗1 is selected, the SYSTEM3 to 5 and X’TAL PIN registers below must be
designated.)
SYSTEM2 (1)
Selects the V cycle when sync cannot be obtained if automatic switching
is selected by SYSTEM1.
0 = Outputs 60 Hz pulses when sync cannot be obtained.
1 = Outputs 50 Hz pulses when sync cannot be obtained.
SYSTEM3(1)
0 = 60 Hz
1 = 50 Hz
Selects the V cycle.
SYSTEM4 (2)
Inputs the input signal broadcast system.
0 = NTSC
1 = PAL
2 = SECAM
3 = SECAM
SYSTEM5 (1)
Selects the VCO frequency
0 = 3.58 MHz
1 = 4.43 MHz
X'TAL PIN (2)
0 = Pin 2
1 = Pin 3
2 = Pin 4
3 = Pin 4
Selects which of the crystals connected to the various pins to use.
4.43X'TAL (1)
Inputs whether the crystal connected to Pin 2 is 3.58 MHz or 4.43 MHz.
(When connecting a 4.43 MHz crystal, be sure to connect it to Pin 2.)
0 = 3.58 MHz
1 = 4.43 MHz
EXT COLOR (1) Forcibly switches the DET SW input to external input (R-Y IN, B-Y IN).
0 = Switched according to the NTSC/PAL identification results
1 = External input
Sub Address
10001
DELAY (2)
0 = 0 ns
1 = 40 ns
2 = 80 ns
3 = 120 ns
Allows the following delay times to be added to the Y signal.
—41—
CXA1871S
H LOCK (1)
Returns whether the H oscillator of the IC and the signal input to H SYNC are locked.
0 = Not locked
1 = Locked
IK (1)
Returns the AKB loop stable status by detecting the IK current.
0 = IK current stable for each of R, G and B
1 = IK current unstable
KILLER (1)
Returns the color killer ON/OFF status.
0 = OFF
1 = ON
XRAY(1)
Returns the X-ray protection status.
0 = OFF (X-ray protection is not functioning.)
1 = ON (X-ray protection is functioning.)
NT/PAL (1)
Identifies whether the input signal is NTSC or PAL and returns the results.
0 = NTSC
1 = PAL
50/60 (1)
Returns the 50/60 Hz identification results.
0 = 60 Hz
1 = 50 Hz
VCO-F (1)
Detects the burst frequency of the input signal and returns the results.
0 = 3.58 MHz
1 = 4.43 MHz
SECAM (1)
Identifies whether the input signal is SECAM or a different signal and returns the results.
—42—
CXA1871S
8.0
2.0
6.0
TOT SW = 1
0
–2.0
2.0
(dB)
Attenuation (dB)
4.0
0
–4.0
TOT SW = 0
–6.0
–2.0
–8.0
–4.0
SHARPNESS = F
SHARPNESS = 7
SHARPNESS = 0
–6.0
0
1
2
3
4
5
6
7
–10.0
8
Frequency
(MHz)
–800 –600 –400 –200 0
Fig 1. Sharpness characteristics
Output amplitude (black to white) (Vp-p)
Attenuation (dB)
–10
–20
TRAPSW = 0
TRAPSW = 1
–30
1
2
3
4
5
6
7
8
Output amplitude (Vp-p)
Fig 3. Trap F0 frequency characteristics
0.5
Input
frequency
(MHz)
1.0
GAMMA = 7
GAMMA = 3
GAMMA = 0
20
40
60
80
Fig 5. Gamma characteristics
100
∆fsc (kHz)
fsc = 3.58MHz
1.0
2.0
0
800
Fig 2. Chroma frequency characteristics
0
0
200 400 600
Input
amplitude
(IRE)
—43—
Input: IRE changed at Full Flat
Output: R OUT
DYCOL= AKB=OFF
GAMMA=DCTRAN=0
0
10
20
30
40
50
Fig 4. Auto pedestal characteristics
60
Input
amplitude
(IRE)
3.0
1.0
Gch = Bch = +1.5dB
2.5
IK level (Vp-p)
Output amplitude (black to white) (Vp-p)
CXA1871S
Gch = Bch = –4.5dB
2.0
Input: Y IN 1.4Vp-p (black to white)
Output: adjust to be 2.5Vp-p at R OUT
+3.0dB
Rch = 0.86 Vp-p
–8.3dB
Input: Y IN all black
0.5
AKB = ON
DYCOL = AKB = OFF
DCTRAN = 0
1.5
0
7
F
Output: IK (Pin 21)
17
1F
0
5
G, B
drive data
(HEX)
Fig 6. G, B drive characteristics
A
Fig 7. Cutoff control characteristics
F
G, B
cutoff data
(HEX)
VD-output amplitude (Vp-p)
1.4
1.35
Output: VD (Pin 24)
HV COMP = 7
1.3
Output amplitude (black to white) (Vp-p)
3.0
2.0
Input: YIN 1.4Vp-p (black to white)
Output: ROUT
1.0
SUBCONT = 7
DYCOL = AKB = OFF
DCTRAN = 0
Variable range 14.7dB
0
2
4
6
8
10
Fig 8. HV COMP characteristics
ABL IN
0
Applied
voltage (V)
—44—
8
10
18
20
28
30
Fig 9. Picture control data (HEX)
38
3F
1.6
2.0
ABL=3
Output black lebel (V)
Output amplitude (white to black) (Vp-p)
CXA1871S
ABL=0
1.0
1
2
3
4
5
6
7
8
ABL=3
1.2
9
0
ABL-FIL
applied voltage (V)
Fig 10. ABL characteristics (picture)
ABL=0
1.0
Input YIN 1.4Vp-p (black to white)
Output ROUT
0
1.4
3.0
1
2
3
4
5
6
Fig 11. ABL characteristics
7
8
9
ABL-FIL
(bright) applied voltage (V)
3.0
Input YIN 1.4Vp-p (black to white)
Output ROUT
Output amplitude (black to white) (Vp-p
Output level (Vp-p
OSD = 1
2.0
OSD = 0
1.0
Input OSDR
Output ROUT
2.0
PIC = 3F SUBCONT = 7
AKB = OFF
1.0
–5.7dB
100IRE = 2.5Vp-p
0
1
2
3
4
5
Fig 12. OSD RGB I/O characteristics
6
0
OSDR
applied voltage (V)
—45—
1.0
2.0
3.0
4.0
Fig 13. OSD-BLK voltage
5.0
OSD-BLK
applied voltage (V)
CXA1871S
Package Outline
Unit : mm
+ 0.1 5
0.0
0.25 –
48PIN SDIP (PLASTIC)
+ 0.4
43.2 – 0.1
25
15.24
+ 0.3
13.0 – 0.1
48
1
0° to 15°
24
0.5 ± 0.1
0.9 ± 0.15
Two kinds of package surface:
1.All mat surface type.
2.Center part is mirror surface.
+ 0.4
4.6 – 0.1
3.0 MIN
0.5 MIN
1.778
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
SONY CODE
SDIP-48P-02
LEAD TREATMENT
SOLDER/PALLADIUM
PLATING
EIAJ CODE
SDIP048-P-0600
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
5.1g
JEDEC CODE
—46—