19-3673; Rev 7; 7/10 Ultra-Small, Adjustable Sequencing/Supervisory Circuits The MAX6895–MAX6899 is a family of small, low-power, voltage-monitoring circuits with sequencing capability. These miniature devices offer tremendous flexibility with an adjustable threshold capable of monitoring down to 0.5V and an external capacitor-adjustable time delay. These devices are ideal for use in power-supply sequencing, reset sequencing, and power-switching applications. Multiple devices can be cascaded for complex sequencing applications. A high-impedance input with a 0.5V threshold allows an external resistive divider to set the monitored threshold. The output asserts (OUT = high or OUT = low) when the input voltage rises above the 0.5V threshold and the enable input is asserted (ENABLE = high or ENABLE = low). When the voltage at the input falls below 0.5V or when the enable input is deasserted (ENABLE = low or ENABLE = high), the output deasserts (OUT = low or OUT = high). All devices provide a capacitor-programmable delay time from when the input rises above 0.5V to when the output is asserted. The MAX689_A versions provide the same capacitor-adjustable delay from when enable is asserted to when the output asserts. The MAX689_P devices have a 1µs propagation delay from when enable is asserted to when the output asserts. The MAX6895A/P offers an active-high enable input and an active-high push-pull output. The MAX6896A/P offers an active-low enable input and an active-low push-pull output. The MAX6897A/P offers an activehigh enable input and an active-high open-drain output. Finally, the MAX6898A/P offers an active-low enable input and an active-low open-drain output. The MAX6899A/P offers an active-low enable with an activehigh push-pull output. All devices operate from a 1.5V to 5.5V supply voltage and are fully specified over the -40°C to +125°C operating temperature range. These devices are available in ultra-small 6-pin µDFN (1.0mm x 1.5mm) and thin SOT23 (1.60mm x 2.90mm) packages. Features o 1.8% Accurate Adjustable Threshold Over Temperature o Operate from VCC of 1.5V to 5.5V o Capacitor-Adjustable Delay o Active-High/-Low Enable Input Options o Active-High/-Low Output Options o Open-Drain (28V Tolerant)/Push-Pull Output Options o Low Supply Current (10µA, typ) o Fully Specified from -40°C to +125°C o Ultra-Small 6-Pin µDFN Package or Thin SOT23 Package Ordering Information PART PIN-PACKAGE MAX6895AALT+ 6 µDFN 6 Thin SOT23 MAX6895AAZT+ MAX6895PALT+T MAX6895PAZT+ MAX6896AALT+ MAX6896AAZT+ MAX6896PALT+T Computers/Servers Medical Equipment Critical µP Monitoring Intelligent Instruments Set-Top Boxes Portable Equipment Telecom Typical Operating Circuit and Selector Guide appear at end of data sheet. +AADK +AX 6 µDFN 6 Thin SOT23 +AADL 6 µDFN 6 Thin SOT23 +AADO +AY +AZ 6 µDFN 6 Thin SOT23 MAX6896PAZT+ +AADP Ordering Information continued at end of data sheet. Note: All devices are specified over the -40°C to +125°C operating temperature range. +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. Pin Configurations TOP VIEW VCC CDELAY OUT 6 5 4 Applications Automotive TOP MARK +AW MAX6895 MAX6897 MAX6899 1 2 3 ENABLE (ENABLE) GND IN µDFN ( ) FOR MAX6899 ONLY. Pin Configurations continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6895–MAX6899 General Description MAX6895–MAX6899 Ultra-Small, Adjustable Sequencing/Supervisory Circuits ABSOLUTE MAXIMUM RATINGS VCC, ENABLE, ENABLE, IN....................................-0.3V to +6V OUT, OUT (push-pull) ................................-0.3V to (VCC + 0.3V) OUT, OUT (open-drain)..........................................-0.3V to +30V CDELAY......................................................-0.3V to (VCC + 0.3V) Output Current (all pins) ...................................................±20mA Continuous Power Dissipation (TA = +70°C) 6-Pin µDFN (derate 2.1mW/°C above +70°C)...........167.7mW 6-Pin Thin SOT23 (derate 9.1mW/°C above +70°C) ...727.3mW Package Junction-to-Ambient Thermal Resistance (θJA) (Note 1) 6-Pin µDFN ..................................................................477°C/W 6-Pin Thin SOT23 ........................................................110°C/W Package Junction-to-Case Thermal Resistance (θJC) (Note 1) 6-Pin Thin SOT23 ..........................................................50°C/W Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four layer board. For detailed information on package thermal considerations refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 1.5V to 5.5V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SUPPLY Operating Voltage Range Undervoltage Lockout (Note 3) VCC Supply Current VCC UVLO VCC falling ICC VCC = 3.3V, no load VTH VIN rising, 1.5V < VCC < 5.5V 1.5 5.5 V 1.20 1.35 V 10 20 µA 0.5 0.509 V IN Threshold Voltage Hysteresis Input Current (Note 4) VHYST IIN 0.491 VIN falling 5 VIN = 0V or VCC -15 200 CDELAY rising 0.95 130 mV +15 nA 250 300 nA 1.00 1.05 V 500 Ω 0.4 V +100 nA CDELAY Delay Charge Current Delay Threshold CDELAY Pulldown Resistance ICD VTCD RCDELAY ENABLE/ENABLE Input Low Voltage Input High Voltage Input Leakage Current 2 VIL VIH ILEAK 1.4 ENABLE, ENABLE = VCC or GND -100 _______________________________________________________________________________________ V Ultra-Small, Adjustable Sequencing/Supervisory Circuits (VCC = 1.5V to 5.5V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUT/OUT Output Low Voltage (Open-Drain or Push-Pull) VOL VCC ≥ 1.2V, ISINK = 90µA, MAX6895/MAX6897/MAX6899 only 0.3 VCC ≥ 2.25V, ISINK = 0.5mA 0.3 VCC ≥ 4.5V, ISINK = 1mA Output High Voltage (Push-Pull) Output Open-Drain Leakage Current ILKG 0.4 VCC ≥ 2.25V, ISOURCE = 500µA 0.8 x VCC VCC ≥ 4.5V, ISOURCE = 800µA 0.8 x VCC VOH V V Output high impedance, VOUT = 28V 1 µA TIMING IN to OUT/OUT Propagation Delay tDELAY VIN rising tDL VIN falling CCDELAY = 0µF 40 µs CCDELAY = 0.047µF 190 ms 16 µs 2 ms Startup Delay (Note 5) ENABLE/ENABLE Minimum Input Pulse Width tPW 1 ENABLE/ENABLE Glitch Rejection ENABLE/ENABLE to OUT/OUT Delay tOFF tPROPP ENABLE/ENABLE to OUT/OUT Delay tPROPA From device enabled to device disabled From device disabled to device enabled (P version) From device disabled CCDELAY = 0µF to device enabled CCDELAY = 0.047µF (A version) µs 100 ns 150 ns 150 ns 20 µs 190 ms Note 2: All devices are production tested at TA = +25°C. Limits over temperature are guaranteed by design. Note 3: When VCC falls below the UVLO threshold, the outputs will deassert (OUT goes low, OUT goes high). When VCC falls below 1.2V, the out annot be determined. Note 4: Guaranteed by design. Note 5: During the initial power-up, VCC must exceed 1.5V for at least 2ms before the output is guaranteed to be in the correct state. _______________________________________________________________________________________ 3 MAX6895–MAX6899 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = 3.3V and TA = +25°C, unless otherwise noted.) 0.5008 0.5006 0.5004 14 VTH (V) 12 VCC = 3V 10 8 0.5002 0.5000 0.4998 VCC = 1.5V 6 0.4996 4 0.4994 2 0.4992 0.4990 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 VCC (V) TEMPERATURE (°C) TEMPERATURE (°C) OUT DELAY vs. CCDELAY OUTPUT LOW VOLTAGE vs. SINK CURRENT OUTPUT HIGH VOLTAGE vs. SOURCE CURRENT 4000 VCC = 1.5V 1.2 3500 VCC = 3V 2500 2000 VCC = 5V 4.5 4.0 3.5 VCC = 5V 0.9 VOH (V) VOL (V) 3000 5.0 MAX6895 toc05 1.5 MAX6895 toc04 4500 VCC = 3V 3.0 2.5 2.0 0.6 VCC = 1.5V 1.5 1500 1000 1.0 0.3 0.5 500 0 0 0 0 100 200 300 400 500 600 700 800 900 1000 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2 4 6 8 10 12 14 16 18 20 CCDELAY (nF) ISINK (mA) ISOURCE (mA) MAXIMUM TRANSIENT DURATION vs. INPUT OVERDRIVE ENABLE TURN-ON/OFF (MAX6896P) ENABLE TURN-ON/OFF DELAY (MAX6895A) MAX6895 toc08 MAX6895 toc09 MAX6895 toc07 600 500 400 VOUT 2V/div VOUT 2V/div VENABLE 2V/div VENABLE 2V/div 300 RESET OCCURS 200 100 0 0 10 20 30 40 50 60 70 80 90 100 100ns/div 40ms/div VOVERDRIVE (mV) 4 MAX6895 toc06 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 5000 tDELAY (ms) VCC = 5V MAX6895 toc03 18 16 0.5010 MAX6895 toc02 20 MAX6895 toc01 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 IN THRESHOLD vs. TEMPERATURE SUPPLY CURRENT vs. TEMPERATURE ICC (µA) ICC (µA) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAXIMUM TRANSIENT DURATION (µs) MAX6895–MAX6899 Ultra-Small, Adjustable Sequencing/Supervisory Circuits _______________________________________________________________________________________ Ultra-Small, Adjustable Sequencing/Supervisory Circuits PIN MAX6895/ MAX6897 µDFN 1 THIN SOT23 1 MAX6896/ MAX6898 µDFN — THIN SOT23 — MAX6899 µDFN — NAME — ENABLE Active-High Logic-Enable Input. Drive ENABLE low to immediately deassert the output to its false state (OUT = low or OUT = high) independent of VIN. With VIN above VTH, drive ENABLE high to assert the output to its true state (OUT = high or OUT = low) after the adjustable delay period (MAX689_A) or a 150ns propagation delay (MAX689_P). Active-Low Logic-Enable Input. Drive ENABLE high to immediately deassert the output to its false state (OUT = low or OUT = high) independent of VIN. With VIN above VTH, drive ENABLE low to assert the output to its true state (OUT = high or OUT = low) after the adjustable delay period (MAX689_A) or a 150ns propagation delay (MAX689_P). — — 1 1 1 1 ENABLE 2 2 2 2 2 2 GND 3 3 3 3 3 FUNCTION THIN SOT23 3 IN 4 4 — — 4 4 OUT — — 4 4 — — OUT 5 6 5 6 5 6 CDELAY 6 5 6 5 6 5 VCC Ground High-Impedance Monitor Input. Connect IN to an external resistive divider to set the desired monitored threshold. The output changes state when VIN rises above 0.5V and when VIN falls below 0.495V. Active-High Sequencer/Monitor Output, Push-Pull (MAX6895/MAX6899) or Open-Drain (MAX6897). OUT is asserted to its true state (OUT = high) when VIN is above VTH and the enable input is in its true state (ENABLE = high or ENABLE = low) for the capacitor-adjusted delay period. OUT is deasserted to its false state (OUT = low) immediately after VIN drops below VTH - 5mV or the enable input is in its false state (ENABLE = low or ENABLE = high). The open-drain version requires an external pullup resistor. Active-Low Sequencer/Monitor Output, Push-Pull (MAX6896) or Open-Drain (MAX6898). OUT is asserted to its true state (OUT = low) when VIN is above VTH and the enable input is in its true state (ENABLE = high or ENABLE = low) after the CDELAY adjusted timeout period. OUT is deasserted to its false state (OUT = high) immediately after VIN drops below VTH - 5mV or the enable input is in its false state (ENABLE = low or ENABLE = high). The opendrain version requires an external pullup resistor. Capacitor-Adjustable Delay. Connect an external capacitor (CCDELAY) from CDELAY to GND to set the IN to OUT (and ENABLE to OUT or ENABLE to OUT for A version devices) 6 delay period. tDELAY = (CCDELAY x 4.0 x 10 ) + 40µs. There is a fixed short delay (40µs, typ) for the output deasserting when VIN falls below VTH. Supply Voltage Input. Connect a 1.5V to 5.5V supply to VCC to power the device. For noisy systems, bypass with a 0.1µF ceramic capacitor to GND. _______________________________________________________________________________________ 5 MAX6895–MAX6899 Pin Description MAX6895–MAX6899 Ultra-Small, Adjustable Sequencing/Supervisory Circuits Table 1. MAX6895/MAX6897 Output ENABLE (MAX6895) ENABLE (MAX6899) VCC IN LOGIC 0.5V IN ENABLE VIN < VTH Low Low OUT VIN < VTH High Low VIN > VTH Low Low OUT = VCC (MAX6895) OUT VIN > VTH 250nA High OUT = high impedance (MAX6897) Table 2. MAX6896/MAX6898 Output 1.0V MAX6895 MAX6899 IN ENABLE OUT VIN < VTH Low OUT = high impedance (MAX6898) VIN < VTH High OUT = high impedance (MAX6898) VIN > VTH Low OUT = VCC (MAX6896) OUT = VCC (MAX6896) CDELAY GND Figure 1. MAX6895/MAX6899 Functional Diagram Low OUT = VCC (MAX6896) Detailed Description The MAX6895–MAX6899 is a family of ultra-small, lowpower, sequencing/supervisory circuits. These devices provide adjustable voltage monitoring for inputs down to 0.5V. They are ideal for use in power-supply sequencing, reset sequencing, and power-switching applications. Multiple devices can be cascaded for complex sequencing applications. Voltage monitoring is performed through a high-impedance input (IN) with an internally fixed 0.5V threshold. When the voltage at IN falls below 0.5V or when the enable input is deasserted (ENABLE = low or ENABLE = high), the output deasserts (OUT goes low or OUT goes high). When VIN rises above 0.5V and the enable input is asserted (ENABLE = high or ENABLE = low), the output asserts (OUT goes high or OUT goes low) after a capacitor-programmable time delay. With VIN above 0.5V, the enable input can be used to turn the output on or off. After the enable input is asserted, the output turns on with a capacitor-programmable delay period (A version) or with a 150ns propagation delay (P version). Tables 1, 2, and 3 detail the output state depending on the various input and enable conditions. 6 VIN > VTH High OUT = high impedance (MAX6898) Table 3. MAX6899 Output IN ENABLE OUT VIN < VTH Low Low VIN < VTH High Low VIN > VTH Low High VIN > VTH High Low Supply Input (VCC) The device operates with a VCC supply voltage from 1.5V to 5.5V. To maintain a 1.8% accurate threshold, VCC must be above 1.5V. When VCC falls below the UVLO threshold, the output deasserts. When VCC falls below 1.2V the output state cannot be determined. For noisy systems, connect a 0.1µF ceramic capacitor from VCC to GND as close to the device as possible. For the push-pull active-high output option, a 100kΩ external pulldown resistor to ground ensures the correct logic state for VCC down to 0. _______________________________________________________________________________________ Ultra-Small, Adjustable Sequencing/Supervisory Circuits Adjustable Delay (CDELAY) When VIN rises above VTH with ENABLE high (ENABLE low), the internal 250nA current source begins charging an external capacitor connected from CDELAY to GND. When the voltage at CDELAY reaches 1V, the output asserts (OUT goes high or OUT goes low). When the output asserts, CCDELAY is immediately discharged. Adjust the delay (tDELAY) from when VIN rises above VTH (with ENABLE high or ENABLE low) to OUT going high (OUT going low) according to the equation: tDELAY = CCDELAY x 4.0 x 106 + 40µs where CCDELAY is the external capacitor from CDELAY to GND. For adjustable delay devices (A version), when VIN > 0.5V and ENABLE goes from low to high (ENABLE goes from high to low) the output asserts after a tDELAY period. For nonadjustable delay devices (P version) there is a 1µs propagation delay from when the enable input is asserted to when the output asserts. Figures 2 through 5 show the timing diagrams for the adjustable and fixed delay versions, respectively. VCC VUVLO IN VTH VTH t < tPROPA ENABLE t > tPW OUT tPROPA tPROPA tDELAY tDL tOFF Figure 2. MAX6895A/MAX6897A Timing Diagram _______________________________________________________________________________________ 7 MAX6895–MAX6899 Monitor Input (IN) Connect the center point of a resistive divider to IN to monitor external voltages (see R1 and R2 of the Typical Operating Circuit). IN has a rising threshold of VTH = 0.5V and a falling threshold of 0.495V (5mV hysteresis). When VIN rises above V TH and ENABLE is high (or ENABLE is low) OUT goes high (OUT goes low) after the programmed tDELAY period. When VIN falls below 0.495V, OUT goes low (OUT goes high) after a 16µs delay. IN has a maximum input current of 15nA so large-value resistors are permitted without adding significant error to the resistive divider. MAX6895–MAX6899 Ultra-Small, Adjustable Sequencing/Supervisory Circuits VCC VUVLO IN t < tPROPA t > tPW ENABLE OUT tPROPA tPROPA tDELAY tDL tOFF Figure 3. MAX6896A/MAX6898A Timing Diagram VCC VUVLO IN t > tPW ENABLE OUT tDELAY tPROPP tDL tOFF tPROPP Figure 4. MAX6895P/MAX6897P Timing Diagram 8 _______________________________________________________________________________________ Ultra-Small, Adjustable Sequencing/Supervisory Circuits MAX6895–MAX6899 VCC VUVLO IN t > tPW ENABLE OUT tDELAY tPROPP tDL tOFF tPROPP Figure 5. MAX6896P/MAX6898P Timing Diagram VCC VUVLO IN VTH VTH t < tPROPA t > tPW ENABLE OUT tPROPA tPROPA tDELAY tDL tOFF Figure 6. MAX6899A Timing Diagram _______________________________________________________________________________________ 9 MAX6895–MAX6899 Ultra-Small, Adjustable Sequencing/Supervisory Circuits VCC VUVLO IN t > tPW ENABLE OUT tDELAY tPROPP tDL tOFF tPROPP Figure 7. MAX6899P Timing Diagram Enable Input (ENABLE or ENABLE) The MAX6895/MAX6897 offer an active-high enable input (ENABLE), while the MAX6896/MAX6898/MAX6899 offer an active-low enable input (ENABLE). With VIN above VTH, drive ENABLE high (ENABLE low) to force OUT high (OUT low) after the adjustable delay time (A versions). For P version devices, when VIN > 0.5V and enable is asserted, the output asserts after typically 150ns. The enable input has logic-high and logic-low voltage thresholds of 1.4V and 0.4V, respectively. For both versions, when VIN > 0.5V, drive ENABLE low (ENABLE high) to force OUT low (OUT high) within 150ns typ. Output (OUT or OUT) The MAX6895/MAX6899 offer an active-high, push-pull output (OUT), and the MAX6896 offers an active-low push-pull output (OUT). The MAX6897 offers an activehigh open-drain output (OUT), and the MAX6898 offers an active-low open-drain output (OUT). Applications Information Input Threshold The MAX6895–MAX6899 monitor the voltage on IN with an external resistive divider (see R1 and R2 in the Typical Operating Circuit). Connect R1 and R2 as close to IN as possible. R1 and R2 can have very high values to minimize current consumption due to low IN leakage currents (±15nA max). Set R2 to some conveniently high value (1MΩ, for example) and calculate R1 based on the desired monitored voltage using the following formula: ⎡V ⎤ R1 = R2 × ⎢ MONITOR − 1⎥ V IN ⎣ ⎦ where VMONITOR is the desired monitored voltage and VIN is the detector input threshold (0.5V). Push-pull output devices are referenced to VCC. Opendrain outputs can be pulled up to 28V. 10 ______________________________________________________________________________________ Ultra-Small, Adjustable Sequencing/Supervisory Circuits The exact value of the pullup resistors for the opendrain outputs is not critical, but some consideration should be made to ensure the proper logic levels when the device is sinking current. For example, if VCC = 2.25V and the pullup voltage is 28V, you would try to keep the sink current less than 0.5mA as shown in the Electrical Characteristics table. As a result, the pullup resistor should be greater than 56kΩ. For a 12V pullup, the resistor should be larger than 24kΩ. It should be noted that the ability to sink current is dependent on the VCC supply voltage. Typical Application Circuits Figures 8, 9, 10 show typical applications for the MAX6895–MAX6899. Figure 8 shows the MAX6895 used with a p-channel MOSFET in an overvoltage protection circuit. Figure 9 shows the MAX6895 in a lowvoltage sequencing application using an n-channel MOSFET. Figure 10 shows the MAX6895 used in a multiple-output sequencing application. Using an n-Channel Device for Sequencing In higher power applications, using an n-channel device reduces the loss across the MOSFETs as it offers a lower drain-to-source on-resistance. However, an nchannel MOSFET requires a sufficient VGS voltage to fully enhance it for a low RDS_ON. The application in Figure 9 shows the MAX6895 in a switch sequencing application using an n-channel MOSFET. Similarly, if a higher voltage is present in the system, the open-drain version can be used in the same manner. 5V BUS 1.2V INPUT 3.3V ALWAYS ON N P 0 TO 28V 1.2V OUTPUT MONITORED 3.3V ENABLE VCC ENABLE RPULLUP VCC R1 R1 OUT OUT MAX6895 MAX6897 IN IN CDELAY CDELAY R2 R2 GND Figure 8. Overvoltage Protection GND CCDELAY Figure 9. Low-Voltage Sequencing Using an n-Channel MOSFET ______________________________________________________________________________________ 11 MAX6895–MAX6899 Pullup Resistor Values (MAX6897/MAX6898) MAX6895–MAX6899 Ultra-Small, Adjustable Sequencing/Supervisory Circuits 2.5V 3.3V 5V BUS DC-DC 1.2V 1.8V DC-DC DC-DC DC-DC EN EN EN EN SYSTEM ENABLE ENABLE IN MAX6895 VCC ENABLE IN OUT GND VCC MAX6895 ENABLE IN OUT GND CCDELAY VCC MAX6895 IN OUT GND CCDELAY VCC ENABLE MAX6895 GND CCDELAY Figure 10. Multiple-Output Sequencing 12 OUT ______________________________________________________________________________________ CCDELAY Ultra-Small, Adjustable Sequencing/Supervisory Circuits PART MAX6895AALT+T ENABLE INPUT Active-High OUTPUT Active-High, Push-Pull INPUT (IN) DELAY Capacitor Adjustable ENABLE DELAY Capacitor Adjustable MAX6895AAZT+T Active-High Active-High, Push-Pull Capacitor Adjustable Capacitor Adjustable MAX6895PALT+T Active-High Active-High, Push-Pull Capacitor Adjustable 150ns Delay MAX6895PAZT+T Active-High Active-High, Push-Pull Capacitor Adjustable 150ns Delay MAX6896AALT+T Active-Low Active-Low, Push-Pull Capacitor Adjustable Capacitor Adjustable MAX6896AAZT+T Active-Low Active-Low, Push-Pull Capacitor Adjustable Capacitor Adjustable MAX6896PALT+T Active-Low Active-Low, Push-Pull Capacitor Adjustable 150ns Delay MAX6896PAZT+T Active-Low Active-Low, Push-Pull Capacitor Adjustable 150ns Delay MAX6897AALT+T Active-High Active-High, Open-Drain Capacitor Adjustable Capacitor Adjustable MAX6897AAZT+T Active-High Active-High, Open-Drain Capacitor Adjustable Capacitor Adjustable MAX6897PALT+T Active-High Active-High, Open-Drain Capacitor Adjustable 150ns Delay MAX6897PAZT+T Active-High Active-High, Open-Drain Capacitor Adjustable 150ns Delay MAX6898AALT+T Active-Low Active-Low, Open-Drain Capacitor Adjustable Capacitor Adjustable MAX6898AAZT+T Active-Low Active-Low, Open-Drain Capacitor Adjustable Capacitor Adjustable MAX6898PALT+T Active-Low Active-Low, Open-Drain Capacitor Adjustable 150ns Delay MAX6898PAZT+T Active-Low Active-Low, Open-Drain Capacitor Adjustable 150ns Delay MAX6899AALT+T Active-Low Active-High, Push-Pull Capacitor Adjustable Capacitor Adjustable MAX6899AAZT+T Active-Low Active-High, Push-Pull Capacitor Adjustable Capacitor Adjustable MAX6899PALT+T Active-Low Active-High, Push-Pull Capacitor Adjustable 150ns Delay MAX6899PAZT+T Active-Low Active-High, Push-Pull Capacitor Adjustable 150ns Delay Typical Operating Circuit Ordering Information (continued) PART MAX6897AALT+ MAX6897AAZT+ MAX6897PALT+T MAX6897PAZT+ MAX6898AALT+ MAX6898AAZT+ MAX6898PALT+T MAX6898PAZT+ MAX6899AALT+ MAX6899AAZT+ MAX6899PALT+T MAX6899PAZT+ PIN-PACKAGE 6 µDFN 6 Thin SOT23 6 µDFN 6 Thin SOT23 6 µDFN 6 Thin SOT23 TOP MARK +BA 1.5V TO 5.5V +AADQ 0.1µF +BB +AADR ENABLE VCC R1 OUT +BD +AADS MAX6895 +BC 6 µDFN 6 Thin SOT23 +AADT 6 µDFN 6 Thin SOT23 +AADM 6 µDFN 6 Thin SOT23 +AADN IN +LO +LP CDELAY R2 GND CCDELAY Note: All devices are specified over the -40°C to +125°C operating temperature range. +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. ______________________________________________________________________________________ 13 MAX6895–MAX6899 Selector Guide Ultra-Small, Adjustable Sequencing/Supervisory Circuits MAX6895–MAX6899 Pin Configurations (continued) TOP VIEW TOP VIEW VCC CDELAY OUT 6 5 4 + MAX6896 MAX6898 1 2 3 ENABLE GND IN ENABLE 1 GND 2 IN 3 6 CDELAY MAX6895 MAX6897 5 VCC 4 OUT THIN SOT23 µDFN TOP VIEW ENABLE 1 GND 2 IN 3 + 6 CDELAY MAX6896 MAX6898 MAX6899 5 VCC 4 OUT (OUT) THIN SOT23 ( ) FOR MAX6899 ONLY. Package Information Chip Information PROCESS: BiCMOS 14 For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 6 µDFN L611+1 21-0147 90-0080 6 Thin SOT23 Z6+1 21-0114 90-0242 ______________________________________________________________________________________ Ultra-Small, Adjustable Sequencing/Supervisory Circuits REVISION NUMBER REVISION DATE 5 10/07 — 6 11/09 Corrected Absolute Maximum Ratings and made style corrections to Electrical Characteristics and TOC8 and TOC9 2–5 7 7/10 Revised Figures 3, 4, and 6. 7–9 DESCRIPTION PAGES CHANGED 1, 13, 18 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. MAX6895–MAX6899 Revision History