74F148 8-Line to 3-Line Priority Encoder April 1988 Revised September 2000 74F148 8-Line to 3-Line Priority Encoder General Description Features The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits. ■ Encodes eight data lines in priority ■ Provides 3-bit binary priority code ■ Input enable capability ■ Signals when data is present on any input ■ Cascadable for priority encoding of n bits Ordering Code: Order Number Package Number Package Description 74F148SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F148SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F148PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs Outputs EI I0 I1 I2 I3 I4 I5 I6 H X X X X X X X I7 GS A0 A1 A2 EO X H H H H L H H H H H H H H H H H H L L X X X X X X X L L L L L H L X X X X X X L H L H L L H L X X X X X L H H L L H L H L X X X X L H H H L H H L H L X X X L H H H H L L L H H L X X L H H H H H L H L H H L X L H H H H H H L L H H H L L H H H H H H H L H H H H H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 2000 Fairchild Semiconductor Corporation DS009480 www.fairchildsemi.com 74F148 Unit Loading/Fan Out Pin Names U.L. Input IIH/IIL Description HIGH/LOW Output IOH/IOL I0 Priority Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA I1–I7 Priority Inputs (Active LOW) 1.0/2.0 20 µA/−1.2 mA EI Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA EO Enable Output (Active LOW) 50/33.3 −1 mA/20 mA GS Group Signal Output (Active LOW) 50/33.3 −1 mA/20 mA A0–A2 Address Outputs (Active LOW) 50/33.3 −1 mA/20 mA Functional Description The F148 8-input priority encoder accepts data from eight active LOW inputs (I0–I7) and provides a binary representation on the three active LOW outputs. A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line 7 having the highest priority. A HIGH on the Enable Input (EI) will force all outputs to the inactive (HIGH) state and allow new data to settle without producing erroneous information at the out- puts.A Group Signal output (GS) and Enable Output (EO) are provided along with the three priority data outputs (A2, A1, A0). GS is active LOW when any input is LOW: this indicates when any input is active. EO is active LOW when all inputs are HIGH. Using the Enable Output along with the Enable Input allows cascading for priority encoding on any number of input signals. Both EO and GS are in the inactive HIGH state when the Enable Input is HIGH. Logic Diagram Application 16-Input Priority Encoder Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) DC Electrical Characteristics Symbol Parameter Min Typ Max VCC VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min V Min 0.5 V Min IOL = 20 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 Input LOW −0.6 mA Current −1.2 mA Output HIGH Voltage VOL Output LOW 10% VCC 2.5 5% VCC 2.7 V Conditions Input HIGH Voltage VOH 2.0 Units VIH 10% VCC Voltage IIH Input HIGH Current IBVI Input HIGH Current Breakdown Test ICEX Output High Leakage Current VID Input Leakage Test IOD 4.75 Output Leakage Circuit Current IIL −60 Recognized as a HIGH Signal Recognized as a LOW Signal Max IIN = −18 mA IOH = −1 mA IOH = −1 mA IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (I0, EI) VIN = 0.5V (I1–I7) IOS Output Short-Circuit Current −150 mA Max VOUT = 0V ICCH Power Supply Current 35 mA Max VO = HIGH ICCL Power Supply Current 35 mA Max VO = LOW 3 www.fairchildsemi.com 74F148 Absolute Maximum Ratings(Note 1) 74F148 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 3.0 7.0 9.0 3.0 10.0 tPHL In to An 3.0 8.0 10.5 3.0 12.0 tPLH Propagation Delay 2.5 5.0 6.5 2.5 7.5 tPHL In to EO 2.5 5.5 7.5 2.5 8.5 tPLH Propagation Delay 2.5 7.0 9.0 2.5 10.0 tPHL In to GS 2.5 6.0 8.0 2.5 9.0 tPLH Propagation Delay 2.5 6.5 8.5 2.5 9.5 tPHL EI to An 2.5 6.0 8.0 2.5 9.0 tPLH Propagation Delay 2.5 5.0 7.0 2.5 8.0 tPHL EI to GS 2.5 6.0 7.5 2.5 8.5 tPLH Propagation Delay 2.5 5.5 7.0 2.5 8.0 tPHL EI to EO 3.0 8.0 10.5 3.0 12.0 www.fairchildsemi.com 4 Units ns ns ns ns ns ns 74F148 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com 74F148 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 6 74F148 8-Line to 3-Line Priority Encoder Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com