APPLICATION BULLETIN ® Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-111 • Telex: 066-6491 • FAX (520) 889-1510 • Immediate Product Info: (800) 548-6132 MAKE A PRECISION –10V REFERENCE By R. Mark Stitt (520) 746-7445 1 The need for a precision –10.0V reference arises often. For example, the best way to get a 0V to +10V output from a CMOS MDAC is to use a –10V reference (see Figures 4-6). ADI/PMI has the REF-08 –10V reference, but it has limited performance. Although Burr-Brown offers no –10V reference, the REF102 precision +10.0V reference can be accurately converted to a precision –10.0V reference. The circuit is simple and requires no precision components. The 2.5ppm/ °C temperature drift of the Burr-Brown REF102 is twenty times better than the 50ppm/°C best grade of the PMI REF08. (Even our lowest grade is five times better.) The simplest approach for converting a REF102 into a –10.0V reference is shown in Figure 1. The only extra component is a 1kΩ resistor connected to –VS. This circuit is useful, but has limitations. Maximum expected load current plus maximum reference quiescent current must be supplied by the resistor at minimum –VS. Changes in current resulting from load and power supply variations must be driven by the reference. The excess current through the reference reduces its accuracy due to drift from self-heating and thermal feedback. Changes in reference output current due to power-supply variations translate into line regulation error. Voltage reference load regulation is not usually as good as line regulation. Finally, the output impedance due to the resistor pull-down causes settling problems with dynamic loads. 2 +VS (1.4V to 26V) +VS (1.4V to 26V) 2 V+ REF102 R1 2kΩ 3 6 10V Out C1 1000pF 2 Gnd 4 4 –10V Out OPA27 5 FIGURE 2. Improved –10V Reference. To understand how the circuit works, notice that the reference is in the feedback loop of the op amp. The op amp output forces the Gnd connection of the reference to exactly –10.0V so that the voltage at the op amp inverting input is the same as at its noninverting input (ground). Since no current flows into the op amp input, the reference output current remains at zero, eliminating voltage reference thermal feedback or load regulation errors. The R1, C1 network assures loop stability and provides noise filtering. Reference noise is filtered by a single pole of f–3dB = 1/(2 • π • R1 • C1). Bias current flowing through R1 can produce DC errors and noise. If a lower filter pole is needed, keep R1 = 2kΩ and increase C1 to preserve accuracy. 6 7 8 9 V+ REF102 6 10V Out V+ REF102 6 10V Out R1 2kΩ Gnd 4 RS 1kΩ C1 0.05µF –10V Out IL –15V 5V 1.4 < – I < 5.4mA RS L OPA27 The circuit shown in Figure 2 solves these problems. As in Figure 1, no precision resistors are needed. The error contributed by the op amp is negligible (the OPA27 0.6µV/°C VOS/dT adds only 0.06 ppm/°C drift to the –10V reference). As a bonus, the circuit incorporates noise filtering. 1990 Burr-Brown Corporation 5 20kΩ R2 50Ω FIGURE 1. Simple –10V Reference. © +VS (1.4V to 26V) 2 11 12 Trim Gnd 4 C2 1.0µF Tantalum –10V Out FIGURE 3. Improved –10V Reference with Improved Filter, with VOUT Trim. AB-004B 10 Printed in U.S.A. June, 1995 13 14 15 Figure 4 shows the preferred way to connect a CMOS MDAC for a 0 to +10V output. This approach is less expensive and provides better accuracy than the other approaches shown below. +VS V+ –10V Reference –10V DAC7541A 10kΩ RFB 0–1mA The circuit shown in Figure 5 is commonly used to get a 0 to +10V output with a CMOS MDAC. The disadvantage with this circuit is that it requires an extra op amp and pair of precision resistors for each DAC. Also, settling time increases because two amplifiers must settle in the signal path. For good settling time, both amplifiers must be fast settling. Then settling time increases by the squareroot-of-the-sum-of-the-squares of settling time for each amplifier. VREF Out 1 Com 0 to +10V Out Bit 1–Bit 12 FIGURE 4. Precision 0V to +10V Output DAC. The circuit shown in Figure 6 can also be used to get a 0 to +10V output from a CMOS MDAC. The problem with this circuit is nonlinearity due to code-dependent voltage across the switches within the DAC. Using a 2.5V reference and gain at the output, as shown, mitigates this error, but you still need a pair of precision resistors for each DAC. The appropriate use for this circuit is in +5V single-supply applications. With a 2.5V reference and a unity-gain, singlesupply buffer, the output will be 0 to +2.5V. Figure 3 shows an improved filter and a provision for output voltage adjustment. The 20kΩ pot can be used for fine adjustments or to increase the output to –10.24V for 10mV per 10-bit LSB—ideal in many binary DAC applications. The improved filter: 1. Provides low output impedance at high frequency for driving dynamic loads, 2. Improves noise filtering, and 3. Drives large capacitive loads—see AB-003. +VS DAC7541A 10kΩ V+ +10V Reference +10V RFB 0–1mA 10kΩ 0.01% VREF 10kΩ 0.01% Out 1 Com 0 to +10V Out Bit 1–Bit 12 FIGURE 5. Another 0V to +10V Output DAC. +VS RFB V+ +2.5V Reference +2.5V Com DAC7541A VREF Out 1 0 to +10V Out Bit 1–Bit 12 10kΩ 0.01% 30kΩ 0.01% FIGURE 6. Single Supply 0V to +10V. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. 2