ETC PT8A995

Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Features
General Description:
• PT8A995 works as encoder and PT8A996 work
The PT8A995 and PT8A996 provide a simple and
as decoders
economic solution for basic Digital Proportional R/C
• Supply voltage: 3.0V to 6.4V
car toys. The chipset uses CMOS LSI Analog and
• Internal auto-shutdown function
Mixed Signal technology. They provide high quality
• Internal over-load protection to meet HD271 safety
encoder/decoder circuit.
specification (996)
PT8A995 severs as an encoder. When it is applied in
• Integrated RF circuit (995)
R/C car, the built-in AD converter samples the external
• Two analog channels, one for tachospeed and the
tachospeed and steering inputs and converts them into
other for steering
5-bit digital signals. The internal coder assembles these
• 32 steps for each of two analog channels
signals into a multi-frame. It contains header, data and
• Fine tuning selection for two analog channels
CRC value. To obtain accurate timing easily, Manches-
• Few external components needed
ter encoding is employed. Some digital modulation
• Closed loop adjustment for servo motor (996)
scheme can be used, e.g., general ASK, OOK, FSK and
• Built-in voltage regulator (996)
QPSK. OOK is easy to implement and low cost.
• Package: 16-pin DIP (995P), 20-pin DIP (996P)
PT8A996 works as a decoder. Demodulated RF sig-
and 20-pin SOIC (996S)
nal will be amplified and filtered in 996 to get
baseband signal. DPLL is adopted to generate sam-
Applications
pling clock. The decoder logic can extract F/B, L/R
• Remote Controller
and functional bits from received signal. The outputs
• Toys
are pulse-width-modulated. When motors are blocked,
• Remote Measurement
the built-in over-load protection mechanism will work
to meet Toy Safety Requirement.
Figure 1: Application Diagram
Transmitter
PT8A995
PT0072(05/02)
Receiver
RF Transmitter
RF Receiver
1
PT8A996
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Block Diagram
Figure 2. Block Diagram of PT8A995
OSCI
OSCO
Timing
Generator
Oscillator
F1
F/B
L/R
Offset1
Offset2
PC
Encoder
&
Logic
Control
IRout/SC
F2
AD
SC
CA1
CA2
RFout
RF
Osc
Figure 3. Block Diagram of PT8A996
SI
OSCI
Timing
Generator
OSC
OSCO
VT1
VT2
V CC
PT0072(05/02)
Right
Left
Forward
PWM
&
Logic
Backward
F1
F2
FC
Current
Limiter
REF
VI1
Serial
To
Parallel
CRC
Check
DPLL
Filter
Vref
SRV
VO1
VI2
2
AD
VO2
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Pin Configuration
PT8A996P
20-Pin DIP
20-Pin SOIC
PT8A995P
16-Pin DIP
1
2
3
4
5
6
7
8
F2
F1
IRout
GND
RFout
CA1
CA2
SC
16
15
14
13
12
11
10
9
Forward
Backward
Right
Left
GND
VT2
VT1
VO2
VI2
VO1
PC
L/R
F/B
OSCI
OSCO
VCC
Offset2
Offset1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
F2
F1
PC
SRV
OSCI
OSCO
V CC
SI
FC
VI1
Top View
Pin Description
Table 1. Pin Description of PT8A995
P in No.
P in n a me
1
F2
F2 function control pin
2
F1
F1 function control pin
3
IRout
Output code with 38KHz carries
4
GND
Ground
5
RFout
Output code with 27M or 49MHz carries
6
CA1
27M or 49MHz crystal oscillator input
7
CA2
27M or 49MHz crystal oscillator output
8
SC
9
Offset1
Used for offset adjustment of speed input
10
Offset2
Used for offset adjustment of steering input
11
VCC
12
OSCO
Crystal oscillator output
13
OSCI
Crystal oscillator input
14
F/B
Input for forward & backward speed
15
L/R
Input for steering angle left & right
16
PC
Power control output
PT0072(05/02)
Descr ip t ion
Output code
power
3
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Table 2. Pin Description of PT8A996
P in No.
P in Na me
1
Forward
2
Backward
3
Right
Right output
4
Left
Left output
5
GND
GND
6
VT2
F/B motor current limit protection input
7
VT1
L/R motor current limit protection input
8
VO2
The second stage amplify output
9
VI2
The second stage amplify input
10
VO1
The first stage amplify output
11
VI1
The first stage amplify input
12
FC
Futaba connection output
13
SI
Encode signal input
14
VCC
15
OSCO
Crystal oscillator output
16
OSCI
Crystal oscillator input
17
SRV
Servo motor feedback input
18
PC
Auto power off control
19
F1
Function1 control
20
F2
Function2 control
PT0072(05/02)
Descr ip t ion
Forward output
Backward output
Power
4
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Functional Description
Encoder
Functional Description of PT8A995
Oscillator Circuit
Each time the transmitter is active, the chip will assemble
SPEED value and STEERING value into a multi-frame as
shown in Figure 6. The multi-frame has two sub-frames, denoted as odd frame and even frame.
A fundamental crystal or ceramic resonator can be used as oscillator resonator. The central frequency is 455kHz. The frequency tolerance can be up to 1.5%.
After data are assembled, the bit stream is Manchester encoded.
It is illustrated in Figure 7. A rising edge denotes 1, and a
falling edge denotes 0.
Internal A/D Converter
The maximum encoding delay can be calculated by using following formula
Tmax = (48+5) * Tclock = 53/1.18kHz = 45 (ms)
5-bit A/D converter is built-in. It has four input channels. To
get stable analog input, the level should be within 3/8 VCC to
5/8 VCC. The four channels are switched in turn. Refer to Fig.
3. When a 455kHz quartz is used, CLK is 1.18kHz. F/B and L/
R are converted into 5-bit. OffsetX is converted into 3-bit. No
external load capacitor is needed.
RF Circuit
RF circuit is integrated for easy application. A fundamental
crystal or third-tune crystal is required. The RF frequency can
be 27MHz or 49MHz. On-Off-Keying (OOK) scheme is
adopted for low cost and easy implementation.
The analog input voltage and the corresponding digitalized
values are shown in Figure 5.
Auto-Shutdown Function
When the chipset is applied in R/C car, there are gross tuning
joysticks and fine tuning joysticks for SPEED and STEERING respectively. We denote them SPEEDO, speedo,
STEERINGO, steeringo, corresponding to F/B, Offset1, L/R,
Offset2 respectively. Offset1 and offset2 complement F/B and
L/R offset respectively.
Auto-shutdown function is adopted to lower power consumption. Once input signal (joysticks, or F1 and F2) are silent for
at least 5 minutes, the chip will enter Shutdown Operation mode,
during which most circuits, including RF, are powered down.
The chip will exit Shutdown Operation mode and enter Normal Operation mode when F1 and F2 are active again. For
power dissipation, refer to Table 3.
If current conversion values are Vsp, Vspo, Vst, Vsto, corresponding to SPEEDO, speedo, STEERINGO, steeringo respectively, we can describe the SPEED value to be transmitted
as
Vspeed = Vsp + Vspo.
The STEERING value is
Vsteering = Vst + Vsto.
When the chip enters Shutdown Operation mode, PC will output LOW level, which will switch off external circuit. If it operates normally, PC maintains HIGH level. If PC is forced to
HIGH level, the chip will not be auto-shut down forever.
Figure 4. Internal A/D Converter of PT8A995
F/B
SA
L/R
MUX
A/D
Offset1
Offset2
CLK
PT0072(05/02)
5
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Figure 5. Analog Voltage and Digitalized Values
QAZ
11111
10000
01111
00000
47/128V
VDD
1/2
V
DD
1/2V
CC
CC
81/128V
VDD
CC
SA
Figure 6. Multi-Frame Structure
Odd Frame
0 1 1 1 1 1 1 0 1 1 1 FB4 FB3
0
4
FB2-FB0 F1
F3
0
Even Frame
0 1 1 1 1 1 1 0 0 0 0 RL4 RL3 0
CRC
4
RL2-RL0
F1
F3
0
FB4-FB0: F/B values
RL4-RL0: R/L values
F4-F1: function value
F4/F3 are reserved
CRC
Figure 7. Manchester Modulation scheme
1
0
1
0
1
1
0
0
0
Manchester
Table 3
Mod e
Ma ximu m Su p p ly Dr a in C u r r en t (I CC
)
CC
Power Dissip a t ion (P d)
Normal Operation
20 mA
100 mW
Shutdown Operation
20 uA
100 uW
PT0072(05/02)
6
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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justed by input on transmitter side. The average level is proportional to analog input.
Functional Description of PT8A996
When a baseband signal is applied to VI1 pin, it will be amplified and then filtered by the FILTER and sent to digital phaselock-loop (DPLL).
The pulse frequency is 37.8KHz. Duty ratio ranges from 1/64
to 1. The F/B controller works as a proportional adjuster with
32 steps. The L/R controller is made up of position control
loop and speed control loop to ensure high accuracy and speed.
Once the loop is locked into input signal, HEADER in multiframe structure is detected. Data in bit stream are converted
into parallel output by Serial-to-Parallel module. If no CRC
error is found, the data are valid. At final step, FB and RL will
be pulse-width-modulated.
Internal A/D Converter
5-bit A/D converter is built-in. It has two input channels. To
get stable analog input, the level should be within 3/8 VCC to
5/8 VCC. The scale is linear. A time-division multiplexing
method is used as a simple way to switch between two channels in PT8A996. When a 455kHz quartz is used, CLK is
1.18KHz. SRV is converted into 5-bit. Offset is converted into
3-bit to complement L/R offset (Offset2 on transmitter).
An internal A/D converter is required to make servo motor work
well. The inputs are SRV and Offset.
When an R/C car is out of control, over-load protection is provided by Current Limiter. If the R/C car is blocked by some
barriers, Forward and Backward are disabled. If servo motor
encounters troublesome, Left and Right are disabled.
If current conversion values are Vsv and Vfd with regarding to
SRV and Offset respectively, we can describe the servo FEEDBACK value to be transmitted as
Vsrv = Vsv + Vfd.
Timing Generator
Timing Generator produces frequency signals of 151kHz and
37.8kHzfrom a 455kHz master clock.
Servo Feedback System
Internal Amplifier
For more accurate motor position, servo feedback is necessary.
The baseband signal is amplified in two stages. An active bandpass filter is applied externally. It can be achieved by RC filter.
Overload Protection Function
Over-load protection function is shown in Figure 9. Once VT
keeps effective more than Te and ineffective less than Tm, the
chip enters over-load protection mode. It will disable all output. The device will exit over-load protection mode when VT
is not effective more than 200ms.
DPLL
A digital PLL is built in PT8A996 to ensures 1.5 percent carrier frequency tolerance. 151kHz is used as local high frequency.
Futaba compatible connection
PWM Modulation Scheme
The PT8A996 has a FC pin, whose output signal can directly
control Futaba’s servo-motor or other compatible servo-motor.
The signal is illustrated in Figure 10.
The outputs of PT8A996 are pulse-width modulated for proportional output. The duty-ratio of output is variable and adFigure 9. Over-Load Protection Function
VT1 or VT2
0.4V
Tm < 200ms
200ms
VT
VT is effective
PT0072(05/02)
Te >= 3s
7
Enters over-load
protection state
VT is not effective
and exists over-load
protection
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Figure 10. Output from FC Pin
t1
t2
t1 =0.85ms~1.66ms (Pulsewidth Adjustment Step = 27us)
t2 =13.5ms
Figure 11. Application of PT8A995 with Internal Modulation
Vcc
SW
RV1
5.1k
RV2
5.1k
C11
0.1u
D1
C14
LED
IN4148
BAT
4-6v
R9
1K
1
F2
2
F1
3
4
5
C9
20p
6
X1
27M
7
CS
8
PC
F1
L/R
IRout
F/B
GND
OSCI
RFout OSCO
CA1
Vcc
C A 2 Offset2
SC
Offset1
16 Vcc
15
14
12
11
CI
X2
13
RO
455K
20k
CO
33p
Vcc
33p
10
9
PT8A995
0.1u
LOSC
F2
ANT
C10
20p
3u
L02
C01
240
PT0072(05/02)
0.27
C02
150p
C03
15p
C04
39p
8
L04
L03
0.22u
L01
0.36u
C05
120p
2.4u
C06
47p
C07
27p
Ver:1
PT0072(05/02)
9
LOSC
3uH
C9
20p
F1
F2
C10
20p
X1
27M
CS
0.1u
8
7
6
5
4
3
2
1
PC
Vcc
RF
330
Vcc
RE2
51
RE1
51
Q2
9018
Offset1
PT8A995
SC
C A 2 Offset2
CA1
RFout OSCO
F/B
OSCI
GND
L/R
IRout
F1
F2
9
10
11
12
13
14
15
430p
CE
1K
RB2
RB1
1K
20k
RO
RV2
5k
CF
0.15u
Vcc
16 Vcc
5k
RV1
Figure 12. Application of PT8A995 with External Modulation
Q1
L2
1.5mH
R2
10
VRF
C11
0.1u
Vcc
3
V1
2
C3
1n
C4
15n
CO
33p
X2
455K
CP
4.7u
Vout
CI
33p
Vin
C2
150p
GND
78L05
68p
C1
1
R9
3k
L1B
LED
C14
VRF
C6
68p
SW
LA
3.3u
ANT
7.212V
BAT
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
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Ver:1
PT0072(05/02)
L3
4.7u
10
*
R11
FeedBack
SI
C19
0.1u
VCC2
C1
10p
20
19
18
17
16
15
14
13
12
11
C3
3300p
VT2
C38
0
R5
430
R15
2.2k
R6
470
VCC2
C14
0.01u
R8
10k
G1
455k
C20
25p
R17
5k
R7
10k
C7
100p
VCC
2
R18
5k
A1
Forward
F2
F 2 Function
Loading
F 1Function
Loading
PT8A996
Right
Backward
Left
SRV
F1
GND
OSCI
PC
VT2
VT1
OSCO
Vcc
VO2
VI2
FC
SI
VO1
2.2M
R12
C16
470p
C5
C4
0.01u 4.7u
VI1
R1
560p
L1
8.2u
C2
27p
1
2
3
4
5
6
7
8
9
10
VT1
R3
22k
VT1
C945
R14
2.2k
C9
0.1u
L2
Forward
Backward
R16
2.2k
C17
330p
C6
27p
Right
Left
C15
0.01u
R2
22k
C8
0.1u
R10
200
R4
3.3k
Left
C11
0.1u
VCC2
R19
2k
Forward
C18
4700p
SI
2.2M
R13
Figure 13. Supper-Regeneration Application Circuit of PT8A996
VT9
8050
R26
300
300
R27
R23
300
VT7
8050
R31
3k
R21
2k
C21
100u
R33
16k
R9
10k
C23
4.7u
VT1
VT6
IRF4905
VT12
8050
VT4
1.3k
R34
IRFZ48N
R29
0.2
M1
C10
0.1u
VT13
BD237
BD238
VT15
D2
NJM431
R32
110
VT3
IRFZ48N
M2
C13
0.1u
C22
470u
VT5
IRF4905
VT14
BD237
VT16
BD238
C12
0.1u
L4
22u
VT8
8050
R24
300
VT11
8050
VCC1
VT10
8050
R30
3k
R28
300
R25
300
VCC1
Right
VCC1
SW 1
R20
2k
Backward
R22
2k
B2
3.6v
B1
3.6v
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Ver:1
PT0072(05/02)
A
1
T1
1.2u
L2
5.1u
C11
27p
11
R5
5k
R1
0~5k
R4
5k
Vcc2
150p
150p
C23
C6
R23
2.7k
R22
6.8k
6:10
T1
FeedBack
D2
D3
1N60 1N60
C12
0.01u
C15
0.01u
T3
2u
14
13
12
11
Vcc2
20
19
18
17
15
G1
455k 16
Vcc2
SI
VT1
5
9018
C17
20p
R25
120
Vcc2
82
70
C14
680p
D5
1N60
VI2
Forward
Backward
Right
Left
GND
VT2
VT1
VO2
7
F2 Function
Loading
T2
R27
510
1
L3
2.2u
VO1
F1 Function
Loading
F2
F1
PC
SRV
OSCI
OSCO
Vcc
SI
FC
VI1
PT8A996
D4
1N60
C16
0.01u
1
2
3
4
5
6
7
8
9
10
C19
0.047u
VT
1
3
5
C18
3-10p
Figure 14. Supper-Heterodyne Application Circuit of PT8A996
11
C 1 3 0.1u
C4
330p
Forward
Backward
Right
Left
180p
C21
C1
C20
3.3u
6
T2
R3
2.2k
R2
2.2M
R 2 4 0.1u
2.2k
8
PT8A201
G2
27M
R26
220
Vcc2
R8
2k
Forward
C5
4700p
SI
D6
1N4148
7
10
FL1
455k
13
Left
VT5
8050
R15
300
R10
300
C8
0.1u
R12
300
VT3
8050
R18
3k
R6
2k
Vcc2
C22
47u
VT1
VT14
IRF4905
VT2
8050
C7
100u
1.3k
R28
R16
0.2
M2
Motor2
C3
0.1u
VT7
BD237
MMo1t o r
1
C2
0.1u
VT11
IRFZ48N
D1
NJM431
VT9
BD238
VT12
IRFZ48N
R21
16k
R20
10k
R19
110
VT13
IRF4905
VT8
BD237
VT10
BD238
C10
470u
C9
0.1u
VT4
8050
R13
300
SW1
VT6
8050
R17
3k
R14
300
Vcc1
Right
R11
300
Vcc1
Switch
Vcc1
VT1
8050
L1
22u
R9
2k
Backwar
R7
2k
B2
3.6v
B1
3.6v
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Ver:1
PT0072(05/02)
L3
4.7u
12
R18
5k
R11
*
FeedBack
C18
0.1u
F
C
S
I
V CC2
C1
10p
L
8.2
1
u
C2
27p
20
19
18
17
16
15
14
13
12
11
F2
F1
PC
PT8A996
Forward
Backward
Right
Left
GND
VT2
VT1
VO2
VI2
VO1
F2 Function
Loading
F1 Function
Loading
SRV
OSCI
OSCO
V CC
SI
FC
VI1
2.2M
R12
C15
470p
C3
R1
C5
C4
3 3 0 0 p 5 6 0 p 0.01u 4.7u
VT2
C380
R5
430
R15
2.2k
R6
470
V CC2
C13
0.01u
R8
10k
G1
455k
C19
25p
R17
5k
V CC2
R7
10k
C7
100p
A1
1
2
3
4
5
6
7
8
9
10
VT1
R3
22k
VT1
C945
R14
2.2k
C9
0.1u
L2
Right
Left
R16
2.2k
C16
330p
C6
27p
Forward
Backward
C14
0.01u
R2
22k
C8
0.1u
R10
200
R4
3.3k
R19
2k
C11
0.1u
V CC2
Forward
C17
4700p
SI
R13
2.2M
Figure 15. Futaba-S3003 Servo Application Circuit of PT8A996
VT9
8050
R24
300
C20
100u
VT7
8050
R27
3k
R21
300
V CC1
R29
16k
R9
10k
1
2
3
C22
4.7u
1.3k
R30
M1
VT3
IRFZ48N
C21
470u
R25
0.2
C10
0.1u
SI
V CC
GND
VT4
IRFZ48N
VT1
VT6
IRF4905
FC
Servo1
Futaba_S3003
D1
NJM431
R28
110
VT5
IRF4905
C12
0.1u
L4
22u
VT8
8050
R22
300
V CC1
VT10
8050
R26
3k
V CC1
R23
300
SW1
R20
2k
Backward
B2
3.6v
B1
3.6v
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Figure 16. Mechanical Diagram of 20-pin SOIC
PT0072(05/02)
13
Ver:1
Data Sheet
PT8A995/996 Digital
Proportional Remote Controller
with 2 Analog CHs & 2 Digital CHs
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Notes
Pericom Technology Inc.
Email: [email protected]
Web Site: www.pti.com.cn, www.pti-ic.com
China:
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576
Fax: (86)-21-6485 2181
Asia Pacific:
Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660
Fax: (852)- 2243 3667
U.S.A.:
2380 Bering Drive, San Jose, California 95131, USA
Tel: (1)-408-435 0800
Fax: (1)-408-435 1100
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve
design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described
other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free from
patent infringement or other rights, of Pericom Technology Incorporation.
PT0072(05/02)
14
Ver:1