NLASB3157 2:1 Multiplexer The NLASB3157 is an advanced CMOS analog switch fabricated with silicon gate CMOS technology. It achieves very low propagation delay and RDSON resistances while maintaining CMOS low power dissipation. Analog and digital voltages that may vary across the full power−supply range (from VCC to GND). This device is a drop in replacement for the NC7SB3157. The select pin has overvoltage protection that allows voltages above VCC, up to 7.0 V to be present on the pin without damage or disruption of operation of the part, regardless of the operating voltage. http://onsemi.com MARKING DIAGRAM 6 1 Features • • • • • • • • • • • • • • High Speed: tPD = 1.0 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 2.0 A (Max) at TA = 25°C Standard CMOS Logic Levels High Bandwidth, Improved Linearity Switches Standard NTSC/PAL Video, Audio, SPDIF and HDTV May be used for Clock Switching, Data Mux’ing, etc. Low RDSON Break Before Make Circuitry, Prevents Inadvertent Shorts 2 Devices can Switch Balanced Signal Pairs, e.g. LVDS 200−Mb/s Latchup Performance Exceeds 300 mA Pin for Pin Drop in for NC7SB3157 Tiny SC88 Package Only 2.0 x 2.1 mm ESD Performance: Human Body Model; 2000 V; Machine Model; 200 V Extended Automotive Temperature Range −55°C to +125°C (See Appendix) AF = Specific Device Code d = Date Code ORDERING INFORMATION Device Package Shipping† NLASB3157DFT2 SC88/ SOT−363/ SC−70 3000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. FUNCTION TABLE Select Input L H B1 1 GND 2 6 Select 5 VCC 4 A AFd SC−88/SOT−363/SC−70 DF SUFFIX CASE 419B Function B0 Connected to A B1 Connected to A 1 0 B0 3 Figure 1. Pinout (Top View) Semiconductor Components Industries, LLC, 2004 February, 2004 − Rev. 5 1 Publication Order Number: NLASB3157/D NLASB3157 MAXIMUM RATINGS (Note 1) Symbol Value Unit Supply Voltage VCC −0.5 to +7.0 V DC Switch Voltage (Note 2) VS −0.5 to VCC + 0.5 V DC Input Voltage (Note 2) VIN −0.5 to + 7.0 V DC Input Diode Current @ VIN 0 V IIK −50 mA IOUT 128 mA Rating DC Output Current DC VCC or Ground Current ICC/IGND +100 mA Storage Temperature Range Tstg −65 to +150 °C Junction Temperature Under Bias TJ 150 °C Junction Lead Temperature (Soldering, 10 Seconds) TL 260 °C Power Dissipation @ +85°C PD 180 mW 1. Maximum ratings are DC values beyond which the device may be damaged or have its useful life impaired. The data sheet specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. ON Semiconductor does not recommend operation outside data sheet specifications. RECOMMENDED OPERATING CONDITIONS (Note 3) Symbol Min Max Unit Supply Voltage Operating VCC 1.65 5.5 V Select Input Voltage VIN 0 VCC V Characteristic Switch Input Voltage VIN 0 VCC V VOUT 0 VCC V Operating Temperature TA −55 +125 °C Input Rise and Fall Time Control Input VCC = 2.3 V−3.6 V Control Input VCC = 4.5 V−5.5 V tr, tf 0 0 10 5 Thermal Resistance JA − 350 Output Voltage ns/V 2. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. 3. Select input must be held HIGH or LOW, it must not float. http://onsemi.com 2 °C/W NLASB3157 DC ELECTRICAL CHARACTERISTICS Symbol Parameter VCC (V) Test Conditions TA = +25C Min Typ VIH HIGH Level Input Voltage 1.65−1.95 2.3−5.5 VIL LOW Level Input Voltage 1.65−1.95 2.3−5.5 IIN Input Leakage Current 0 VIN 5.5 V 0−5.5 0.05 IOFF OFF State Leakage Current 0 A, B VCC 1.65−5.5 0.05 RON Switch On Resistance (Note 4) VIN = 0 V, IO = 30 mA VIN = 2.4 V, IO = −30 mA VIN = 4.5 V, IO = −30 mA 4.5 VIN = 0 V, IO = 24 mA VIN = 3 V, IO = −24 mA ICC Quiescent Supply Current All Channels ON or OFF On Resistance Over Signal Range (Note 4) (Note 8) Max Min Max 0.75 VCC 0.7 VCC Unit V 0.25 VCC 0.3 VCC V 0.1 1 A 0.1 1 A 3 5 7 7 12 15 3.0 4 10 9 20 VIN = 0 V, IO = 8 mA VIN = 2.3 V, IO = −8 mA 2.3 5 13 12 30 VIN = 0 V, IO = 4 mA VIN = 1.65 V, IO = −4 mA 1.65 6.5 17 20 50 VIN = VCC or GND 5.5 10 A VCC V 4.5 25 3.0 50 2.3 100 1.65 300 1 IOUT = 0 Analog Signal Range RRANGE TA = −40C to +85C VCC IA = −30 mA, 0 VBn VCC IA = −24 mA, 0 VBn VCC IA = −8 mA, 0 VBn VCC IA = −4 mA, 0 VBn VCC 0 VCC 0 RON On Resistance Match Between Channels (Note 4) (Note 5) (Note 6) IA = −30 mA, VBn = 3.15 IA = −24 mA, VBn = 2.1 IA = −8 mA, VBn = 1.6 IA = −4 mA, VBn = 1.15 4.5 3.0 2.3 1.65 0.15 0.2 0.5 0.5 Rflat On Resistance Flatness (Note 4) (Note 5) (Note 7) IA = −30 mA, 0 VBn VCC IA = −24 mA, 0 VBn VCC IA = −8 mA, 0 VBn VCC IA = −4 mA, 0 VBn VCC 5.0 6 3.3 12 2.5 28 1.8 125 4. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B Ports). 5. Parameter is characterized but not tested in production. 6. RON = RON max − RON min measured at identical VCC, temperature and voltage levels. 7. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 8. Guaranteed by Design. http://onsemi.com 3 NLASB3157 AC ELECTRICAL CHARACTERISTICS Symbol Parameter VCC (V) Test Conditions TA = +25C Min Typ TA = −40C to +85C Max Min tPHL tPLH Propagation Delay Bus to Bus (Note 10) VI = OPEN tPZL tPZH Output Enable Time Turn On Time (A to Bn) VI = 2 VCC for tPZL VI = 0 V for tPZH 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 23 13 6.9 5.2 7 3.5 2.5 1.7 tPLZ tPHZ Output Disable Time Turn Off Time (A Port to B Port) VI = 2 VCC for tPLZ VI = 0 V for tPHZ 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 12.5 7 5 3.5 3 2 1.5 0.8 tB−M Break Before Make Time (Note 9) Q Charge Injection (Note 9) CL = 0.1 nF, VGEN = 0 V RGEN = 0 OIRR Off Isolation (Note 11) Xtalk Max 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 Unit ns Figures 2, 3 24 14 7.6 5.7 ns Figures 2, 3 13 7.5 5.3 3.8 ns Figures 2, 3 ns Figure 4 1.2 0.8 0.3 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 Figure Number 0.5 0.5 0.5 0.5 5.0 3.3 7 3 pC Figure 5 RL = 50 f = 10 MHz 1.65−5.5 −57 dB Figure 6 Crosstalk RL = 50 f = 10 MHz 1.65−5.5 −54 dB Figure 7 BW −3 dB Bandwidth RL = 50 1.65−5.5 250 MHz Figure 10 THD Total Harmonic Distortion (Note 9) RL = 600 0.5 VP−P f = 600 Hz to 20 kHz 5 0.011 % CAPACITANCE (Note 12) Symbol Parameter Test Conditions Typ Max Unit Figure Number CIN Select Pin Input Capacitance VCC = 0 V 2.3 pF CIO−B B Port Off Capacitance VCC = 5.0 V 6.5 pF Figure 8 CIOA−ON A Port Capacitance when Switch is Enabled VCC = 5.0 V 18.5 pF Figure 9 9. Guaranteed by Design. 10. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). 11. Off Isolation = 20 log10 [VA/VBn]. 12. TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested in production. http://onsemi.com 4 NLASB3157 APPENDIX A DC ELECTRICAL EXTENDED AUTOMOTIVE TEMPERATURE RANGE CHARACTERISTICS Symbol Parameter VCC (V) Test Conditions TA = +25C Min Typ VIH HIGH Level Input Voltage 1.65−1.95 2.3−5.5 VIL LOW Level Input Voltage 1.65−1.95 2.3−5.5 IIN Input Leakage Current 0 VIN 5.5 V 0−5.5 0.05 IOFF OFF State Leakage Current 0 A, B VCC 1.65−5.5 0.05 RON Switch On Resistance (Note 13) VIN = 0 V, IO = 30 mA VIN = 2.4 V, IO = −30 mA VIN = 4.5 V, IO = −30 mA 4.5 VIN = 0 V, IO = 24 mA VIN = 3 V, IO = −24 mA ICC Quiescent Supply Current All Channels ON or OFF On Resistance Over Signal Range (Note 13) (Note 15) Max Min Max 0.75 VCC 0.7 VCC Unit V 0.25 VCC 0.3 VCC V 0.1 1 A 0.1 1 A 3 5 7 8.5 13.0 15.0 3.0 4 10 11 20 VIN = 0 V, IO = 8 mA VIN = 2.3 V, IO = −8 mA 2.3 5 13 12 30 VIN = 0 V, IO = 4 mA VIN = 1.65 V, IO = −4 mA 1.65 6.5 17 20 50 VIN = VCC or GND 5.5 10 A VCC V 4.5 25 3.0 50 2.3 100 1.65 300 1 IOUT = 0 Analog Signal Range RRANGE TA = −55C to +125C VCC IA = −30 mA, 0 VBn VCC IA = −24 mA, 0 VBn VCC IA = −8 mA, 0 VBn VCC IA = −4 mA, 0 VBn VCC 0 VCC 0 13. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B Ports). 14. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 15. Guaranteed by Design. * For RON, RFLAT, Q, OIRR, Xtalk, BW, THD, and CIN see −40C to 85C section. http://onsemi.com 5 NLASB3157 APPENDIX A AC ELECTRICAL EXTENDED AUTOMOTIVE TEMPERATURE RANGE CHARACTERISTICS Symbol Parameter Test Conditions VCC (V) TA = +25C Min Typ Max TA = −55C to +125C Min tPHL tPLH Propagation Delay Bus to Bus (Note 17) VI = OPEN 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 tPZL tPZH Output Enable Time Turn On Time (A to Bn) VI = 2 VCC for tPZL VI = 0 V for tPZH 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 23 13 6.9 5.2 7 3.5 2.5 1.7 tPLZ tPHZ Output Disable Time Turn Off Time (A Port to B Port) VI = 2 VCC for tPLZ VI = 0 V for tPHZ 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 12.5 7 5 3.5 3 2 1.5 0.8 tB−M Break Before Make Time (Note 16) Max Unit ns Figures 2, 3 24 14 9.0 7.0 ns Figures 2, 3 13 7.5 6.5 5.0 ns Figures 2, 3 ns Figure 4 1.2 0.8 0.3 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 0.5 0.5 0.5 0.5 Figure Number 16. Guaranteed by Design. 17. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). * For RON, RFLAT, Q, OIRR, Xtalk, BW, THD, and CIN see −40C to 85C section. http://onsemi.com 6 NLASB3157 AC LOADING AND WAVEFORMS VI RU FROM OUTPUT UNDER TEST NOTE: Input driven by 50 source terminated in 50 NOTE: CL includes load and stray capacitance NOTE: Input PRR = 1.0 MHz; tW = 500 ns RD CL Figure 2. AC Test Circuit tf = 2.5 ns tf = 2.5 ns VCC tr = 2.5 ns SWITCH INPUT 90% 90% 50% SELECT INPUT 10% GND tPLZ VTRI 50% tPZH 50% 50% 10% OUTPUT VCC 50% GND tPHL VOH OUTPUT 50% tPZL tW tPLH 90% 10% 50% 10% tr = 2.5 ns 90% VOL + 0.3 V VOL tPHZ VOH VOL OUTPUT VOH − 0.3 V 50% VTRI Figure 3. AC Waveforms VIN B0 B1 S A LOGIC INPUT VOUT RL CL VOUT LOGIC INPUT 0.9 × VOUT tD Figure 4. Break Before Make Interval Timing http://onsemi.com 7 NLASB3157 AC LOADING AND WAVEFORMS RGEN VGE BN A LOGIC INPUT VOUT S RL CL 1 M 100 pF OFF ON OFF VOUT VOUT Q = (VOUT)(CL) LOGIC INPUT Figure 5. Charge Injection Test 10 nF 10 nF Signal Generator 0 dBm VCC 50 A LOGIC INPUT 0 V or VIH S GND 50 Figure 6. Off Isolation Figure 7. Crosstalk 10 nF 10 nF Capacitance Meter VCC A Capacitance Meter f = 1 MHz 50 S Analyzer GND 50 A B1 BN Analyzer VCC B0 LOGIC INPUT 0 V or VCC S VCC A f = 1 MHz S BN LOGIC INPUT 0 V or VCC BN GND GND Figure 8. Channel Off Capacitance Figure 9. Channel On Capacitance 10 nF Signal Generator 0 dBm VCC A BN 50 S LOGIC INPUT 0 V or VCC GND Figure 10. Bandwidth http://onsemi.com 8 NLASB3157 PACKAGE DIMENSIONS SC−88/SOT−363/SC−70 DF SUFFIX CASE 419B−02 ISSUE P A G 6 5 4 1 2 3 DIM A B C D G H J K N S −B− S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419B−01 OBSOLETE, NEW STANDARD 419B−02. 0.2 (0.008) D 6 PL B M INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 M N J C K H 0.50 0.0197 32 DFT2 (SC88) Reel Configuration/Orientation 0.65 0.025 User Direction of Feed 0.65 0.025 “T2’’ PIN ONE AWAY FROM SPROCKET HOLE 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches SC−88/SC70−6/SOT363 http://onsemi.com 9 NLASB3157 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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