212 Series of Encoders Features • • • • • • • Operating voltage: – 2.4V~5V for the HT12A/B/C – 2.4V~12V for the HT12E/EA Low power and high noise immunity CMOS technology Low standby current: 0.1µA (Typ.) at VDD=5V HT12A/B/C with a 38kHz carrier for infrared transmission medium Minimum transmission word: – Four words for the HT12E/EA – One word for the HT12A/B/C • • • • Built-in oscillator needs only 5% resistor Data code polarity: – HT12A/C/E/EA: Positive polarity – HT12B: Negative polarity Minimal external components 18-pin DIP or 20-pin SOP package available for HT12A/12B 14/18-pin DIP or 16/20-pin SOP or 16-pin NSOP package available for HT12E 16/18-pin DIP or 16/20-pin SOP package available for HT12C Applications • • • • • • • • Burglar alarm system Smoke and fire alarm system Garage door controllers Car door controllers Car alarm system Security system Cordless telephones Other remote control systems General Description The 212 encoders are a series of CMOS LSIs for remote control system applications. They are capable of encoding information which consists of N address bits and 12–N data bits. Each address/data input can be set to one of the two logic states. The programmed addresses/data are transmitted together with the header bits via an RF or an infrared transmission medium upon receipt of a trigger signal. The capability to select a TE trigger on the HT12E/EA or a DATA trigger on the HT12A/B/C further enhances the application flexibility of the 212 series of encoders. The HT12A/B/C additionally provides a 38kHz carrier for infrared systems. 1 2nd Oct ’97 212 Series of Encoders Selection Table Block Diagram TE trigger HT12E/EA 2 2nd Oct ’97 212 Series of Encoders DATA trigger HT12A/B/C Note: The address data pins are available in various combinations (refer to the address/data table). Pin Description Pin Name I/O Internal Connection Description CMOS IN Pull-High (HT12A/B/C) A0~A7 I NMOS TRANSMISSION GATE (HT12E) Input pins for address A0~A7 setting They can be externally set to VDD or VSS. NMOS TRANSMISSION GATE PROTECTION DIODE (HT12EA) NMOS TRANSMISSION GATE (HT12E) AD8~AD11 I Input pins for address/data AD8~AD11 setting NMOS TRANSMISSION They can be externally set to VDD or VSS (only for the HT12E/EA). GATE PROTECTION DIODE (HT12EA) 3 2nd Oct ’97 212 Series of Encoders I/O Internal Connection Description D2~D11 I CMOS IN Pull-High Input pins for data D2~D11 setting and transmission enable, active low They can be externally set to VSS or left open (see Note) DOUT O CMOS OUT L/MB I CMOS IN Pull-High Latch/Momentary transmission format selection pin: Latch: Floating or VDD Momentary: VSS TE I CMOS IN Pull-High Transmission enable, active low (see Note) OSC1 I OSCILLATOR 1 Oscillator input pin OSC2 O OSCILLATOR 1 Oscillator output pin X1 I OSCILLATOR 2 455kHz resonator oscillator input X2 O OSCILLATOR 2 455kHz resonator oscillator output VSS I — Negative power supply (GND) VDD I — Positive power supply Pin Name Encoder data serial transmission output Note: D2~D11 are all data input and transmission enable pins of the HT12A/B/C. TE is a transmission enable pin of the HT12E/EA. Approximate internal connection circuits 4 2nd Oct ’97 212 Series of Encoders Absolute Maximum Ratings* Supply Voltage (HT12A/B/C) .......–0.3V to 5.5V Supply Voltage (HT12E/EA) .........–0.3V to 13V Input Voltage.................... VSS–0.3 to VDD+0.3V Storage Temperature................. –50°C to 125°C Operating Temperature............... –20°C to 75°C *Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extened periods may affect device reliability. Electrical Characteristics (Ta=25°C) HT12A/B/C Symbol Test Conditions Parameter Min. Typ. Max. Unit 2.4 3 5 V — 0.1 1 µA — 0.1 1 µA No load FOSC=455kHz — 200 400 µA — 400 800 µA VOH=0.9VDD (Source) –1 –1.6 — mA VOL=0.1VDD (Sink) 2 3.2 — mA VDD Conditions — — VDD Operating Voltage ISTB Standby Current IDD Operating Current IDOUT Output Drive Current VIH “H” Input Voltage — — 0.8VDD — VDD V VIL “L” Input Voltage — — 0 — 0.2VDD V RDATA D2~D11 Pull-High Resistance 5V — 150 300 kΩ 3V Oscillator stops 5V 3V 5V 5V VDATA=0V (Ta=25°C) HT12E/EA Symbol Test Conditions Parameter VDD Operating Voltage ISTB Standby Current IDD Operating Current Min. Typ. Max. Unit 2.4 5 12 V — 0.1 1 µA 12V — 2 4 µA 3V — 40 80 µA — 150 300 µA VDD Conditions — — 3V Oscillator stops No load 12V FOSC=3kHz 5 2nd Oct ’97 212 Series of Encoders Symbol Test Conditions Parameter VDD 5V Min. Typ. Max. Unit VOH=0.9VDD (Source) –1 –1.6 — mA VOL=0.1VDD (Sink) 1 1.6 — mA Conditions IDOUT Output Drive Current VIH “H” Input Voltage — — 0.8VDD — VDD V VIL “L” Input Voltage — — 0 — 0.2VDD V FOSC Oscillator Frequency 5V ROSC=1.1MΩ — 3 — kHz RTE TE Pull-High Resistance 5V VTE=0V — 1.5 3 MΩ Functional Description Operation The 212 series of encoders begin a 4-word transmission cycle upon receipt of a transmission enable (TE for the HT12E/EA or D2~D11 for the HT12A/B/C, active low). This cycle will repeat itself as long as the transmission enable (TE or D2~D11) is held low. Once the transmission enable returns high the encoder output completes its final cycle and then stops as shown below. Transmission timing for the HT12E/EA Transmission timing for the HT12A/B/C (L/MB=Floating or VDD) Transmission timing for the HT12A/B/C (L/MB=VSS) 6 2nd Oct ’97 212 Series of Encoders Information word Transmission of L/MB is the Latch/Momentary type selection pin. If L/MB=1 the device is in the latch mode (for use with the latch type of data decoders). When the transmission enable is removed during a transmission, the DOUT pin outputs a complete word and then stops. On the other hand, if L/MB=0 the device is in the momentary mode (for use with the momentary type of data decoders). When the transmission enable is removed during a transmission, the DOUT outputs a complete word and then adds 7 words all with the “1” data code. An information word consists of 4 periods as illustrated below. Composition of information Address/data waveform Each programmable address/data pin can be externally set to one of the following two logic states as shown below. Address/Data bit waveform for the HT12E/EA Address/Data bit waveform for the HT12A/C 7 2nd Oct ’97 212 Series of Encoders The HT12B data code polarity is inverted: Address/Data bit waveform for the HT12B The address/data bits of the HT12A/B/C are transmitted with a 38kHz carrier for infrared remote controller flexibility. Address/data programming (preset) The status of each address/data pin can be individually pre-set to logic “high” or “low”. If a transmission-enable signal is applied, the encoder scans and transmits the status of the 12 bits of address/data serially in the order A0 to AD11 for the HT12E/EA encoder and A0 to D11 for the HT12A/B/C encoder. During information transmission these bits are transmitted with a preceding synchronization bit. But if the trigger signal is not applied, the chip enters the standby mode and consumes a reduced current which is less than 1µA for a supply voltage of 5V. Usual applications preset the address pins with individual security codes by the DIP switches or PCB wiring, while the data is selected by the push button or electronic switches. The following figure shows an application using the HT12E/EA: The transmitted information is as shown: Pilot & Sync. A0 A1 A2 A3 A4 A5 A6 A7 AD8 AD9 1 0 1 0 0 0 1 1 1 1 8 AD10 AD11 1 0 2nd Oct ’97 212 Series of Encoders Address/Data sequence The following provides a table of the address/data sequence for various models of the 212 series of encoders. A correct device should be selected according to the requirements of individual address and data. Address/Data Bits Part No. 0 1 2 3 4 5 6 7 8 9 10 11 HT12A A0 A1 A2 A3 A4 A5 A6 A7 D8 D9 D10 D11 HT12B A0 A1 A2 A3 A4 A5 A6 A7 D8 D9 D10 D11 HT12C A0 A1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 HT12E/EA A0 A1 A2 A3 A4 A5 A6 A7 AD8 AD9 AD10 AD11 Transmission enable For the HT12E/EA encoders, transmission is enabled by applying a low signal to the TE pin. But for the HT12A/B/C encoders, transmission is enabled by applying a low signal to one of the data pins D2~D11. Two erroneous application circuits of HT12EA HT12EA is equipped with a protection diode in its input pins, that is the difference of HT12EA from HT12E (see the “Approximate internal connection circuits” on page 6). The HT12EA must exactly practice the application circuit by HOLTEK’s supply (see the “Application circuits”). • The cause for the error: AD8~AD11 pins input voltage > VDD+0.3V 9 2nd Oct ’97 212 Series of Encoders • The cause for the error: The IC’s power source from AD8~AD11 pins Flowchart • HT12A/B/C HT12E/EA Note: D2~D11 are transmission enables of the HT12A/B/C. TE is the transmission enable of the HT12E/EA. 10 2nd Oct ’97 212 Series of Encoders Oscillator frequency vs supply voltage The recommended oscillator frequency is FOSCD (decoder) ≅ 50 FOSCE (HT12E/EA encoder) 1 ≅ FOSCE (HT12A/B/C encoder). 3 11 2nd Oct ’97 212 Series of Encoders Package Information 12 2nd Oct ’97 212 Series of Encoders 13 2nd Oct ’97 212 Series of Encoders Application Circuits Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.) Typical RF transmitter: JR-220 (JUWA CORP.) 14 2nd Oct ’97