1CY7C271A CY7C271A 32K x 8 Power Switched and Reprogrammable PROM Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 25 ns (Commercial) • Low power — 275 mW (Commercial) • Super low standby power — Less than 85 mW when deselected • EPROM technology 100%programmable • Slim 300-mil package • Direct replacement for bipolar PROMs • Capable of withstanding >4001V static discharge Functional Description The CY7C271A is a high-performance 32,768-word by 8-bit CMOS PROM. When disabled (CE HIGH), the 7C271A automatically powers down into a low-power stand-by mode. The CY7C271A is packaged in the 300-mil slim package and is available in a cerDIP package equipped with an erasure window to provide for reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed. The memory cells utilize proven EPROM floating gate technology and byte-wide intelligent programming algorithms. The CY7C271A offers the advantages of lower power, superior performance, and programming yield. The EPROM cell requires only 12.5V for the super voltage, and low current requirements allow for gang programming. The EPROM cells allow each memory location to be tested 100% because each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer programming, the product will meet DC and AC specification limits. Reading the 7C271A is accomplished by placing active LOW signals on CS1 and CE, and an active HIGH on CS2. The contents of the memory location addressed by the address lines (A0–A14) will become available on the output lines (O0–O7). Logic Block Diagram Pin Configurations DIP/Flatpack O7 A14 A13 A12 A11 X ADDRESS A10 256 x 1024 PROGRAMABLE ARRAY 8 x 1 OF 128 MULTIPLEXER O6 O3 A5 A4 A3 A2 A1 A0 5 6 25 24 23 22 21 O2 13 GND 14 15 A5 A4 27 26 18 17 16 O4 A6 28 2 3 4 O0 O1 A8 A7 1 7 8 9 10 11 12 O5 A9 A9 A8 A7 A6 20 19 VCC A10 A11 A12 A13 A14 CS1 CS2 CE O7 O6 O5 O4 O3 A3 Y ADDRESS PLCC Top View O2 A1 A5 A6 A7 NC VCC A8 PS A2 A0 O1 POWER-DOWN A4 A3 A2 A1 A0 NC O0 O0 E CLR ES CP NC O7 O6 O1 O2 GND NC O3 O4 O5 CE CS1 CS2 4 3 2 1 28 27 26 25 5 24 6 23 7 22 8 21 9 20 10 19 11 12 13 141516 17 18 Cypress Semiconductor Corporation Document #: 38-04013 Rev. *B • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 28, 2002 CY7C271A Selection Guide 7C271A-25 7C271A-30 7C271A-35 7C271A-45 Unit 25 30 35 45 ns Maximum Access Time Maximum Operating Current Com’l 75 75 50 50 mA Standby Current Com’l 15 15 15 15 mA Maximum Ratings[1] DC Program Voltage .................................................... 13.0V (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Static Discharge Voltage............................................ >4001V (per MIL-STD-883, Method 3015) Latch-Up Current..................................................... >200 mA UV Exposure ................................................ 7258 Wsec/cm2 Operating Range Supply Voltage to Ground Potential ............... –0.5V to +7.0V DC Voltage Applied to Outputs in High Z State ............................................... –0.5V to +7.0V Range Ambient Temperature VCC Commercial 0°C to +700°C 5V ±10% DC Input Voltage............................................ –3.0V to +7.0V Electrical Characteristics Over the Operating Range[2, 3] Parameter Description Test Conditions 7C271A-25 7C271A-30 7C271A-35 7C271A-45 Min. Min. Min. Max. 2.4 Max. VOH Output HIGH Voltage VCC = Min., IOH = –2.0 mA 2.4 VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA VIH Input HIGH Level Guaranteed Input Logical HIGH Voltage for All Inputs VIL Input LOW Level Guaranteed Input Logical LOW Voltage for All Inputs IIX Input Leakage Current GND < VIN < VCC –10 +10 –10 +10 IOZ Output Leakage Current GND < VOUT < VCC, Output Disable –10 +10 –10 IOS Output Short Circuit Current[4] VCC = Max., VOUT = GND –20 –90 –20 ICC Power Supply Current VCC=Max., IOUT = 0 mA, f = 10 MHz Com’l 75 ISB Stand-By Current VCC=Max., CE = VIH Com’l 15 0.4 2.0 VCC 2.4 0.4 2.0 0.8 Max. Unit V 0.4 V VCC V 0.8 V –10 +10 µA +10 –10 +10 µA –90 –20 –90 mA 50 50 mA 15 15 mA VCC 2.0 0.8 Capacitance[3] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. Unit 10 pF 10 pF Notes: 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. See the last page of this specification for Group A subgroup testing information. 3. See Introduction to CMOS PROMs in this Data Book for general information on testing. 4. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. Document #: 38-04013 Rev. *B Page 2 of 10 CY7C271A AC Test Loads and Waveforms R1 500Ω 658Ω MIL 5V R1 500Ω 658Ω MIL 5V OUTPUT ALL INPUT PULSES 3.0V 90% OUTPUT 30 pF R2 333Ω 403Ω MIL INCLUDING JIG AND SCOPE R2 333Ω GND 403Ω MIL 5 pF INCLUDING JIG AND SCOPE (a) NormalLoad 90% 10% 10% ≤ 5 ns ≤ 5 ns (b) High-Z Load Equivalent to: THÉVENIN EQUIVALENT 200Ω 2.00V Commercial 250Ω MIL 1.90V MIL OUTPUT Switching Characteristics Over the Operating Range[2, 3] 7C271A-25 Parameter Description Min. Max. 7C271A-30 Min. Max. 7C271A-35 Min. Max. 7C271A-45 Min. Max. Unit tAA Address to Output Valid 25 30 35 45 ns tACS CS1/CS2 Active to Output Valid 12 18 18 18 ns tACE CE Active to Output Valid 30 35 35 45 ns tHZCS CS1/CS2 Inactive to High Z 12 18 18 18 ns tHZCE CE Inactive to High Z 12 18 18 18 ns tPU CE Active to Power-Up tPD CE Inactive to Power-Down tOH Output Data Hold Document #: 38-04013 Rev. *B 0 0 30 0 0 35 0 0 40 0 ns 40 0 ns ns Page 3 of 10 CY7C271A Switching Waveform ICC tPD tPU CE CS2 ACTIVE INACTIVE ACTIVE CS1 ADDRA A0 - A14 ADDRB tAA tAA tHZCS tACS tOH tACE DATA A O0 - O7 tHZCE DATA B Erasure Characteristics Wavelengths of light less than 4000 Angstroms begin to erase the CY7C271A in the windowed package. For this reason, an opaque label should be placed over the window if the PROM is exposed to sunlight or fluorescent lighting for extended periods of time. The recommended dose of ultraviolet light for erasure is a wavelength of 2537 Angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be approximately 35 minutes. The CY7C271A DATA B needs to be within 1 inch of the lamp during erasure. Permanent damage may result if the PROM is exposed to high-intensity UV light for an extended period of time. 7258 Wsec/cm2 is the recommended maximum dosage. Programming Modes Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. Table 1. Programming Electrical Characteristics Parameter Description Min. Max. Unit 12.5 13 V 50 mA VPP Programming Power Supply IPP Programming Supply Current VIHP Programming Input Voltage HIGH 3.0 VCC V VILP Programming Input Voltage LOW –0.5 0.4 V VCCP Programming VCC 6.0 6.5 V Document #: 38-04013 Rev. *B Page 4 of 10 CY7C271A Table 2. Mode Selection Pin Function[5] Mode CS1/VPP CS2/PGM CE/VFY A0 A9 Data Read VIL VIH VIL A0 A9 O7–O0 Output Disable VIH VIH VIL A0 A9 High Z Output Disable VIL VIL VIL A0 A9 High Z Stand-by X X VIH A0 A9 High Z Program VPP VILP VIHP A0 A9 D7–D0 Program Verify VPP VIHP VILP A0 A9 O7–O0 Program Inhibit VPP VIHP VIHP X X X Signature (MFG) VILP VILP VILP VILP VHV[6] 34H VIHP VHV[6] 20H Signature (DEV) Note: 5. X can be VIL or 6. VHV=12±0.5V VILP VILP VILP VIH. Programming Pinouts DIP Top View VCC A8 PS A4 A3 A2 4 5 6 20 19 VPP A1 A0 7 8 9 10 11 12 18 PGM 17 16 D7 D6 15 D5 14 D4 D3 D0 D1 D2 GND 13 E VFY A5 A6 A7 NC VCC A8 PS 24 2 3 23 22 21 A5 Document #: 38-04013 Rev. *B 1 A4 A3 A2 A1 A0 NC D0 4 3 2 1 28 27 26 25 5 24 6 23 7 22 8 21 9 20 10 19 11 12 1314151617 18 E VPP VFY PGM NC D7 D6 D1 D2 GND NC D3 D4 D5 A7 A6 PLCC Top View Page 5 of 10 CY7C271A Typical DC and AC Characteristics VCC =5.5V TA =25°C 0.7 0.6 1.25 50 100 150 200 CLOCK PERIOD (ns) 1.15 TA = 25°C 1.05 1.0 0.95 0.9 0.85 4 4.5 5 5.5 4.5 5 5.5 1.1 1.05 1.0 0.95 0.9 0.85 0.8 –100 6 1.4 1.3 VCC = 4.5V 1.2 1.1 1.0 0.9 0.8 –100 6 SUPPLYVOLTAGE (V) –50 0 50 100 –50 0 50 100 150 AMBIENT TEMPERATURE (°C) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.2 1.1 f = 10 MHz TA = 25°C 1.15 SUPPLY VOLTAGE (V) NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE VCC = 5.5V f = 10 MHz 1.2 4 250 NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME 0.5 0.0 1.25 OUTPUT SINK CURRENT (mA) 0.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 NORMALIZED ICC 1.0 NORMALIZED ICC NORMALIZED ICC 1.1 0.9 NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD 150 AMBIENT TEMPERATURE (°C) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 120 100 80 VCC = 5.0V TA = 25°C 60 40 20 0 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE OUTPUT SOURCE CURRENT -100 -80 -60 -40 -20 0.0 0.0 1.0 2.0 3.0 4.0 5.0 OUTPUT VOLTAGE (V) C271A-9 Document #: 38-04013 Rev. *B Page 6 of 10 CY7C271A Ordering Information Speed (ns) Ordering Code Package Name Operating Range Package Type 25 CY7C271A-25JC J65 32-Lead Plastic Leaded Chip Carrier Commercial 30 CY7C271A-30PC P21 28-Lead (300-Mil) Molded DIP Commercial 35 CY7C271A-35PC P21 28-Lead (300-Mil) Molded DIP Commercial CY7C271A-35WC W22 28-Lead (300-Mil) Windowed CerDIP CY7C271A-45WC W22 28-Lead (300-Mil) Windowed CerDIP 45 Commercial MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Switching Characteristics Parameter Subgroups Parameter Subgroups VOH 1, 2, 3 tAA 7, 8, 9, 10, 11 VOL 1, 2, 3 tACS 7, 8, 9, 10, 11 VIH 1, 2, 3 tACE 7, 8, 9, 10, 11 VIL 1, 2, 3 IIX 1, 2, 3 IOZ 1, 2, 3 ICC 1, 2, 3 ISB 1, 2, 3 Document #: 38-04013 Rev. *B Page 7 of 10 CY7C271A Package Diagrams 28-Lead (300-Mil) Molded DIP P21 51-85014-*B 32-Lead Plastic Leaded Chip Carrier J65 51-85002-*B Document #: 38-04013 Rev. *B Page 8 of 10 CY7C271A Package Diagrams (continued) 28-Lead (300-Mil) Windowed CerDIP W22 MIL-STD-1835 D-15 Config. A 51-80087-** All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-04013 Rev. *B Page 9 of 10 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C271A Document History Page Document Title: CY7C271A 32K x 8 Power Switched and Reprogrammable PROM Document Number: 38-04013 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 114409 3/26/02 DSG Change from Spec number: 38-00424 to 38-04013 *A 118899 9/13/02 GBI Update Ordering Information *B 122254 12/26/02 RBI Add power up requirements to maximum ratings information Document #: 38-04013 Rev. *B Page 10 of 10