WEDC W3DG7217V75D2

White Electronic Designs
W3DG7217V-D2
PRELIMINARY*
128MB - 16Mx72 SDRAM UNBUFFERED
FEATURES
DESCRIPTION
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
The W3DG7217V is a 16Mx72 synchronous DRAM module
which consists of nine 16Meg x 8 SDRAM components
in TSOP-II package, and one 2K EEPROM in an 8-pin
TSSOP package for Serial Presence Detect which are
mounted on a 168 Pin DIMM multilayer FR4 Substrate.
Fully synchronous: All signals are registered on the positive
edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3 volt ± 0.3v Power Supply
168- Pin DIMM JEDEC
* This product is under development, is not qualified or characterized and is subject to
change without notice.
Pin ConfigurATIONs (FRONT SIDE/BACK SIDE)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
May 2004
Rev. 2
Front
VSS
DQ0
DQ1
DQ2
DQ3
VCC
DQ4
DQ5
DQ6
DQ7
DQ8
VSS
DQ9
DQ10
DQ11
DQ12
DQ13
VCC
DQ14
DQ15
CB0
CB1
VSS
NC
NC
VCC
WE#
DQM0
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Front
Pin
DQM1
57
CS0#
58
DNU
59
VSS
60
A0
61
A2
62
A4
63
A6
64
A8
65
A10#/AP 66
BA1
67
VCC
68
VCC
69
CLK0
70
71
VSS
DNU
72
CS2#
73
DQM2
74
DQM3
75
DNU
76
VCC
77
NC
78
NC
79
CB2
80
CB3
81
VSS
82
DQ16
83
DQ17
84
Front
DQ18
DQ19
VCC
DQ20
NC
*VREF
*CKE1
VSS
DQ21
DQ22
DQ23
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
CLK2
NC
NC
**SDA
**SCL
VCC
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
VSS
DQ32
DQ33
DQ34
DQ35
VCC
DQ36
DQ37
DQ38
DQ39
DQ40
VSS
DQ41
DQ42
DQ43
DQ44
DQ45
VCC
DQ46
DQ47
CB4
CB5
VSS
NC
NC
VCC
CAS#
DQM4
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
*CS1#
RAS#
VSS
A1
A3
A5
A7
A9
BA0
A11
VCC
*CLK1
*A12
VSS
CKE0
*CS3#
DQM6
DQM7
*A13
VCC
NC
NC
CB6
CB7
VSS
DQ48
DQ49
1
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
PIN NAMES
Back
DQ50
DQ51
VCC
DQ52
NC
*VREF
NC
VSS
DQ53
DQ54
DQ55
VSS
DQ56
DQ57
DQ58
DQ59
VCC
DQ60
DQ61
DQ62
DQ63
VSS
*CLK3
NC
**SA0
**SA1
**SA2
VCC
A0 – A11
BA0-1
DQ0-63
CB0-7
CLK0,CLK2
CKE0
CS0#,CS2#
RAS#
CAS#
WE#
DQM0-7
VCC
VSS
*VREF
SDA
SCL
SA0-2
DNU
NC
Address input (Multiplexed)
Select Bank
Data Input/Output
Check bit (Data-in/data-out)
Clock input
Clock Enable input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Power supply for reference
Serial data I/O
Serial clock
Address in EEPROM
Do not use
No Connect
* These pins are not used in this module.
** These pins should be NC in the system which
does not support SPD.
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
W3DG7217V-D2
PRELIMINARY
FUNCTIONAL BLOCK DIAGRAM
·
CS0#
DQM0
DQM4
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
CS#
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
DQM6
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
U2
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM1
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
U0
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
U5
DQM5
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
U1
·
CS2#
DQM2
U6
U7
DQM7
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQM3
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
DQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CS#
Serial PD
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
U3
U4
SCL
47KΩ
SDRAM U0 ~ U8
RAS#
SDRAM U0 ~ U8
CAS#
SDRAM U0 ~ U8
WE#
SDRAM U0 ~ U8
·
SDA
·
CLK0/2
U1/U4
·
U6/U8
·
U2
3.3 pF *1
10 Ω
U0/U3
U5/U7
10Ω
SDRAM U0 ~ U8
DQn
WP
A0 A1 A2
SA0 SA1 SA2
A0 ~ A11, BA0 & 1
CKE0
U8
*1 : For 4 loads, CLK2 only.
Every DQpin of SDRAM
10Ω
VDD
·
·
VSS
·
·
CLK1/3
One 0.1uF and one 0.22 uF Cap.
To all SDRAMs
per each SDRAM
May 2004
Rev. 2
2
10 pF
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
W3DG7217V-D2
PRELIMINARY
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Units
Voltage on any pin relative to VSS
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VCC supply relative to VSS
VCC, VCCQ
-1.0 ~ 4.6
V
TSTG
-55 ~ +150
°C
Storage Temperature
Power Dissipation
PD
9
W
Short Circuit Current
IOS
50
mA
Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Voltage Referenced to: VSS = 0V, 0°C ≤ TA ≤ 70°
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply Voltage
VCC
3.0
3.3
3.6
V
Input High Voltage
VIH
2.0
3.0
VCCQ+0.3
V
1
Input Low Voltage
VIL
-0.3
—
0.8
V
2
Output High Voltage
VOH
2.4
—
—
V
IOH= -2mA
Output Low Voltage
VOL
—
—
0.4
V
IOL= -2mA
Input Leakage Current
ILI
-10
—
10
μA
3
Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns.
2. VIL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns.
3. Any input 0V ≤ VIN ≤ VCCQ
Input leakage currents include Hi-Z output leakage for all bi-directional buffers
with Tri-State outputs.
CAPACITANCE
TA = 25 °C, f = 1MHz, VCC = 3.3V, VREF = 1.4V ± 200mV
Parameter
Symbol
Max
Unit
Input Capacitance (A0-A11)
CIN1
40
pF
Input Capacitance (RAS#,CAS#,WE#)
CIN2
40
pF
Input Capacitance (CKE0)
CIN3
40
pF
Input Capacitance (CLK0)
CIN4
35
pF
Input Capacitance (CS0#,CS2#)
CIN5
24
pF
Input Capacitance (DQM0-DQM7)
CIN6
7
pF
Input Capacitance (BA0-BA1)
CIN7
40
pF
Data input/output capacitance (DQ0-DQ63)
COUT
9
pF
Data input/output capacitance (CB0-CB7)
COUT1
9
pF
May 2004
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
W3DG7217V-D2
PRELIMINARY
OPERATING CURRENT CHARACTERISTICS
VCC = 3.3V, 0°C ≤ TA ≤ 70°C
Parameters
Symbol
Conditions
Versions
133/100
Operating Current
(One bank active)
Precharge Standby Current
in Power Down Mode
Precharge Standby Current
in Non-Power Down Mode
Active standby current in
power-down mode
Active standby in current non powerdown mode
Units
Note
1
ICC1
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0mA
810
mA
ICC2P
CKE ≤ VIL(max), tCC = 10ns
20
mA
ICC2PS
CKE & CLK ≤ VIL(max), tCC = ∞
20
mA
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
Input signals are charged one time during 20
180
mA
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC= ∞
Input signals are stable
90
mA
ICC3P
CKE ≥ VIL(max), tCC = 10ns
50
mA
ICC3PS
CKE & CLK ≤ VIL(max), tCC = ∞
50
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are charged one time during 20ns
270
mA
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
input signals are stable
225
mA
990
mA
1
1,800
mA
2
20
mA
Operating current (Burst mode)
ICC4
Io = mA
Page burst
4 Banks activated
tCCD = 2CLK
Refresh current
ICC5
tRC ≥ tRC(min)
Self refresh current
ICC6
CKE ≤ 0.2V
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VCC/VSSQ)
May 2004
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
W3DG7217V-D2
PRELIMINARY
ORDERING INFORMATION
Part Number
Speed
CAS Latency
Height*
W3DG7217V10D2
100MHz
CL=2
30.48 (1.20")
W3DG7217V7D2
133MHz
CL=2
30.48 (1.20")
W3DG7217V75D2
133MHz
CL=3
30.48 (1.20")
PACKAGE DIMENSIONS
133.48
(5.255) MAX.
3.05
(0.120)
MAX.
3.99
(0.157)
(2X)
17.78
(0.700)
11.43
(0.450)
8.88
(0.350)
24.49
(0.964)
1.98
(0.078)
(2X)
36.83
(1.450)
6.35
(0.250)
3.18
(0.125)
54.61
(2.150)
1.27
(0.050) TYP.
30.48
(1.20)
MAX.
3.99
(0.157)
MIN.
1.27 ± 0.10
(0.050 ± 0.004)
42.19
(1.661)
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES)
May 2004
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
W3DG7217V-D2
PRELIMINARY
Document Title
128MB - 16Mx72 SDRAM UNBUFFERED
Revision History
Rev #
History
Release Date
Status
Rev 0
Created Datasheet
11-1-01
Advanced
1.1 Corrected block diagram
1-16-02
Advanced
4-30-04
Preliminary
Rev 1
1.2 Add "Part Number" to order info table
Rev 2
2.1 Removed "ED" for Part Marking
2.2 Changed from advanced to preliminary
May 2004
Rev. 2
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com