19-1839; Rev 4; 4/07 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits The MAX6381–MAX6390 microprocessor (µP) supervisory circuits monitor power-supply voltages from +1.8V to +5.0V while consuming only 3µA of supply current at +1.8V. Whenever VCC falls below the factory-set reset thresholds, the reset output asserts and remains asserted for a minimum reset timeout period after VCC rises above the reset threshold. Reset thresholds are available from +1.58V to +4.63V, in approximately 100mV increments. Seven minimum reset timeout delays ranging from 1ms to 1200ms are available. The MAX6381/MAX6384/MAX6387 have a push-pull active-low reset output. The MAX6382/MAX6385/ MAX6388 have a push-pull active-high reset output, and the MAX6383/MAX6386/MAX6389/MAX6390 have an open-drain active-low reset output. The MAX6384/MAX6385/MAX6386 also feature a debounced manual reset input (with internal pullup resistor). The MAX6387/MAX6388/MAX6389 have an auxiliary input for monitoring a second voltage. The MAX6390 offers a manual reset input with a longer VCC reset timeout period (1120ms or 1200ms) and a shorter manual reset timeout (140ms or 150ms). The MAX6381/MAX6382/MAX6383 are available in 3-pin SC70 and 6-pin µDFN packages and the MAX6384–MAX6390 are available in 4-pin SC70 and 6-pin µDFN packages. Applications Computers Critical µP and µC Power Monitoring Controllers Dual Voltage Systems Pin Configurations TOP VIEW GND N.C. VCC 6 5 4 GND 1 RESET (RESET) 2 SC70 ( ) IS FOR MAX6382 3 ♦ Factory-Set Reset Threshold Voltages Ranging from +1.58V to +4.63V in Approximately 100mV Increments ♦ ±2.5% Reset Threshold Accuracy Over Temperature (-40°C to +125°C) ♦ Seven Reset Timeout Periods Available: 1ms, 20ms, 140ms, 280ms, 560ms, 1120ms, 1200ms (min) ♦ 3 Reset Output Options Active-Low Push-Pull Active-High Push-Pull Active-Low Open-Drain ♦ Reset Output State Guaranteed Valid Down to VCC = 1V ♦ Manual Reset Input (MAX6384/MAX6385/MAX6386) ♦ Auxiliary RESET IN (MAX6387/MAX6388/MAX6389) ♦ VCC Reset Timeout (1120ms or 1200ms)/Manual Reset Timeout (140ms or 150ms) (MAX6390) ♦ Negative-Going VCC Transient Immunity ♦ Low Power Consumption of 6µA at +3.6V and 3µA at +1.8V ♦ Pin Compatible with MAX809/MAX810/MAX803/MAX6326/MAX6327/ MAX6328/MAX6346/MAX6347/MAX6348, and MAX6711/MAX6712/MAX6713 ♦ Tiny 3-Pin/4-Pin SC70 and 6-Pin µDFN Packages Portable/BatteryPowered Equipment Intelligent Instruments MAX6381 MAX6382 MAX6383 Features MAX6381 MAX6382 MAX6383 VCC 1 2 3 RESET (RESET) N.C. N.C µDFN Pin Configurations continued at end of data sheet. Ordering Information PART TEMP RANGE PINPACKAGE PKG CODE L611-1 MAX6381LT_ _D_+T -40°C to +125°C 6 µDFN-6 MAX6381XR_ _D_+T -40°C to +125°C 3 SC70-3 X3-2 MAX6382LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6382XR_ _D_+T -40°C to +125°C 3 SC70-3 X3-2 Note: Insert reset threshold suffix (see Reset Threshold table) after "XR", "XS", or "LT." Insert reset timeout delay (see Reset Timeout Delay table) after "D" to complete the part number. Sample stock is generally held on standard versions only (see Standard Versions table). Standard versions have an order increment requirement of 2500 pieces. Nonstandard versions have an order increment requirement of 10,000 pieces. Contact factory for availability of nonstandard versions. +Denotes a lead-free package. Ordering Information continued at end of data sheet. Typical Operating Circuit appears at end of data sheet. Selector Guide appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6381–MAX6390 General Description MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits ABSOLUTE MAXIMUM RATINGS VCC to GND ..........................................................-0.3V to +6.0V RESET Open-Drain Output....................................-0.3V to +6.0V RESET, RESET (push-pull output) ..............-0.3V to (VCC + 0.3V) MR, RESET IN.............................................-0.3V to (VCC + 0.3V) Input Current (VCC) .............................................................20mA Output Current (all pins) .....................................................20mA Continuous Power Dissipation (TA = +70°C) 3-Pin SC70 (derate 2.9mW/°C above +70°C) ..............235mW 4-Pin SC70 (derate 3.1mW/°C above +70°C) ..............245mW 6-Pin µDFN (derate 2.1mW/°C above +70°C) ..........167.7mW Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = full range, TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range VCC Supply Current VCC Reset Threshold (See Reset Thresholds table) Reset Threshold Tempco SYMBOL ICC 1.0 11 VCC = 2.5V, no load 4 7 VCC = 1.8V, no load 3 6 VTH VTH + 1.5% VTH VTH + 2.5% TA = +25°C VTH 1.5% TA = -40°C to +125°C VTH 2.5% µA V 60 ppm/°C 35 µs D1 1 2 D2 20 40 D3 140 280 D5 280 560 D6 560 1120 D4 1120 2240 D7 1200 2400 140 280 tRP D4 D7 150 300 D4 1120 2240 D7 1200 2400 VTH < 4V VIH VTH > 4V ms ms 0.3 x VCC VIL 2 V 6 VCC falling at 10mV/µs from VTH + 100mV to VTH - 100mV VIL 5.5 VCC = 3.6V, no load ∆VTH/°C VIH UNITS 13 VCC timeout period MR Input Voltage MAX 7 VTH tRP TYP VCC = 5.5V, no load MR timeout period Reset Timeout Period MAX6390 MIN VCC VCC to Reset Delay Reset Timeout Period MAX6381–MAX6389 (See Reset Timeout table) CONDITIONS 0.7 x VCC V 0.8 2.4 _______________________________________________________________________________________ SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits (VCC = full range, TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MR Minimum Input Pulse Width MIN TYP MAX 1 UNITS µs MR Glitch Rejection 100 ns MR to Reset Delay 200 ns MR Internal Pullup Resistance RESET IN Input Threshold VTHRST Open-Drain RESET Output Voltage Open-Drain RESET Output Leakage Current 32 63 100 kΩ 500 1560 3000 Ω TA = +25°C 1.245 1.27 1.295 TA = 0°C to +85°C 1.232 1.308 TA = -40°C to +125°C 1.219 1.321 VRESETIN falling at 4mV/µs from VTHRST + 40mV to VTHRST - 40mV RESET IN to RESET Delay RESET IN Input Leakage Current MAX6381–MAX6389 MAX6390 IRESET IN 4.5 -50 VCC ≥ 4.5V, ISINK = 3.2mA, reset asserted VOL ILKG VOL VOH +50 VCC ≥ 2.5V, ISINK = 1.2mA, reset asserted 0.3 VCC ≥ 1.0V, ISINK = 80µA, reset asserted 0.3 VCC > VTH, RESET not asserted 1.0 VCC ≥ 4.5V, ISINK = 3.2mA, reset asserted 0.4 VCC ≥ 2.5V, ISINK = 1.2mA, reset asserted 0.3 0.8 x VCC VCC ≥ 2.5V, ISOURCE = 500µA, reset not asserted 0.8 x VCC VCC ≥ 4.5V, ISOURCE = 800µA, reset asserted 0.8 x VCC VCC ≥ 2.5V, ISOURCE = 500µA, reset asserted 0.8 x VCC VCC ≥ 1.8V, ISOURCE = 150µA, reset asserted 0.8 x VCC VCC ≥ 1.0V, ISOURCE = 1µA, reset asserted 0.8 x VCC Push-Pull RESET Output Voltage nA V µA 0.3 VCC ≥ 4.5V, ISOURCE = 800µA, reset not asserted VOH VOL µs 0.4 VCC ≥ 1.0V, ISINK = 80µA, reset asserted Push-Pull RESET Output Voltage ±1 V V V VCC ≥ 4.5V, ISINK = 3.2mA, reset not asserted 0.4 VCC ≥ 2.5V, ISINK = 1.2mA, reset not asserted 0.3 Note 1: Specifications over temperature are guaranteed by design, not production tested. _______________________________________________________________________________________ 3 MAX6381–MAX6390 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) VCC = +5.5V 6 VCC = +3.6V 5 4 3 VCC = +2.5V VCC = +1.8V 2 VCC = +3V 39 37 35 VCC = +1.8V 33 31 29 1 27 0 1.06 1.04 1.02 1.00 0.98 0.96 0.94 25 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) NORMALIZED RESET THRESHOLD vs. TEMPERATURE OUTPUT-VOLTAGE LOW vs. SINK CURRENT OUTPUT-VOLTAGE HIGH vs. SOURCE CURRENT MAX6381/90 toc04 1.2 1.015 1.010 3.0 1.0 VCC = +2.5V 2.5 2.0 VOL (V) 1.000 0.995 VOH (V) 0.8 1.005 0.6 VCC = +3.0V 1.5 1.0 0.4 VCC = +1.8V 0.990 VCC = +4.5V 0.2 0.985 0.990 -40 -25 -10 5 20 35 50 65 80 95 110 125 0 0 3 6 9 12 250 500 RESET IN TO RESET DELAY vs. TEMPERATURE 5.5 5.3 5.1 RESET IN DELAY (µs) 400 1000 350 RESET ASSERTED ABOVE THIS LINE 200 150 MAX6381/90 toc08 450 750 ISOURCE (µA) MAX6381/90 toc07 500 MAXIMUM TRANSIENT DURATION (µs) 0 ISINK (mA) MAXIMUM TRANSIENT DURATION vs. RESET COMPARATOR OVERDRIVE 250 0.5 0 TEMPERATURE (°C) 300 4.9 4.7 4.5 4.3 4.1 100 3.9 50 3.7 3.5 0 1 10 100 MAX6381/90 toc06 -40 -25 -10 5 20 35 50 65 80 95 110 125 1.020 1000 RESET COMPARATOR OVERDRIVE, VTH - VCC (mV) 4 1.08 MAX6381/90 toc03 41 MAX6381/90 toc02 7 43 MAX6381/90 toc05 SUPPLY CURRENT (µA) 8 POWER-DOWN RESET DELAY (µs) MAX6381/90 toc01 9 NORMALIZED POWER-UP RESET TIMEOUT vs. TEMPERATURE POWER-DOWN RESET DELAY vs. TEMPERATURE NORMALIZED RESET TIMEOUT PERIOD SUPPLY CURRENT vs. TEMPERATURE (NO LOAD) NORMALIZED RESET THRESHOLD MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) ______________________________________________________________________________________ 1250 1500 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits PIN 3-PIN SC70 µDFN 1 (MAX6382/ MAX6385/ MAX6388) 1 (MAX6381/ MAX6383/ MAX6384/ MAX6386/ MAX6387/ MAX6390) 2, 3, 5 (MAX6381/ MAX6382/ MAX6383) 4-PIN SC70 MAX6384/ MAX6381/ MAX6387/ MAX6382 MAX6386/ MAX6385 MAX6388 MAX689 MAX6383 MAX6390 NAME Active-High Push-Pull Reset Output. RESET changes from low to high when any monitored voltage (VCC or VRESETIN) drops below the reset threshold or MR is pulled low. RESET remains high for the reset timeout period after monitored voltages exceed the reset thresholds or MR is released. Active-Low Open-Drain/Push-Pull Reset Output. RESET changes from high to low when any monitored voltage (VCC or VRESETIN) drops below the reset threshold or MR is pulled low. RESET remains low for the reset timeout period after the monitored voltages exceed the reset thresholds or MR is released. Open-drain requires an external pullup resistor. 2 — 2 — 2 RESET 2 — 2 — 2 — RESET — — — — — — N.C. No Connection. Not Internally connected. MR Active-Low Manual Reset Input. Drive low to force a reset. Reset remains active as long as MR is low and for the reset timeout period after MR is released. Leave unconnected or connect to VCC if unused. MR has an internal 63kΩ (1.56kΩ for MAX6390) pullup resistor to VCC. 2, 5 (MAX6384– MAX6390) 3 (MAX6384/ MAX6385/ MAX6386/ MAX6390) FUNCTION — — 3 3 — — 3 (MAX6387/ MAX6388/ MAX6389) — — — — 3 3 RESET IN Auxiliary Reset Input. High-impedance input to the auxiliary reset comparator. Connect RESET IN to the center point of an external resistor voltage-divider network to set the reset threshold voltage. Reset asserts when either VCC or RESET IN falls below its threshold voltage. 4 (MAX6381– MAX6390) 3 3 4 4 4 4 VCC Supply Voltage for the device and input for fixed VCC reset threshold monitor. 6 (MAX6381– MAX6390) 1 1 1 1 1 1 GND Ground _______________________________________________________________________________________ 5 MAX6381–MAX6390 Pin Description MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits Detailed Description RESET Output A µP reset input starts the µP in a known state. These µP supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. Reset asserts when VCC is below the reset threshold; once VCC exceeds the reset threshold, an internal timer keeps the reset output asserted for the reset timeout period. After this interval, reset output deasserts. Reset output is guaranteed to be in the correct logic state for VCC ≥ 1V. Manual Reset Input (MAX6384/ MAX6385/MAX6386/MAX6390) Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR asserts reset. Reset remains asserted while MR is low, and for the reset active timeout period (tRP) after MR returns high. This input has an internal 63kΩ pullup resistor (1.56kΩ for MAX6390), so it can be left unconnected if it is not used. MR can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual-reset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connecting a 0.1µF capacitor from MR to GND provides additional noise immunity. RESET IN Comparator (MAX6387/MAX6388/MAX6389) RESET IN is compared to an internal +1.27V reference. If the voltage at RESET IN is less than 1.27V, reset asserts. Use the RESET IN comparator as a useradjustable reset detector or as a secondary power-supply monitor by implementing a resistor-divider at RESET IN (shown in Figure 1). Reset asserts when either VCC or RESET IN falls below its respective threshold voltage. Use the following equation to set the threshold: VINTH = VTHRST (R1/R2 + 1) where VTHRST = +1.27V. To simplify the resistor selection, choose a value of R2 and calculate R1: R1 = R2 [(VINTH/VTHRST) - 1] Since the input current at RESET IN is 50nA (max), large values can be used for R2 with no significant loss in accuracy. 6 Reset Thresholds (-40°C to +125°C) SUFFIX VTH (min) VTH (nom) VTH (max) 46 4.51 4.63 4.74 45 4.39 4.50 4.61 44 4.27 4.38 4.48 43 4.19 4.30 4.41 42 4.10 4.20 4.31 41 4.00 4.10 4.20 40 3.90 4.00 4.10 39 3.80 3.90 4.00 38 3.71 3.80 3.90 37 3.61 3.70 3.79 36 3.51 3.60 3.69 35 3.41 3.50 3.59 34 3.32 3.40 3.49 33 3.22 3.30 3.38 32 3.12 3.20 3.28 31 3.00 3.08 3.15 30 2.93 3.00 3.08 29 2.85 2.93 3.00 28 2.73 2.80 2.87 27 2.63 2.70 2.77 26 2.56 2.63 2.69 25 2.44 2.50 2.56 24 2.34 2.40 2.46 23 2.26 2.31 2.37 22 2.13 2.19 2.24 21 2.05 2.10 2.15 20 1.95 2.00 2.05 19 1.85 1.90 1.95 18 1.76 1.80 1.85 17 1.62 1.67 1.71 16 1.54 1.58 1.61 ___________Applications Information Negative-Going VCC Transients In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, the MAX6381–MAX6390 are relatively immune to short duration negative-going VCC transients (glitches). The Typical Operating Characteristics section shows the Maximum Transient Durations vs. Reset Comparator Overdrive, for which the MAX6381–MAX6390 do not generate a reset pulse. This graph was generated using _______________________________________________________________________________________ SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits VCC MAX6387 MAX6388 MAX6389 MAX6381 MAX6384 MAX6387 VIN R1 RESET (RESET) RESET IN R2 RESET GND R1 100k GND ( ) IS FOR MAX6388 Figure 1. RESET IN Configuration Figure 2. RESET Valid to VCC = Ground Circuit Reset Timeout Delay SUFFIX MIN D1 1ms D2 20ms D3 140ms D5 280ms D6 560ms D4 1120ms D7 1200ms MAX6390_ _D4 1120/140ms* MAX6390_ _D7 1200/150ms* does not work with the open-drain outputs of the MAX6383/MAX6386/MAX6389/MAX6390. The resistor value used is not critical, but it must be small enough not to load the reset output when VCC is above the reset threshold. For most applications, 100kΩ is adequate. Standard Versions PART *The MAX6390 has a 1120ms or 1200ms RESET timeout and a 140ms or 150ms manual reset timeout. a negative-going pulse applied to VCC, starting above the actual reset threshold and ending below it by the magnitude indicated (reset comparator overdrive). The graph indicates the typical maximum pulse width a negative-going VCC transient may have without causing a reset pulse to be issued. As the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable pulse width decreases. A 0.1µF capacitor mounted as close as possible to VCC provides additional transient immunity. RESET TIMEOUT 46 44 31 29 MAX638_ 26 D3 23 22 17 16 46 Ensuring a Valid RESET Output Down to VCC = 0V The MAX6381–MAX6390 are guaranteed to operate properly down to VCC = 1V. In applications that require valid reset levels down to VCC = 0V, a pulldown resistor to active-low outputs (push/pull only, Figure 2) and a pullup resistor to active-high outputs (push/pull only) will ensure that the reset line is valid while the reset output can no longer sink or source current. This scheme RESET THRESHOLD 44 31 29 MAX6390 26 D4 23 22 17 16 _______________________________________________________________________________________ 7 MAX6381–MAX6390 VCC MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits Selector Guide PART NUMBER PUSH-PULL ACTIVE-LOW MAX6381 X PUSH-PULL ACTIVE-HIGH MAX6382 OPEN-DRAIN ACTIVE-LOW MANUAL RESET INPUT MR RESET IN X MAX6383 X MAX6384 X X MAX6385 X X MAX6386 X X MAX6390* X X MAX6387 X X MAX6388 X MAX6389 X X X *The MAX6390 offers a VCC reset timeout of 1120ms or 1200ms (min) and a manual reset timeout of 140ms or 150ms (min). Typical Operating Circuit I/O SUPPLY Ordering Information (continued) PART TEMP RANGE VCORE R1 RESET IN ** MAX6383LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 3 SC70-3 X3-2 CORE I/O VOLTAGE VOLTAGE MAX6384LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6384XS_ _D_+T -40°C to +125°C 4 SC70-4 X4-1 µP MAX6385LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6385XS_ _D_+T -40°C to +125°C 4 SC70-4 X4-1 MAX6386LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6386XS_ _D_+T -40°C to +125°C 4 SC70-4 X4-1 MAX6387LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6387XS_ _D_+T -40°C to +125°C 4 SC70-4 X4-1 MAX6388LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6388XS_ _D_+T -40°C to +125°C 4 SC70-4 X4-1 MAX6389LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6389XS_ _D_+T -40°C to +125°C 4 SC70-4 X4-1 MAX6390LT_ _D_+T -40°C to +125°C 6 µDFN-6 L611-1 MAX6390XS_ _D_+T* -40°C to +125°C 4 SC70-4 X4-1 MAX6381–MAX6390 RESET (RESET) MR * PKG CODE MAX6383XR_ _D_+T -40°C to +125°C VCC R1 PINPACKAGE RESET INPUT GND GND PUSHBUTTON SWITCH *MR is for MAX6384/MAX6385/MAX6386/MAX6390 **RESET IN is for MAX6387/MAX6388/MAX6389 ( ) are for MAX6382/MAX6385/MAX6388 Note: Insert reset threshold suffix (see Reset Threshold table) after "XR", "XS", or "LT." Insert reset timeout delay (see Reset Timeout Delay table) after "D" to complete the part number. Sample stock is generally held on standard versions only (see Standard Versions table). Standard versions have an order increment requirement of 2500 pieces. Nonstandard versions have an order increment requirement of 10,000 pieces. Contact factory for availability of nonstandard versions. *MAX6390 is available with D4 or D7 timing only. +Denotes a lead-free package. 8 _______________________________________________________________________________________ SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits TOP VIEW GND 1 GND N.C. VCC 6 5 4 4 VCC MAX6384 MAX6385 MAX6386 MAX6390 MAX6384 MAX6385 MAX6386 MAX6390 RESET (RESET) 1 2 3 RESET (RESET) MR 1 4 VCC GND N.C. VCC 6 5 4 MAX6387 MAX6388 MAX6389 1 2 3 2 3 N.C. RESET IN RESET IN RESET (RESET) SC70 ( ) IS FOR MAX6388 N.C. ( ) IS FOR MAX6385 MAX6387 MAX6388 MAX6389 RESET (RESET) 3 µDFN SC70 ( ) IS FOR MAX6385 GND 2 MR µDFN ( ) IS FOR MAX6388 Chip Information TRANSISTOR COUNT: 647 PROCESS: BiCMOS _______________________________________________________________________________________ 9 MAX6381–MAX6390 Pin Configurations (continued) Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) SC70, 4L.EPS MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits PACKAGE OUTLINE, 4L SC70 21-0098 10 ______________________________________________________________________________________ E 1 1 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits SC70, 3L.EPS PACKAGE OUTLINE, 3L SC70 21-0075 C 1 1 ______________________________________________________________________________________ 11 MAX6381–MAX6390 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) TOPMARK 3 2 5 e A 4 b 5 4 AA PIN 1 MARK 6L UDFN.EPS MAX6381–MAX6390 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits 6 PIN 1 0.075x45∞ L E 1 A2 D A1 TOP VIEW 3 2 A L1 A 1 L2 BOTTOM VIEW SIDE VIEW COMMON DIMENSIONS b SECTION A-A MIN. 0.65 -0.00 1.45 0.95 0.30 0.00 0.05 0.17 A A1 A2 D E L L1 L2 b e Pkg. Code NOM. 0.72 0.20 -1.50 1.00 0.35 --0.20 0.50 BSC. MAX. 0.80 -0.05 1.55 1.05 0.40 0.08 0.10 0.23 L611-1, L611-2 TITLE: PACKAGE OUTLINE, 6L uDFN, 1.5x1.0x0.8mm APPROVAL -DRAWING NOT TO SCALE- 12 DOCUMENT CONTROL NO. 21-0147 ______________________________________________________________________________________ REV. E 1 2 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits Translation Table for Calendar Year Code TABLE 1 Calendar Year Legend: 2005 2006 Marked with bar 2007 2008 2009 2010 2011 2012 2013 42-47 48-51 52-05 2014 Blank space - no bar required Translation Table for Payweek Binary Coding TABLE 2 Payweek Legend: 06-11 12-17 Marked with bar 18-23 24-29 30-35 36-41 Blank space - no bar required TITLE: PACKAGE OUTLINE, 6L uDFN, 1.5x1.0x0.8mm APPROVAL DOCUMENT CONTROL NO. 21-0147 -DRAWING NOT TO SCALE- REV. E 2 2 Revision History Pages changed at Rev 4: Title on all pages, 1, 2, 5, 7–13 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX6381–MAX6390 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)