19-4047; Rev 4; 12/11 KIT ATION EVALU E L B A IL AVA Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection The MAX16826 high-brightness LED (HB LED) driver is designed for backlighting automotive LCD displays and other display applications such as industrial or desktop monitors and LCD televisions. The MAX16826 integrates a switching regulator controller, a 4-channel linear current sink driver, an analog-to-digital converter (ADC), and an I2C interface. The IC is designed to withstand automotive load dump transients up to 40V and can operate under cold crank conditions. The MAX16826 contains a current-mode PWM switching regulator controller that regulates the output voltage to the LED array. The switching regulator section is configurable as a boost or SEPIC converter and its switching frequency is programmable from 100kHz to 1MHz. The MAX16826 includes 4 channels of programmable, fault-protected, constant-current sink driver controllers that are able to drive all white, RGB, or RGB plus amber LED configurations. LED dimming control for each channel is implemented by direct PWM signals for each of the four linear current sinks. An internal ADC measures the drain voltage of the external driver transistors and the output of the switching regulator. These measurements are then made available through the I2C interface to an external microcontroller (μC) to enable output voltage optimization and fault monitoring of the LEDs. The amplitude of the LED current in each linear currentsink channel and the switch-mode regulator output voltage is programmed using the I2C interface. Additional features include: cycle-by-cycle current limit, shorted LED string protection, and overtemperature protection. The MAX16826 is available in a thermally enhanced, 5mm x 5mm, 32-pin thin QFN package and is specified over the automotive -40°C to +125°C temperature range. Features o External MOSFETs Allow Wide-Range LED Current with Multiple LEDs per String o Individual PWM Dimming Inputs per String o Very Wide Dimming Range o LED String Short and Open Protection o Adjustable LED Current Rise/Fall Times Improve EMI Control o Microcontroller Interface Using I2C Allows LED Voltage Monitoring and Optimization Using a 7-Bit Internal ADC LED Short and Open Detection Dynamic Adjustment of LED String Currents and Output Voltage Standby Mode o Integrated Boost/SEPIC Controller o External Switching Frequency Synchronization o 4.75V to 24V Operating Voltage Range and Withstands 40V Load Dump o Overvoltage and Overtemperature Protection Ordering Information TEMP RANGE PIN-PACKAGE MAX16826ATJ+ PART -40°C to +125°C 32 TQFN-EP* MAX16826ATJ/V+ -40°C to +125°C 32 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. /V denotes an automotive qualified part. Ordering Information continued at end of data sheet. Simplified Diagram VIN Applications LCD Backlighting: Automotive Infotainment Displays Automotive Cluster Displays Industrial and Desktop Monitors LCD TVs Automotive Lighting: Adaptive Front Lighting Low- and High-Beam Assemblies IN DIM1 DIM2 DIM3 DIM4 DL CS FB DR4 DIMMING INPUTS DR1 DL1 CS1 MAX16826 SDA I2C SCL INTERFACE Typical Application Circuit and Pin Configuration appear at end of data sheet. GND DL4 CS4 BOOST LED DRIVER ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX16826 General Description MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection ABSOLUTE MAXIMUM RATINGS IN to GND (Continuous) .........................................-0.3V to +30V IN Peak Current (≤ 400ms) ...............................................300mA IN Continuous Current ........................................................50mA PGND to GND .......................................................-0.3V to +0.3V All Other Pins to GND...............................................-0.3V to +6V DL Peak Current (< 100ns)....................................................±3A DL Continuous Current .....................................................±50mA DL1, DL2, DL3, DL4 Peak Current ..................................±50mA DL1, DL2, DL3, DL4 Continuous Current ........................±20mA VCC Continuous Current .....................................................50mA All Other Pins Current .......................................................±20mA Continuous Power Dissipation (TA = +70°C) 32-Pin Thin QFN (derate 34.5mW/°C above +70°C) Multilayer Board ..........................................................2759mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) ........…………………+300°C Soldering Temperature (reflow) .......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, CDL_ = 0.01μF, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS Power-Supply Voltage VIN VSYNC = 3V Quiescent Current IIN DL_ = unconnected; R19, C33 = open MIN TYP 4.75 MAX UNITS 24 V 5 10 mA 75 Shutdown Current IIN,SD VSYNC = 0V 20 Standby Current IIN,SB I2C standby activated 3 μA mA I2C-COMPATIBLE I/O (SCL, SDA) Input High Voltage VIH Input Low Voltage VIL Input Hysteresis 1.5 V 0.5 VHYS 25 V mV Input High Leakage Current IIH VLOGIC = 5V -1 +1 Input Low Leakage Current IIL VLOGIC = 0V -1 +1 10 μA μA Input Capacitance CIN pF Output Low Voltage VOL IOL = 3mA 0.4 V Output High Current IOH VOH = 5V 1 μA 400 kHz I2C-COMPATIBLE TIMING Serial Clock (SCL) Frequency fSCL BUS Free Time Between STOP and START Conditions tBUF 1.3 μs START Condition Hold Time tHD:STA 0.6 μs STOP Condition Setup Time tSU:STO 0.6 μs tLOW 1.3 μs Clock Low Period Clock High Period Data Setup Time Data In Hold Time Data Out Hold Time 2 tHIGH 0.6 μs tSU:DAT 0.3 μs tHD:DATIN 0.03 tHD:DATOUT 0.3 _______________________________________________________________________________________ 0.9 μs μs Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection (VIN = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, CDL_ = 0.01μF, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL Maximum Receive SCL/SDA Rise Time CONDITIONS MIN TYP tR CB = 400pF 300 ns Minimum Receive SCL/SDA Rise Time tR CB = 400pF 60 ns Maximum Receive SCL/SDA Fall Time tF CB = 400pF 300 ns Minimum Receive SCL/SDA Fall Time tF CB = 400pF 60 ns Transmit SDA Fall Time tF CB = 400pF, IO = 3mA Pulse Width of Suppressed Spike tSP 60 MAX 250 50 UNITS ns ns INTERNAL REGULATORS (IN, VCC) VCC Output Voltage VVCC VCC Undervoltage Lockout VVCC_UVLO VCC Undervoltage Lockout Hysteresis VVCC_HYS IN Shunt Regulation Voltage 0V < IVCC < 30mA (Note 2), 4.75V < VIN < 24V, DL, DL1 to DL4 unconnected 4.5 5.25 VCC rising IIN = 250mA 5.65 V 4.5 V 135 175 205 mV 24.05 26.0 27.5 V PWM GATE DRIVER (DL) Peak Source Current 2 A Peak Sink Current 2 A Ω DL High-Side Driver Resistance IDL = -100mA 2.25 DL Low-Side Driver Resistance IDL = +100mA 1.30 Ω 40 ns Minimum DL Pulse Width PWM CONTROLLER, SOFT-START (FB, COMP, OVP) FB Voltage Maximum VFB,MAX FB Voltage Minimum VFB,MIN FB Voltage LSB FB Input Bias Current IFB Feedback-Voltage Line Regulation Soft-Start Current Slope Compensation 1.230 1.250 1.260 FB shorted to COMP; MAX16826B only 1.23 1.25 1.27 FB shorted to COMP; MAX16826 only 862 876 885 FB shorted to COMP; MAX16826B only 735 750 765 FB shorted to COMP; MAX16826 only 2.94 FB shorted to COMP; MAX16826B only 3.9 0V < VFB < 5.5V -100 0 IOVP ISLOPE VCSS = 0.5VVCC 0V < VOVP < 5.5V V mV mV +100 nA ±0.25 %/V 6.0 10.4 μA -100 0 +100 nA 19 26 32 μA/μs Level to produce VCOMP = 1.25V, 4.5V < VVCC < 5.5V ISS OVP Input Bias Current FB shorted to COMP; MAX16826 only 3.2 _______________________________________________________________________________________ 3 MAX16826 ELECTRICAL CHARACTERISTICS (continued) MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, CDL_ = 0.01μF, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ERROR AMPLIFIER (FB, COMP) Open-Loop Gain AOL 80 dB Unity-Gain Bandwidth BW 2 MHz Phase Margin PM 65 Degrees Error-Amplifier Output Current ICOMP COMP Clamp Voltage VCOMP COMP Short-Circuit Current Sourcing, VCOMP = 3V 1.9 Sinking, VCOMP = 2V 0.9 VFB = 0V 3.25 ICOMP_SC mA 4.5 12 V mA PWM CURRENT LIMIT (CS) Cycle-by-Cycle Current-Limit Threshold VCL Cycle-by-Cycle Current-Limit Propagation Time To DL tPROP, CL Gross Current-Limit Threshold VGCL Gross Current-Limit Propagation Time To DL tPROP,GCL Input Bias Current VDL = 0V 187 10mV overdrive VCSS = 0V 200 217 80 250 10mV overdrive 270 mV ns 280 80 mV ns 0V < VCS < 5.5V -100 0 +100 nA VRAMP 5.5V < VIN < 24V 1.60 1.65 1.80 V VRAMP_VALLEY 5.5V < VIN < 24V 1.11 1.20 1.27 V 8.4 PWM OSCILLATOR (RTCT) RTCT Voltage Ramp (Peak to Peak) RTCT Voltage Ramp Valley Discharge Current IDIS VRTCT = 2V 7.8 9.1 mA Frequency Range fOSC 5.5V < VIN < 24V 100 1000 kHz 200 ns Input Frequency Range 100 1000 kHz Input High Voltage 1.5 SYNCHRONIZATION (SYNC/ENABLE) Input Rise/Fall Time V Input Low Voltage 0.5 Input Minimum Pulse Width 200 Input Bias Current 0V < VSYNC < 5.5V Delay to Shutdown VSYNC = 0V V ns -100 0 +100 nA 13 32 65 μs LED DIMMING (DIM1–DIM4) Input High Voltage VDIM,MAX Input Low Voltage VDIM,MIN 1.5 0.5 Minimum Dimming Frequency fDIM tON = 2μs (Note 3) 45 Input Bias Current IDIM 0V < VDIM_ < 5.5V -100 4 V V Hz 0 _______________________________________________________________________________________ +100 nA Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection (VIN = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, CDL_ = 0.01μF, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ±50 mV ADC (DR1–DR4, OVP) Maximum Error EMAX ADC Single Bit Acquisition Latency (Note 4) 2 μs DR Channel Sample Time tDR,SMPL 190 ms OVP Channel Sample Time tOVP,SMPL 20 μs Full-Scale Input Voltage Least Significant Bit VFS 1.215 VLSB DR Input Bias Current IDR 1.24 1.2550 9.76 0V < VDR_ < 5.5V V mV -100 0 +100 nA 1.4 1.52 1.63 V DRAIN FAULT COMPARATORS (DR1–DR4) (Shorted LED String Comparator) Drain Fault Comparator Threshold Drain Fault Comparator Delay VDFTH tDFD Voltage to drive DL1–DL4 low 10mV overdrive 1 μs Gm ΔI = -500μA 75 mS Maximum Output Current IDL Sourcing or sinking CS1–CS4 Input Bias Current ICS 0V < VCS < 5.5V -100 0 +100 CS_ = DL_, FB DAC full scale; MAX16826 only 306 316 324 CS_ = DL_, FB DAC full scale; MAX16826B only 308 318 328 CS_ = DL_, FB DAC minus full scale; MAX16826 only 90 97 105 CS_ = DL_, FB DAC minus full scale; MAX16826B only 90 99 109 LINEAR REGULATORS (DL1–DL4, CS1–CS4) Transconductance CS1–CS4 Regulation Voltage Maximum CS1–CS4 Regulation Voltage Minimum CS1–CS4 Regulation Voltage LSB VCS,MAX VCS,MIN VCS,LSB 15 mA nA mV mV CS_ = DL_, FB DAC 1-bit transition 1.72 mV Note 1: All devices are 100% production tested at TJ = +25°C and TJ = +125°C. Limits to -40°C are guaranteed by design. Note 2: ICC includes the internal bias currents and the current used by the gate drivers to drive DL, DL1, DL2, DL3, and DL4. Note 3: Minimum frequency to allow the internal ADC to complete at least one measurement. tON is the on-time with the LED current in regulation. Note 4: Minimum LED current pulse duration, which is required to correctly acquire 1 bit. _______________________________________________________________________________________ 5 MAX16826 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VIN = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, CDL_ = 0.01μF. TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE 8 6 4 16 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 10 30 20 MAX16826 toc03 CDL = 4700pF C33 FROM 680pF TO 8200pF 12 17 MAX16826 toc02 40 MAX16826 toc01 14 SUPPLY CURRENT (mA) SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. OSCILLATOR FREQUENCY 16 10 15 14 13 2 CDL = 4700pF CDL = 4700pF 0 12 0 4 8 12 16 20 24 -40 100 200 300 400 500 600 700 800 900 1000 -15 10 35 85 60 SUPPLY VOLTAGE (V) OSCILLATOR FREQUENCY (kHz) TEMPERATURE (°C) OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE OSCILLATOR FREQUENCY vs. TEMPERATURE LED OUTPUT CURRENT vs. TEMPERATURE 340 330 320 310 360 320 280 MAX16826 toc06 OSCILLATOR FREQUENCY (kHz) 350 110 145 LED OUTPUT CURRENT (mA) 400 MAX16826 toc04 360 MAX16826 toc05 0 OSCILLATOR FREQUENCY (kHz) 143 141 139 240 137 200 135 VCS = 0.32V 300 5.5 9.2 12.9 16.6 20.3 24.0 -40 SUPPLY VOLTAGE (V) -15 10 35 85 60 TEMPERATURE (°C) 110 120 20 40 80 MAX16826 toc08 5V/div VDIM 0V 90 60 100mA/div ILED 0mA 30 0 0 6 12 18 24 2μs/div INPUT VOLTAGE (V) 6 60 DIM INPUT TO ILED OUTPUT WAVEFORM MAX16826 toc07 150 0 TEMPERATURE (°C) LED OUTPUT CURRENT vs. INPUT VOLTAGE LED OUTPUT CURRENT (mA) MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection _______________________________________________________________________________________ 100 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection VCC VOLTAGE vs. TEMPERATURE VCC VOLTAGE vs. LOAD CURRENT MAX16826 toc09 VCC VOLTAGE (V) VSYNC/EN 0V 100mA/div ILED 5.4 VCC VOLTAGE (V) 5.4 5V/div 5.5 MAX16826 toc10 5.5 5.3 5.2 MAX16826 toc11 ENABLE AND DISABLE RESPONSE 5.3 5.2 0mA 5.1 5.1 5.0 5.0 0 40ms/div 10 20 30 0 50 40 20 40 VCC VOLTAGE vs. SUPPLY VOLTAGE 100 26.5 SHUNT VOLTAGE (V) 4 3 2 1 MAX16826 toc13 27.0 MAX16826 toc12 5 VCC VOLTAGE (V) 80 SHUNT VOLTAGE vs. SHUNT CURRENT 6 26.0 25.5 25.0 24.5 0 24.0 0 4 8 12 16 24 20 0 50 100 150 200 250 SUPPLY VOLTAGE (V) SHUNT CURRENT (mA) SHUNT VOLTAGE vs. TEMPERATURE SHUNT REGULATOR LOAD DUMP RESPONSE MAX16826 toc15 MAX16826 toc14 28 27 SHUNT VOLTAGE (V) 60 TEMPERATURE (°C) LOAD CURRENT (mA) VSUPPLY 20V/div 26 0V 25 24 10V/div VSHUNT 23 0V 22 -40 -15 10 35 60 85 110 200ms/div TEMPERATURE (°C) _______________________________________________________________________________________ 7 MAX16826 Typical Operating Characteristics (continued) (VIN = 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, CDL_ = 0.01μF. TA = +25°C, unless otherwise noted.) Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection MAX16826 Pin Description PIN NAME 1 PGND Power Ground 2, 3 GND Analog Ground 4 RTCT Timing Resistor and Capacitor Connection. A resistor, R19 (in the Typical Application Circuit), from VCC to RTCT and a capacitor C33, from RTCT to GND set the oscillator frequency. See the Oscillator section to calculate RT and CT component values. 5 8 FUNCTION Synchronization and Enable Input. There are three operating modes: SYNC/EN = LOW: Low current shutdown mode with all circuits shut down except shunt regulator. SYNC/EN = HIGH: All circuits active with oscillator frequency set by RTCT network. SYNC/EN SYNC/EN = CLOCKED: All circuits active with oscillator frequency set by SYNC clock input. Conversion cycles initiate on the rising edge of external clock input. The frequency programmed by R19/C33 must be 10% lower than the input SYNC/EN signal frequency. 6 CSS 7 COMP 8 FB Soft-Start Timing Capacitor Connection. Connect a capacitor from CSS to GND to program the required softstart time for the switching regulator output voltage to reach regulation. See the Soft-Start (CSS) section to calculate CCSS. Switching Regulator Compensation Component Connection. Connect the compensation network between COMP and FB. Switching Regulator Feedback Input. Connect FB to the center of a resistor-divider connected between the switching regulator output and GND to set the output voltage. FB is regulated to a voltage set by an internal register. See the Setting Output Voltage section for calculating resistor values. 9 OVP Switching Regulator Overvoltage Input. Connect OVP to the center of a resistor-divider connected between the switching regulator output and GND. For normal operation, configure the resistor-divider so that the voltage at this pin does not exceed 1.25V. If operation under load dump conditions is also required, configure the resistordivider so that the voltage at OVP is less than 1.25V. 10 RSC Slope Compensation Resistor and PWM Comparator Input Connection. Connect a resistor, R17, from RSC to the switching current-sense resistor to set the amount of the compensation ramp. See the Slope Compensation (RSC) section for calculating the value. 11 SDA I2C Serial Data Input/Output 12 SCL I2C Serial Clock Input 13 DIM1 LED String 1 Logic-Level PWM Dimming Input. A high logic level on DIM1 enables the current sink to operate at the maximum current as determined by its sense resistor and internal register value. A low logic level disables the current source. 14 DIM2 LED String 2 Logic-Level PWM Dimming Input. A high logic level on DIM2 enables the current sink to operate at the maximum current as determined by its sense resistor and internal register value. A low logic level disables the current source. 15 DIM3 LED String 3 Logic-Level PWM Dimming Input. A high logic level on DIM3 enables the current sink to operate at the maximum current as determined by its sense resistor and internal register value. A low logic level disables the current source. 16 DIM4 LED String 4 Logic-Level PWM Dimming Input. A high logic level on DIM4 enables the current sink to operate at the maximum current as determined by its sense resistor and internal register value. A low logic level disables the current source. 17 CS1 LED String 1 Current-Sense Input. CS1 is regulated to a value set by an internal register. The regulation voltage can be set between 97mV and 316mV. _______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection PIN NAME FUNCTION 18 DL1 LED String 1 Linear Current Source Output. DL1 drives the gate of the external FET on LED String 1 and has approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL1 to GND to compensate the internal transconductance amplifier as well as program the rise and fall times of the LED currents. 19 DR1 LED String 1 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND voltage of the current sink FET. Drain voltage measurement information can be read back from the I2C interface. Connect a voltage-divider to scale drain voltage as necessary. 20 CS2 LED String 2 Current-Sense Input. CS2 is regulated to a value set by an internal register. The regulation voltage can be set between 97mV and 316mV. 21 DL2 LED String 2 Linear Current Source Output. DL2 drives the gate of the external FET on LED String 2 and has approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL2 to GND to compensate the internal transconductance amplifier, as well as program the rise and fall times of the LED currents. 22 DR2 LED String 2 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND voltage of the current sink FET. Drain voltage measurement information can be read back from the I2C interface. Connect a voltage-divider to scale drain voltage as necessary. 23 CS3 LED String 3 Current-Sense Input. CS3 is regulated to a value set by an internal register. The regulation voltage can be set between 97mV and 316mV. 24 DL3 LED String 3 Linear Current Source Output. DL3 drives the gate of the external FET on LED String 3 and has approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL3 to GND to compensate the internal transconductance amplifier, as well as program the rise and fall times of the LED currents. 25 DR3 LED String 3 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND voltage of the current sink FET. Drain voltage measurement information can be read back from the I2C interface. Connect a voltage-divider to scale drain voltage as necessary. 26 CS4 LED String 4 Current-Sense Input. CS4 is regulated to a value set by an internal register. The regulation voltage can be set between 97mV and 316mV. 27 DL4 LED String 4 Linear Current Source Output. DL3 drives the gate of the external FET on LED String 4 and has approximately 15mA source/sink capability. Connect a minimum capacitor of 4700pF from DL4 to GND to compensate the internal transconductance amplifier, as well as program the rise and fall times of the LED currents. 28 DR4 LED String 4 External FET Drain Voltage Sense. The internal ADC uses this input to measure the drain to GND voltage of the current sink FET. Drain voltage measurement information can be read back from the I2C interface. Connect a voltage-divider to scale drain voltage as necessary. 29 IN Power Supply. IN is internally connected to a 26V shunt regulator that sinks current. In conjunction with an external resistor it allows time-limited load dump events as high as 40V to be safely handled by the IC. Bypass IN to GND with a minimum 10μF capacitor. 30 CS Current-Sense Input 31 VCC Gate Driver Regulator Output. Bypass VCC to GND with a minimum 4.7μF ceramic capacitor. Gate drive current pulses come from the capacitor connected to VCC. Place the capacitor as close as possible to VCC. If IN is powered by a voltage less than 5.5V, connect VCC directly to IN. 32 DL Switching Regulator Gate Driver Output — EP Exposed Pad. Connect the exposed pad to the ground plane for heatsinking. Do not use this pad as the only ground connection to the IC. _______________________________________________________________________________________ 9 MAX16826 Pin Description (continued) Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection MAX16826 Simplified Block Diagram OVT IN 29 26V SHUNT OVT OVT REF VCC 7-BIT ADC AND SHORTED STRING FAULT DECTECTION GND VCC 31 5V VCC 28 DR4 25 DR3 22 DR2 19 DR1 OVP 9 DL 32 OVT PGND 1 CS 30 FB 8 RSC 10 CSS 6 COMP 7 26 CS4 23 CS3 CURRENTMODE PWM BLOCK 20 CS2 17 CS1 I2C STATE MACHINE RTCT 4 DOUBLEBUFFERED REGISTER AND DACS SYNC/EN 5 LINEAR CURRENTSINK DRIVERS 27 DL4 24 DL3 21 DL2 18 DL1 GND 2 GND 3 MAX16826 SDA 11 16 DIM4 15 DIM3 14 DIM2 SCL 12 13 DIM1 Detailed Description The MAX16826 HB LED driver integrates a switching regulator controller, a 4-channel linear current sink driver, a 7-bit ADC, and an I 2 C interface. The IC is designed to operate from a 4.75V to 24V input voltage range and can withstand automotive load dump transients up to 40V. The current-mode switching regulator controller is configurable as a boost or SEPIC converter to regulate the voltage to drive the four strings of HB LEDs. Its programmable switching frequency (100kHz to 1MHz) allows the 10 use of a small inductor and filter capacitors. The four current sink regulators use independent external currentsense resistors to provide constant currents for each string of LEDs. Four DIM inputs allow a very wide range of independent pulsed dimming to each LED string. An internal 7-bit ADC measures the drain voltage of the external driver transistors to enable output voltage optimization and fault monitoring of the LEDs. The MAX16826 is capable of driving four strings of LEDs. The number of LEDs in each string is only limited by the topology of choice, the rating of the external components, and the resolution of the ADC and internal DAC. ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Modes of Operation The MAX16826 has six modes of operation: normal mode, undervoltage lockout (UVLO) mode, thermal shutdown (TSD) mode, shutdown (SHDN) mode, standby (STBY) mode, and overvoltage protection (OVP) mode. The normal mode is the default state where each current sink regulator is maintaining a constant current through each of the LED strings. Digitized voltage feedback from the drains of the current sink FETs can be used to establish a secondary control loop by using an external μC to control the output of the switching stage for the purpose of achieving low-power dissipation across these FETs. UVLO mode occurs when VVCC goes below 4.3V. In UVLO mode, each of the linear current sinks and the switching regulator is shut down until the input voltage exceeds the rising UVLO threshold. TSD mode occurs when the die temperature exceeds the internally set thermal limit (+160°C). In TSD mode, each of the linear regulators and the switching regulator is shut down until the die temperature cools by 20°C. SHDN mode occurs when SYNC/EN is driven low. In SHDN mode, all internal circuitry with the exception of the shunt regulator is deactivated to limit current draw to less than 50μA. SHDN mode disengages when SYNC/EN is driven high or clocked. STBY mode is initiated using the I2C interface. In STBY mode, each of the linear current sinks and the switching regulator is shut down. STBY mode is also deactivated using the I2C interface. In STBY mode, the internal VCC regulator and the shunt regulator remain active. Whenever the MAX16826 enters a mode that deactivates the switching regulator, the soft-start capacitor is discharged so that soft-start occurs upon reactivation. OVP mode occurs when the voltage at OVP is higher than the internal reference. In OVP mode, the switching regulator gate-drive output is latched off and can only be restored by cycling enable, power, or entering standby mode. Switching Preregulator Stage The MAX16826 features a current-mode controller that is capable of operating in the frequency range of 100kHz to 1MHz. Current-mode control provides fast response and simplifies loop compensation. Output voltage regulation can be achieved in a twoloop configuration. A required conventional control loop can be set up by using the internal error amplifier with its inverting input connected to FB. The bandwidth of this loop is set to be as high as possible utilizing conventional compensation techniques. The noninverting input of this amplifier is connected to a reference voltage that is dynamically adjustable using the I2C interface. The optional slower secondary loop consists of the external μC using the I2C interface reading out the voltages at the drains of the current sink FETs and adjusting the reference voltage for the error amplifier. To regulate the output voltage, the error amplifier compares the voltage at FB to the internal 1.25V (adjustable down by using the I2C interface) reference. The output of the error amplifier is compared to the sum of the current-sense signal and the slope compensation ramp at RSC to control the duty cycle at DL. Two current-limit comparators also monitor the voltage across the sense resistor using CS. If the primary current-limit threshold is reached, the FET is turned off and remains off for the reminder of the switching cycle. If the current through the FET reaches the secondary current limit, the switching cycle is terminated and the softstart capacitor is discharged. The converter then restarts in soft-start mode preventing inductor current runaway due to the delay of the primary cycle-by-cycle current limit. The switching regulator controller also features an overvoltage protection circuit that latches the gate driver off if the voltage at OVP exceeds the internal 1.25V reference voltage. ______________________________________________________________________________________ 11 MAX16826 The MAX16826 provides additional flexibility with an internal I 2 C serial interface to communicate with a microcontroller (μC). The interface can be used to dynamically adjust the amplitude of the LED current in each LED string and the switch-mode regulator output voltage. It can also be used to read the ADC drain voltage measurements for each string, allowing a μC to dynamically adjust the output voltage to minimize the power dissipation in the LED current sink FETs. The I2C interface can also be used to detect faults such as LED short or open. MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Shunt Regulator The MAX16826 has an internal 26V (typ) shunt regulator to provide the primary protection against an automotive load dump. When the input voltage is below 26V, the shunt voltage at IN tracks the input voltage. When the input voltage exceeds 26V, the shunt regulator turns on to sink current, and the voltage at IN is clamped to 26V. During a load dump, the input voltage can reach 40V, and the shunt regulator through the resistor connected to IN is forced to sink large amounts of current for up to 400ms to limit the voltage that appears at IN to the shunt regulation voltage. The sinking current of the shunt regulator is limited by the value of resistor (R1 in Figure 1) in series with IN. There are two criteria that determine the value of R1: the maximum acceptable shunt current during load dump, and the voltage drop on R1 under normal operating conditions with low battery voltage. For example, with typical 20mA input current in normal operation, 250mA load dump current limit, 40V maximum load dump voltage, the R1 value is: −V V 7.5 − 5.5 R1 = INMIN INREG = = 100Ω IQ 20 × 10 −3 where VINMIN is the minimum operating voltage and VINREG is the minimum acceptable voltage at IN. Use the following equation to verify that the current through R1 is less than 250mA under a load-dump condition: V − 26V 40 − 26 ILD = LD = = 140mA 100 R1 R1 For stable operation, the shunt regulator requires a minimum 10μF of ceramic capacitance from IN to GND. VCC Regulator The 5.25V VCC regulator provides bias for the internal circuitry including the bandgap reference and gate drivers. Externally bypass V CC with a minimum 4.7μF ceramic capacitor. VCC has the ability to supply up to 50mA of current, but external loads should be minimized so as not to take away drive capability for internal circuitry. If IN is powered by a voltage less than 5.5V, connect VCC directly to IN. Switch-Mode Controller The MAX16826 consists of a current-mode controller that is capable of operating in the 100kHz to 1MHz frequency range (Figure 2). Current-mode control provides fast response and simplifies loop compensation. The error amplifier compares the voltage at FB to 1.25V and varies the COMP output accordingly to regulate. The PWM comparator compares the voltage at COMP with the voltage at RSC to determine the switching duty cycle. The primary cycle-by-cycle current-limit comparator interrupts the on-time if the sense voltage is larger than 200mV. When the sense voltage is larger than 270mV, the secondary gross current-limit comparator is activated to discharge the soft-start capacitor. This forces the IC to re-soft-start preventing inductor current runaway due to the delay of the primary cycle-by-cycle current limit. The switch-mode controller also features a low current shutdown mode, adjustable soft-start, and thermal shutdown protection. IN VIN C4 + 5V REFERENCE MAX16826 Figure 1. Shunt Regulator Block Diagram 12 ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection MAX16826 FB ERROR AMPLIFIER VCC COMP + ANALOG MUX 6μA - CSS + SOFT-START COMPARATOR I2C BUS SWR DAC 1.25V VCC OVP + OVP COMPARATOR SET S Q R Q CLR 10μA PWM COMPARATOR SET S Q + DL R Q CLR SHDN STBY SYNC OSCILLATOR RTCT 200mV CS + + MAX16826 CURRENTRAMP GENERATOR 26μA/μs 270mV CURRENT-LIMIT COMPARATORS RSC Figure 2. Switch Regulator Controller Block Diagram ______________________________________________________________________________________ 13 MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Oscillator The MAX16826 oscillator frequency is programmable using an external capacitor (C33 in the Typical Application Circuit) and a resistor (R19) at RTCT. R19 is connected from RTCT to VCC and C33 is connected from RTCT to GND. C33 charges through RT until VRTCT reaches 2.85V. CT then discharges through an 8.4mA internal current sink until VRTCT drops to 1.2V. C33 is then allowed to charge through R19 again. The period of the oscillator is the sum of the charge and discharge times of C3. Calculate these times as follows: The charge time is: Current Limit (CS) The MAX16826 includes a primary cycle-by-cycle, current-limit comparator and a secondary gross currentlimit comparator to terminate the on-time or switch cycle during an overload or fault condition. The currentsense resistor (R12 in the Typical Application Circuit) connected between the source of the switching FET and GND and the internal threshold, set the current limit. The current-sense input (CS) has a voltage trip level (VCS) of 200mV. Use the following equation to calculate R39: tC = 0.55 x R19 x C33 The discharge time is: where IPK is the peak current that flows through the switching FET. When the voltage across R12 exceeds the current-limit comparator threshold, the FET driver (DL) turns the switch off within 80ns. In some cases, a small RC filter may be required to filter out the leadingedge spike on the sensed waveform. Set the time constant of the RC filter at approximately 100ns and adjust as needed. tD = R19 × C33 × ln ((R19 − 281.86 ) (R19 − 487.45)) where tC and tD is in seconds, R19 is in ohms (Ω), and C33 is in farads (F). The oscillator frequency is then: 1 fOSC = t C + tD The charge time (tC) in relation to the period (tC + tD) sets the maximum duty cycle of the switching regulator. Therefore, the charge time (tC) is constrained by the desired maximum duty cycle. Typically, the duty cycle should be limited to 95%. The oscillator frequency is programmable from 100kHz to 1MHz. The MAX16826 can be synchronized to an external oscillator through SYNC/EN. Slope Compensation (RSC) The MAX16826 uses an internal ramp generator for slope compensation to stabilize the current loop when the duty cycle exceeds 50%. A slope compensation resistor (R17 in the Typical Application Circuit) is connected between RSC and the switching current-sense resistor at the source of the external switching FET. When the voltage at DL transitions from low to high, a ramped current with a slope of 26μA/μs is generated and flows through the slope compensation resistor. It is effectively summed with the current-sense signal. When the voltage at DL is low, the current ramp is reset to 0. Calculate R17 as follows: R17 = (VOUT − VINMIN ) × R12 34.28 × L1 where V OUT is the switching regulator output and VINMIN is the minimum operating input voltage. 14 R12 = VCS/IPK If, for any reason, the voltage at CS exceeds the 270mV trip level of the gross current limit as set by a second comparator, then the switching cycle is immediately terminated and the soft-start capacitor is discharged. This allows a new soft-start cycle and prevents inductor current buildup. Soft-Start (CSS) Soft-start is achieved by charging the external soft-start capacitor (C30 in the Typical Application Circuit) at startup. An internal fixed 6μA current source charges the soft-start capacitor until V CSS reaches V CC . To achieve the required soft-start timing for the switching regulator output voltage to reach regulation, the value of the soft-start capacitor at CSS is calculated as: C30 = 6μA x tSS/VREF where tSS is the required time to achieve the switching regulator output regulation and VREF is the set FB regulation voltage. When the IC is disabled, the soft-start capacitor is discharged to GND. Synchronization and Enable Input The SYNC/EN input provides both external clock synchronization (if desired) and enable control. When SYNC/EN is held low, all circuits are disabled and the IC enters low-current shutdown mode. When SYNC/EN is high, the IC is enabled and the switching regulator clock uses the RTCT network to set the operating frequency. See the Oscillator section for details. The SYNC/EN can also be used for frequency synchronization by connecting it to an external clock signal from 100kHz to 1MHz. The switching cycle initiates on the ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Overvoltage Protection (OVP) OVP limits the maximum voltage of the switching regulator output for protection against overvoltage due to circuit faults, for example a disconnected FB. Connect OVP to the center of a resistor-divider connected between the switching regulator output and GND to set the output-voltage OVP limit. Typically, the OVP output voltage limit is set higher than the load dump voltage. Calculate the value of R15 and R16 as follows: R15 = (VOVP/1.25 - 1) x R16 Or to calculate VOVP: VOVP = 1.25 x (1 + R15/R16) where R15 and R16 are shown in the Typical Application Circuit. The internal OVP comparator compares the voltage at OVP with the internal reference (1.25V typ) to decide if an overvoltage error occurs. If an overvoltage error is detected, switching stops, the switching regulator gate-drive output is latched off, and the soft-start capacitor is discharged. The latch can only be reset by toggling SYNC/EN, activating the I2C standby mode, or cycling power. The internal ADC also uses OVP to sense the switching regulator output voltage. Output voltage measurement information can be read back from the I2C interface. Voltage is digitized to 7-bit resolution. Undervoltage Lockout (UVLO) When the voltage at VCC is below the VCC undervoltage threshold (VVCC_UVLO, typically 4.3V falling), the MAX16826 enters undervoltage lockout. V CC UVLO forces the linear regulators and the switching regulator into shutdown mode until the V CC voltage is high enough to allow the device to operate normally. In VCC UVLO, the VCC regulator remains active. Thermal Shutdown The MAX16826 contains an internal temperature sensor that turns off all outputs when the die temperature exceeds +160°C. The outputs are enabled again when the die temperature drops below +140°C. In thermal shutdown, all internal circuitry is shut down with the exception of the shunt regulator. Linear Current Sources (CS1–CS4, DL1–DL4) The MAX16826 uses transconductance amplifiers to control each LED current sink. The amplifier outputs (DL1–DL4) drive the gates of the external current sink FETs (Q2 to Q5 in the Typical Application Circuit). The source of each MOSFET is connected to GND through a currentsense resistor. CS1–CS4 are connected to the respective inverting input of the amplifiers and also to the source of the external current sink FETs where the LED string current-sense resistors are connected. The noninverting input of each amplifier is connected to the output of an internal DAC. The DAC output is programmable using the I2C interface to output between 97mV and 316mV. The regulated string currents are set by the value of the current-sense resistors (R28 to R31 in the Typical Application Circuit) and the corresponding DAC output voltages. LED PWM Dimming (DIM1–DIM4) The MAX16826 features a versatile dimming scheme for controlling the brightness of the four LED strings. Independent LED string dimming is accomplished by driving the appropriate DIM1–DIM4 inputs with a PWM signal with a frequency up to 100kHz. Although the brightness of the corresponding LED string is proportional to the duty cycle of its respective PWM dimming signal, finite LED current rise and fall times limit this linearity when the dim pulse width approaches 2μs. Each LED string can be independently controlled. Simultaneous control of the PWM dimming and the LED string currents in an analog way over a 3:1 range provides great flexibility allowing independent two-dimensional brightness control that can be used for color point setup and brightness control. Analog-to-Digital Converter (ADC) The MAX16826 has an internal ADC that measures the drain voltage of the external current sink driver FETs (Q2 to Q5 in the Typical Application Circuit ) using DR1 - DR4 and the switching regulator output voltage using OVP. Fault monitoring and switching stage output-voltage optimization is possible by using an external microcontroller to read out these digitized voltages through the I2C interface. The ADC is a 7-bit SAR (successive-approximation register) topology. It sequentially samples and converts the drain voltage of each channel and VOVP. An internal 5-channel analog MUX is used to select the channel the ADC is sampling. Conversions are driven by an internally generated 1MHz clock and gated by the external dimming signals. After a conversion, each measurement is stored into its respective register and can be accessed through the I2C interface. The digital circuitry that controls the analog MUX includes a 190ms timer. If the ADC does not complete a conversion within this 190ms measurement window then the analog MUX will sequence to the next channel. For the ADC to complete one full conversion, the cumulative PWM dimming ontime must be greater than 10μs within the 190ms measurement window. The minimum PWM dimming on-time ______________________________________________________________________________________ 15 MAX16826 rising edge of the clock. When using external synchronization, the clock frequency set by RTCT must be 10% lower than the synchronization signal frequency. MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection is 2μs, so the ADC requires at least 5 of these minimum pulses within the 190ms measurement window to complete a conversion. During PWM dimming, LED current pulse widths of less than 2μs are possible, but the ADC may not have enough sampling time to complete a conversion in this scenario and the corresponding data may be incomplete or inaccurate. Therefore, adaptive voltage optimization may not be possible when the LED current-pulse duration is less than 2μs. The LED current pulse duration is shorter than the pulse applied at the DIM_ inputs because of the LED turn-on delay. Faults and Fault Detection The MAX16826 features circuitry that automatically detects faults such as overvoltage or shorted LED string. An internal fault register at the address OAh is used to record these faults. For example, if a shorted LED string is detected, the corresponding fault register bit is set and the faulty output is shut down. Shorted LED strings are detected with fast comparators connected to DR1–DR4. The trip threshold of these comparators is 1.52V (typ). When this threshold is exceeded, the shorted string is latched off and the corresponding bit of register OAh is set. After the internal ADC completes a conversion, the result is stored in the corresponding register and can be read out by the external μC. The μC then compares the conversion data with the preset limit to determine if there is a fault. When an LED string opens, the voltage at the corresponding current-sink FET drain node goes to 0V. However, the ADC can only complete a conversion if the LED current comes into regulation. If an LED string opens before the LED current can come into regulation, the ADC cannot complete a conversion and the MSB (eighth bit) is set to indicate an incomplete conversion or timeout condition. Thus, an examination of the MSB provides an indication that the LED string is open. If the LED string opens after the LED current is in regulation, the ADC can make conversions and reports that the drain voltage is 0V. Therefore, to detect an open condition, monitor the MSB and the ADC measurement. If the MSB is set and the CS_ on-time is greater than 2μs, or if the ADC measures 0 at the drain, then there is an open circuit. ADC EXTERNAL EVENTS DAC REGISTER FILE UNIT OVP SYSTEM CLOCK I2C POWER MANAGEMENT Figure 3. Digital Block Diagram Table 1. ADC Response CONDITION ADC RESPONSE Shorted string fault Load full-scale code into register, no conversions on affected channel until power or enable is cycled. Shorted string fault while converting Immediately load full-scale code into register and cease conversion effort on this channel until power or enable is cycled. ADC register read when it is being updated Previous sample is shifted out through the I2C interface and then the register is updated with the new measurement. UVLO Immediately terminate conversions, do not update current register. STBY Immediately terminate conversions, do not update current register. SHDN Immediately terminate conversions, do not update current register. 16 ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Figure 3 shows the block diagram of the digital section in the MAX16826. The I2C serial interface provides flexible control of the IC and is in charge of writing/reading to/from the register file unit. The ADC block is a 7-bit 5-channel SAR ADC. The eighth bit of the ADC data register indicates an incomplete conversion or timeout has occurred. This bit is set whenever the LED current fails to come into regulation during the DIM PWM on-time. This indicates there is either an LED open condition or the CS_ on-time is less than 2μs. A reason for this among other possibilities is an open LED string condition. This eighth or MSB bit can be tested to determine open string faults. I2C Interface The MAX16826 internal I2C serial interface provides flexible control of the amplitude of the LED current in each string and the switch-mode regulator output voltage. It is also able to read the current sink FET drain voltages, as well as the switching regulator output voltage through OVP and thus enable some fault detection and power dissipation minimization. By using an external μC, the MAX16826 internal control and status registers are also accessed through the standard bidirectional, 2-wire, I2C serial interface. The I2C interface provides the following I/O functions and programmability: • Current sink FET drain and switching regulator output-voltage measurement. The measurement for each channel and the regulator output is stored in its respective register and can be accessed through the I2C interface. The SAR ADC measures the drain voltage of each current sink FET sequentially. This uses one 8-bit register for each channel to store the measurement made by the 7-bit SAR • • • • ADC and 1 bit to indicate a timeout during the ADC conversion cycle. Adjustment of the switching regulator output. This is used for adaptive voltage optimization to improve overall efficiency. The switching regulator output is downward adjustable by changing its reference voltage. This uses a 7-bit register. Adjustment of the reference voltage of the currentsink regulators. The reference voltage at the noninverting input of each of the linear regulator drive amplifiers can be changed to make adjustments in the current of each LED string for a given sense resistor. The output can be adjusted down from a maximum of 316mV to 97mV in 1.72mV increments. Fault reporting. When a shorted string fault or an overvoltage fault occurs, the fault is recorded. Standby mode. When a one is entered into the standby register the IC goes into standby mode. The 7-bit I2C address is 58h and the 8-bit I2C address is B1h for a read operation and B0h for a write operation. Address the MAX16826 using the I2C interface to read the state of the registers or to write to the registers. Upon a read command, the MAX16826 transmits the data in the register that the address register is pointing to. This is done so that the user has the ability to confirm the data written to a register before the output is enabled. Use the fault register to diagnose any faults. Serial Addressing The I2C interface consists of a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between the master and the slave. The MAX16826 is a slave-only device, relying upon a master to generate a clock signal. The master initiates data transfer to and from the MAX16826 and generates SCL to synchronize the data transfer (Figure 4). SDA tSU,STA tSU,DAT tLOW tBUF tHD,STA tSU,STO tHD,DAT tHIGH SCL tHD,STA tR tF START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 4. 2-Wire Serial Interface Timing Detail ______________________________________________________________________________________ 17 MAX16826 Overview of the Digital Section MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection I2C is an open-drain bus. Both SDA and SCL are bidirectional lines, connected to a positive supply voltage using a pullup resistor. They both have Schmitt triggers and filter circuits to suppress noise spikes on the bus to ensure proper device operation. A bus master initiates communication with the MAX16826 as a slave device by issuing a START condition followed by the MAX16826 address. The MAX16826 address byte consists of 7 address bits and a read/write bit (R/W). After receiving the proper address, the MAX16826 issues an acknowledge bit by pulling SDA low during the ninth clock cycle. START and STOP Conditions Both SCL and SDA remain high when the bus is not busy. The master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the MAX16826, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 4). Both START and STOP conditions are generated by the bus master. Bit Transfer Each data bit, from the most significant bit to the least significant bit, is transferred one by one during each clock cycle. During data transfer, the SDA signal is allowed to change only during the low period of the SCL clock and it must remain stable during the high period of the SCL clock (Figure 5). Acknowledge The acknowledge bit is used by the recipient to handshake the receipt of each byte of data (Figure 6). After data transfer, the master generates the acknowledge clock pulse and the recipient pulls down the SDA line during this acknowledge clock pulse, such that the SDA line stays low during the high duration of the clock pulse. When the master transmits the data to the MAX16826, it releases the SDA line and the MAX16826 takes the control of SDA line and generates the acknowledge bit. When SDA remains high during this 9th clock pulse, this is defined as the not acknowledge signal. The master then generates either a STOP condition to abort the transfer, or a repeated START condition to start a new transfer. SCL SDA DATA LINE STABLE DATA VALID START CONDITION (S) STOP CONDITION (P) DATA ALLOWED TO CHANGE Figure 5. Bit Transfer START CONDITION CLOCK PULSE FOR ACKNOWLEDGMENT 1 2 8 9 SCL SDA BY MASTER S SDA BY SLAVE Figure 6. Acknowledge 18 ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Write Byte(s) The write byte protocol is as follows: 1) The master sends a START condition. 2) The master sends the 7-bit slave address followed by a write bit (low). 3) The addressed slave asserts an ACK by pulling SDA low. 4) The master sends an 8-bit command code. 5) 6) 7) 8) The slave asserts an ACK by pulling SDA low. The master sends an 8-bit data byte. The slave acknowledges the data byte. The master generates a STOP condition or repeats 6 and 7 to write next byte(s). The command is interpreted as the destination address (register file unit) and data is written in the addressed location. The slave asserts a NACK at step 5 if the command is not valid. The master then interrupts the communication by issuing a STOP condition. If the address is correct, the data byte is written to the addressed register. After the write, the internal address pointer is increased by one. When the last location is reached, it cycles to the first register. Read Byte(s) The read sequence is: 1) The master sends a START condition. 2) The master sends the 7-bit slave address plus a write bit (low). 3) The addressed slave asserts an ACK on the data line. 4) 5) 6) 7) The master sends an 8-bit command byte. The active slave asserts an ACK on the data line. The master sends a repeated START condition. The master sends the 7-bit slave address plus a read bit (high). 8) The addressed slave asserts an ACK on the data line. 9) The slave sends an 8-bit data byte. 10) The master asserts a NACK on the data line to complete operations or asserts an ACK and repeats 9 and 10. 11) The master generates a STOP condition. The data byte read from the device is the content of the addressed location(s). Once the read is done, the internal pointer is increased by one. When the last location is reached, it cycles to the first one. If the device is busy or the address is not correct (out of memory map), the command code is not acknowledged and the internal address pointer is not altered. The master then interrupts the communication by issuing a STOP condition. WRITE BYTE FORMAT S SLAVE ADDRESS 7 BITS R/W ACK COMMAND 0 ACK DATA ACK 8 BITS 8 BITS COMMAND BYTE: SELECT REGISTER TO WRITE DATA BYTE DATA GOES INTO THE REGISTER SET BY THE COMMAND BYTE P Figure 7. Write Byte Format READ BYTE FORMAT S SLAVE ADDRESS 7 BITS R/W ACK 0 COMMAND ACK SR 8 BITS COMMAND BYTE: PREPARE DEVICE FOR FOLLOWING READ SLAVE ADDRESS 7 BITS R/W ACK 1 DATA NACK P 8 BITS DATA BYTE DATA COMES FROM THE REGISTER SET BY THE COMMAND BYTE Figure 8. Read Byte Format ______________________________________________________________________________________ 19 MAX16826 Accessing the MAX16826 The communication between the μC and the MAX16826 is based on the usage of a set of protocols defined on top of the standard I2C protocol definition. They are exclusively write byte(s) and read byte(s). MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Register File Unit The register file unit is used to store all the control information from the SDA line and configure the MAX16826 for different operating conditions. The register file assignments of the MAX16826 are in Table 2. The FB reference voltage can be decreased from 1.25V, its maximum value, by approximately 2.9mV steps. The steady-state voltage at FB then is regulated to: VFB = 1.25V - (2.91mV x 04h[6:0]) Registers 05h to 08h: External Current-Sink FET Drain Voltage ADC Readings These registers store the drain voltages of the external current sink FETs. For each register, bits 6–0 are the conversion data of the ADC outputs. Bit 7 is used to show if the conversion is terminated by the ADC (indicated by 0) or if there is an internal timeout (indicated by 1). If the drain voltage exceeds the preset reference voltage, the corresponding LED string fault bit is asserted. See the Faults and Fault Detection section for more information on the internal timeout function. Registers 00h to 03h: String Current Programming These registers are used to program LED string 1 to LED string 4 current sink values. For each LED string, CS1–CS4 inputs are connected to the source of the external current sink FET and internally are connected to the inverting input of the internal transconductance amplifier. The noninverting input of this amplifier is connected to the output of an internal DAC programmed by these registers. As the DAC is incremented, its output voltage decreases from 316mV to 97mV in 1.72mV steps by the data written in the register 00h to 03h; thus, the steady-state voltage at CS1–CS4 is given by the following formula: VCS1,2,3,4 = 316mV - (1.72mV x RegisterValue[6:0]) For example, if 00h is set to 20h, then the CS1 voltage is: VCS1 = 316mV - 1.72mV x 32 = 265.3mV Register 09h: Switching Regulator Voltage ADC Output Bits 6-0 of this register store the voltage present at OVP. This voltage is a scaled down version of the switching regulator output voltage. Bit 7 is not used. Register 0Ah: Fault Status Register This register stores all the external events or fault information such as overvoltage and shorted LED string faults. The fault events are logged only if the system is not in standby mode and their active states are longer than one clock cycle. Cycle enable or power to clear the fault status register. Initiating standby mode using the I2C interface can also be used to clear the fault status Register 04h: Switching Regulator Output Programming Set the switching regulator output voltage by connecting FB to the center of a resistive voltage-divider between the switching regulator output and GND. VFB is regulated to a voltage from 876mV to 1.25V (typ) set by the register 04h through the I2C interface. Table 2. Register File Assignments 20 REGISTER ADDRESS R/W USED BIT RANGE RESET VALUE 00h R/W [6:0] 00h LED String 1 current programming value. 01h R/W [6:0] 00h LED String 2 current programming value. 02h R/W [6:0] 00h LED String 3 current programming value. 03h R/W [6:0] 00h LED String 4 current programming value. 04h R/W [6:0] 00h Switching regulator output voltage programming value. 05h R [7:0] 00h LED String 1 external FET drain voltage ADC output. 06h R [7:0] 00h LED String 2 external FET drain voltage ADC output. 07h R [7:0] 00h LED String 3 external FET drain voltage ADC output. 08h R [7:0] 00h LED String 4 external FET drain voltage ADC output. 09h R [6:0] 00h OVP voltage, ADC output. 0Ah R [5:0] 00h Fault status register. 0Bh R/W [0] 00h 0Ch R [2:0] — DESCRIPTION Device standby command. Device revision code. ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection • Bit 2: LED string 1 shorted flag. A diode short in LED string 1 has been detected if this bit is set. • Bit 3: LED string 2 shorted flag. A diode short in LED string 2 has been detected if this bit is set. • Bit 4: LED string 3 shorted flag. A diode short in LED string 3 has been detected if this bit is set. • Bit 5: LED string 4 shorted flag. A diode short in LED string 4 has been detected if this bit is set. Register 0Bh Bit 0: Device Standby Command When register 0Bh bit 0 is set to 1, the IC enters a lowcurrent standby mode. In this mode, the system clock is off and no operation is allowed. Set this bit to 0 to leave standby mode and back to normal operation mode. Register 0Ch Bit 2-0: Device Revision Code These 3 bits are a hardwired value that identifies the IC’s revision. Applications Information Programming LED Currents The MAX16826 uses sense resistors (R28, R29, R30, R31 in the Typical Application Circuit) to set the output current for each LED string. To set the LED current for a particular string, connect a sense resistor across the corresponding current-sense input (CS1–CS4) and GND. For optimal accuracy, connect the low-side of the current-sense resistors to GND with short traces. The value needed for the sense resistor for a given current is calculated with the equation below: R31 = VCS1/IOUT1 where VCS1 can be set from 97mV to 316mV by the internal registers through the I2C interface and IOUT1 is the desired LED string 1 current. Calculating the Value of Peak Current-Limit Resistor The value of R12 sets the peak switching current that flows in the switching FET (Q1). Set the value of resistor R12 using the equation below: R12 = 0.19/(1.2 x IPK) where IPK is the peak inductor current at minimum input voltage and maximum load. Boost Inductor Value The value of the boost inductor is calculated using the following equation: L1 = VINMIN × (VOUT − VINMIN ) VOUT × fSW × ΔIL where VINMIN is the minimum input voltage, VOUT is the desired output voltage, and fSW is the switching frequency, and ΔIL is the peak-to-peak ripple in the boost inductor. Higher inductor values lead to lower ripple but at a higher cost and size. Choose an inductor value that gives peak-to-peak ripple current in the order of 30% to 40% of the average current in the inductor at low-line and full-rated load. This choice of inductor is a compromise between cost, size, and performance for the boost converter. Setting Output Voltage Set the switch regulator output voltage by connecting FB to the center of a resistive voltage-divider between the switching regulator output and GND. VFB is regulated to a voltage from 0.88V to 1.25V (typ) set by an internal register through the I2C interface. Choose R13 and R14 in the Typical Application Circuit for a reasonable bias current in the resistive divider and use the following formula to set the output voltage: VOUT = (1 + R13/R14) x VFB where VFB is the regulated voltage set by the internal register. Adaptive Voltage Optimization The availability of the digitized switching regulator output voltage and current sink drain voltages and the ability to change the switching regulator output voltage provide the ability to do adaptive voltage optimization. A slow digital control loop is established with an external μC closing the loop. Firmware residing in the external μC is tasked to read each one of the current sink FET drain voltages and select the minimum value of the four LED strings. The minimum value is subtracted from the scaled output voltage reading, and then the switching regulator output is forced to maintain the difference required to provide current regulation in the current sink FETs. ______________________________________________________________________________________ 21 MAX16826 register. First, activate standby mode and then deactivate this mode using the I2C interface. Next, perform a read operation on the fault status register. The old fault information is reported in this first read operation. The conclusion of the read operation clears the data contained in the register. Subsequent read operations confirm that the fault status register has been cleared. The description of this register is as follows: Bit 0: Overvoltage sense flag. This flag is set if the voltage at OVP exceeds 1.25V; switching stops until power or the enable or standby is cycled. • Bit 1: Not used. SEPIC Topology The SEPIC topology is more complex than the simple boost topology and it requires the use of two additional energy storage components, L2 and C25, in Figure 9. The SEPIC power topology is very useful when the input voltage is expected to be higher or lower than the output voltage of the switching regulator stage as required by the number of LEDs used in a single string. L1 C25 D1 VOUT VIN Q1 R13 R11 R15 C28 C26 L2 R17 R32 R14 R12 C27 GND GND GND GND GND R34 R33 R35 R16 R26 GND R24 GND C29 R22 R18 R20 SYSTEM μC SYSTEM INTERFACE MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection IN DL RSC CS COMP DIM1 DIM2 DIM3 DIM4 DIM DR4 DR3 DR2 DR1 DIMMING INPUTS MAX16826 SDA SCL SDA SCL GND CSS Q5 Q4 Q3 Q2 R31 R30 R29 R28 DL1 CS1 DL2 CS2 DL3 CS3 DL4 CS4 I2C INTERFACE SYNC/EN ENABLE FB OVP RTCT VCC GND PGND R27 R19 R25 R23 R21 C44 C43 C42 C41 C30 C33 GND GND GND C32 GND GND GND GND Figure 9. SEPIC-Based LED Driver 22 ______________________________________________________________________________________ GND Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection • Place the feedback and even voltage-divider resistors as close to FB and OVP as possible. The divider center trace should be kept short. Placing the resistors far away causes the sensing trace to become antennas that can pick up switching noise. Avoid running the sensing traces near drain connection of the switching FET. • • Minimize the area of the high current-switching loop of the rectifier diode, switching FET, sense resistor, and output capacitor to avoid excessive switching noise. Use wide and short traces for the gate-drive loop from DL, to the FET gate, and through the current-sense resistor, then returning to the IC PGND and GND. Connect high-current input and output components with short and wide connections. The high-current input loop is from the positive terminal of the input capacitor to the inductor, to the switching FET, to the current-sense resistor, and to the negative terminal of the input capacitor. The high-current output loop is from the positive terminal of the input capacitor to the inductor, to the rectifier diode, to the positive terminal of the output capacitor, reconnecting between the output capacitor and input capacitor ground terminals. Avoid using vias in the high-current paths. If vias are unavoidable, use multiple vias in parallel to reduce resistance and inductance. • Place the input bypass capacitor as close to the device as possible. The ground connection of the bypass capacitor should be connected directly to GND with a wide trace. Minimize the size of the switching FET drain node while keeping it wide and short. Keep the drain node away from the feedback node and ground. If possible, avoid running this node from one side of the PCB to the other. Use DC traces as shields, if necessary. Provide large enough cooling copper traces for the external current sink FETs. Calculate the worst-case power dissipation and allocate sufficient area for cooling. • • • Refer to the MAX16826 Evaluation Kit for an example of proper board layout. ______________________________________________________________________________________ 23 MAX16826 PCB Layout and Routing Careful PCB layout is important for proper operation. Use the following guidelines for good PCB layout: 24 GND ENABLE SDA SCL DIM SYSTEM μC SYSTEM INTERFACE GND GND GND CSS SYNC/EN SDA SCL DIM2 DIM3 DIM4 GND C33 GND RTCT C32 R19 R12 GND VCC GND GND GND PGND DL1 CS1 DL2 CS2 DL3 CS3 DL4 CS4 DR4 DR3 DR2 DR1 FB OVP C29 GND Q1 RSC CS COMP MAX16826 R17 L1 DL DIMMING INPUTS IN C27 R11 I2C INTERFACE GND DIM1 C26 C30 VIN (40V LOAD DUMP OK) C28 D1 R18 GND R27 R25 GND R14 R13 R23 GND R21 R16 R15 BOOST LED DRIVER R31 Q5 C44 R20 R32 R30 Q4 C43 R22 R33 R24 R34 C42 R29 Q3 R26 R35 C41 R28 GND Q2 VOUT MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Typical Application Circuit ______________________________________________________________________________________ Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection DL3 CS3 DR2 DL2 CS2 DR1 DL1 CS1 TOP VIEW 24 23 22 21 20 19 18 17 DR3 25 16 DIM4 CS4 26 15 DIM3 DL4 27 14 DIM2 13 DIM1 12 SCL 11 SDA 10 RSC 9 OVP DR4 28 MAX16826 IN 29 CS 30 EP VCC 31 4 5 6 7 8 SNYC/EN CSS COMP FB GND 3 GND 2 RTCT 1 PGND DL 32 TQFN (5mm x 5mm) EXPOSED PAD. Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX16826AGJ/VY+ -40°C to +125°C 32 QFN-EP* MAX16826BATJ+ -40°C to +125°C 32 TQFN-EP* MAX16826BATJ/V+ -40°C to +125°C 32 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. /V denotes an automotive qualified part. Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 32 TQFN-EP T3255-4 21-0140 ______________________________________________________________________________________ 25 MAX16826 Pin Configuration MAX16826 Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection Revision History REVISION NUMBER REVISION DATE 0 8/08 Initial release 1 3/09 Added automotive version, updated Features, EC table, Typical Operating Characteristics, Switching Preregulator Stage, Oscillator, Analog-to-Digital (ADC), Faults and Fault Detection sections 2 12/09 Improve definition of minimum on-time for proper ADC operation 3 6/10 Added MAX16826B part 4 12/11 Added MAX16826AGJ/VY+ to data sheet PAGES CHANGED DESCRIPTION — 1, 2, 5, 6, 11, 14–17, 20 5, 10, 16 2–5, 25 25 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.