EVALUATION KIT AVAILABLE MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications General Description Benefits and Features The MAX17498A/MAX17498B/MAX17498C devices are current-mode fixed-frequency flyback/boost converters with a minimum number of external components. They contain all the control circuitry required to design wide input voltage isolated and nonisolated power supplies. The MAX17498A has its rising/falling undervoltage lockout (UVLO) thresholds optimized for universal offline (85V AC to 265V AC) applications, while the MAX17498B/ MAX17498C support UVLO thresholds suitable to lowvoltage DC-DC applications. S Peak Current-Mode Converter The switching frequency of the MAX17498A/MAX17498C is 250kHz, while that of the MAX17498B is 500kHz. These frequencies allow the use of tiny magnetic and filter components, resulting in compact, cost-effective power supplies. An EN/UVLO input allows the user to start the power supply precisely at the desired input voltage, while also functioning as an on/off pin. The OVI pin enables implementation of an input overvoltage-protection scheme that ensures that the converter shuts down when the DC input voltage exceeds the desired maximum value. S Programmable Soft-Start to Reduce Input Inrush Current The devices incorporate a flexible error amplifier and an accurate reference voltage (REF) to enable the end user to regulate both positive and negative outputs. Programmable current limit allows proper sizing and protection of the primary switching FET. The devices support a maximum duty cycle greater than 92% and provide programmable slope compensation to allow optimization of control loop performance. The devices provide an open-drain PGOOD pin that serves as a power-good indicator and enters the high-impedance state to indicate that the flyback /boost converter is in regulation. An SS pin allows programmable soft-start time for the flyback/boost converter. Hiccup-mode overcurrent protection and thermal shutdown are provided to minimize dissipation under overcurrent and overtemperature fault conditions. The devices are available in a space-saving, 16-pin (3mm x 3mm) TQFN package with 0.5mm lead spacing. Ordering Information and Typical Application Circuits appear at end of data sheet. For related parts and recommended products to use with this part, refer to www.maximintegrated.com/MAX17498A.related. S Current-Mode Control Provides Excellent Transient Response S Fixed Switching Frequency 250kHz: MAX17498A/MAX17498C 500kHz: MAX17498B S Flexible Error Amplifier to Regulate Both Positive and Negative Outputs S Programmable Voltage or Current Soft-Start S Power-Good Signal (PGOOD) S Reduced Power Dissipation Under Fault Overcurrent Protection Thermal Shutdown with Hysteresis S Robust Protection Features Programmable Current Limit Input Overvoltage Protection S Optimized Loop Performance Programmable Slope Compensation S High Efficiency Low RDSON, 175mI, 65V Rated Internal n-Channel MOSFET No Current-Sense Resistor S Optional Spread Spectrum S Space-Saving, 16-Pin (3mm x 3mm) TQFN Package Applications Front-End AC-DC Power Supplies for Industrial Applications (Isolated and Nonisolated) Telecom Power Supplies Wide Input Range DC Input Flyback /Boost Industrial Power Supplies For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. 19-6043; Rev 3; 4/13 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications ABSOLUTE MAXIMUM RATINGS IN to SGND.............................................................-0.3V to +40V EN/UVLO to SGND.......................................... -0.3V to IN + 0.3V OVI to SGND............................................... -0.3V to VCC + 0.3V VCC to SGND...........................................................-0.3V to +6V SS, LIM, EA-, EA+, COMP, SLOPE, REF to SGND.........................................-0.3V to (VCC + 0.3V) LX to SGND............................................................-0.3V to +70V PGOOD to SGND.....................................................-0.3V to +6V PGND to SGND.....................................................-0.3V to +0.3V Continuous Power Dissipation (Single-Layer Board) TQFN (derate 20.8mW/°C above +70°C)..................1700mW Operating Temperature Range......................... -40°C to +125°C Storage Temperature Range............................. -65°C to +160°C Junction Temperature (continuous).................................+150°C Lead Temperature (soldering, 10s).................................+300°C Soldering Temperature (reflow).......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = +15V, VEN/UVLO = +2V, COMP = open, CIN = 1µF, CVCC = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS INPUT SUPPLY (VIN) IN Voltage Range (VIN) IN Supply Startup Current Under UVLO MAX17498A 4.5 29 MAX17498B/MAX17498C 4.5 36 V IINSTARTUP, VIN < UVLO or EN/UVLO = SGND 22 36 Switching, fSW = 250kHz (MAX17498A/MAX17498C) 1.8 3 2 3.25 19 20.5 22 3.85 4.15 4.4 3.65 3.95 4.25 V EN/UVLO = SGND, IIN = 1mA (MAX17498A) (Note 2) 31 33.5 36 V VCC Output Voltage Range 6V < VIN < 29V, 0mA < IVCC < 50mA 4.8 VCC Dropout Voltage VIN = 4.5V, IVCC = 20mA VCC Current Limit VCC = 0V, VIN = 6V IN Supply Current (IIN) IN Boostrap UVLO Rising Threshold Switching, fSW = 500kHz (MAX17498B) MAX17498A MAX17498B/MAX17498C IN Bootstrap UVLO Falling Threshold IN Clamp Voltage µA mA V LINEAR REGULATOR (VCC) 5 5.2 V 160 300 mV 50 100 mA Rising 1.18 1.23 1.28 Falling 1.11 1.17 1.21 0V < VEN/UVLO < 1.5V, TA = +25NC -100 0 +100 ENABLE (EN/UVLO) EN/UVLO Threshold EN/UVLO Input Leakage Current Maxim Integrated V nA 2 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications ELECTRICAL CHARACTERISTICS (continued) (VIN = +15V, VEN/UVLO = +2V, COMP = open, CIN = 1µF, CVCC = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX Rising 1.18 1.23 1.28 Falling 1.11 1.17 1.21 0V < VOVI < 1.5V, TA = +25NC -100 0 +100 MAX17498A/MAX17498C 235 250 265 MAX17498B 470 500 530 MAX17498A/MAX17498C 92 94.5 97 MAX17498B 90 92 94 UNITS OVERVOLTAGE PROTECTION (OVI) OVI Threshold OVI Masking Delay OVI Input Leakage Current 2 V µs nA SWITCHING FREQUENCY AND MAXIMUM DUTY CYCLE (fSW and DMAX) Switching Frequency Maximum Duty Cycle Minimum Controllable On Time tONMIN 110 kHz % ns SOFT-START (SS) SS Set-Point Voltage SS Pullup Current VSS = 400mV SS Peak Current-Limit-Enable Threshold 1.2 1.22 1.24 V 9 10 11 µA 1.11 1.17 1.21 V ERROR AMPLIFIER (EA+, EA-, and COMP) EA+ Input Bias Current VEA+ = 1.5V, TA = +25NC -100 +100 nA EA- Input Bias Current VEA- = 1.5V, TA = +25NC -100 +100 nA Error-Amplifier Open-Loop Voltage Gain 90 dB Error-Amplifier Transconductance VCOMP = 2V, VLIM = 1V 1.5 1.8 2.1 mS Error-Amplifier Source Current VCOMP = 2V, EA- < EA+ 80 120 210 µA Error-Amplifier Sink Current VCOMP = 2V, EA- > EA+ 80 120 210 µA 0.45 0.5 0.55 I 175 380 mI A Current-Sense Transresistance INTERNAL SWITCH DMOS Switch On-Resistance (RDSON) ILX = 200mA DMOS Peak Current Limit LIM = 100K 1.62 1.9 2.23 DMOS Runaway Current Limit LIM = 100K 1.9 2.3 2.6 A LX Leakage Current VLX = 65V, TA = +25NC 0.1 1 µA 9 10 11 µA Peak Switch Current Limit with LIM Open 0.39 0.45 0.54 A Runaway Switch Current Limit with LIM Open 0.39 0.5 0.6 A CURRENT LIMIT (LIM) LIM Reference Current Maxim Integrated 3 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications ELECTRICAL CHARACTERISTICS (continued) (VIN = +15V, VEN/UVLO = +2V, COMP = open, CIN = 1µF, CVCC = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS Number of Runaway CurrentLimit Hits Before Hiccup Timeout 1 # Overcurrent Hiccup Timeout 32 ms SLOPE COMPENSATION (SLOPE) SLOPE Pullup Current 9 SLOPE-Compensation Resistor Range MAX17498B Default SLOPE-Compensation Ramp SLOPE = open 10 30 11 µA 150 kI 60 mV/µs POWER-GOOD SIGNAL (PGOOD) PGOOD Output-Leakage Current (Off State) VPGOOD = 5V, TA = +25NC -1 +1 µA PGOOD Output Voltage (On State) IPGOOD = 10mA 0 0.4 V PGOOD Higher Threshold EA- rising 93.5 95 96.5 % PGOOD Lower Threshold EA- falling 90.5 92 93.5 % PGOOD Delay After EA- Reaches 95% Regulation 4 ms +160 NC 20 NC THERMAL SHUTDOWN Thermal-Shutdown Threshold Thermal-Shutdown Hysteresis Temperature rising Note 1: All devices are 100% production tested at TA = +25NC. Limits over temperature are guaranteed by design. Note 2: The MAX17498A is intended for use in universal input power supplies. The internal clamp circuit at IN is used to prevent the bootstrap capacitor from charging to a voltage beyond the absolute maximum rating of the device when EN/UVLO is low (shutdown mode). Externally limit the maximum current to IN (hence to clamp) to 2mA (max) when EN/UVLO is low. Maxim Integrated 4 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Typical Operating Characteristics (VIN = +15V, VEN/UVLO = +2V, COMP = open, CIN = 1µF, CVCC = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted.) BOOTSTRAP UVLO WAKE-UP LEVEL vs. TEMPERATURE (MAX17498A) IN UVLO WAKE-UP LEVEL vs. TEMPERATURE (MAX17498B/MAX17498C) 20.22 20.20 20.18 20.16 4.10 4.05 4.00 3.95 3.90 20.14 -40 -20 0 20 40 60 80 -40 -20 100 120 0 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) IN UVLO SHUTDOWN LEVEL vs. TEMPERATURE EN/UVLO RISING LEVEL vs. TEMPERATURE 4.005 4.000 3.995 3.990 3.985 MAX17498 toc04 4.010 100 120 1.235 EN/UVLO RISING LEVEL (V) MAX17498 toc03 4.015 IN UVLO SHUTDOWN LEVEL (V) MAX17498 toc02 20.24 4.15 IN UVLO WAKE-UP LEVEL (V) MAX17498 toc01 BOOTSTRAP UVLO WAKE-UP LEVEL (V) 20.26 1.230 1.225 1.220 1.215 3.980 1.210 3.975 0 20 40 60 80 0 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) EN/UVLO FALLING LEVEL vs. TEMPERATURE OVI RISING LEVEL vs. TEMPERATURE OVI RISING LEVEL (V) 1.165 1.160 1.155 1.150 100 120 1.225 MAX17498 toc05 1.170 EN/UVLO FALLING LEVEL (V) -40 -20 100 120 MAX17498 toc06 -40 -20 1.220 1.215 1.145 1.140 -40 -20 0 20 40 60 TEMPERATURE (°C) Maxim Integrated 80 100 120 1.210 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) 5 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Typical Operating Characteristics (continued) (VIN = +15V, VEN/UVLO = +2V, COMP = open, CIN = 1µF, CVCC = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted.) OVI FALLING LEVEL vs. TEMPERATURE IN CURRENT UNDER UVLO vs. TEMPERATURE 1.150 1.145 1.140 1.135 28 26 24 22 20 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) IN CURRENT DURING SWITCHING vs. TEMPERATURE LX AND PRIMARY CURRENT WAVEFORM MAX17498 toc10 MAX17498 toc09 2.6 IN CURRENT DURING SWITCHING (mA) MAX17498 toc08 IN CURRENT UNDER UVLO (µA) 1.155 OVI FALLING LEVEL (V) 30 MAX17498 toc07 1.160 2.4 VLX 20V/div 2.2 2.0 IPRI 0.5A/div 1.8 1.6 1.4 -40 -20 0 20 40 60 80 100 120 1µs/div TEMPERATURE (°C) EN STARTUP WAVEFORM EN SHUTDOWN WAVEFORM MAX17498 toc11 MAX17498 toc12 EN/UVLO 5V/div EN/UVLO 5V/div VOUT 5V/div VOUT 5V/div VCOMP 1V/div VCOMP 1V/div 400µs/div Maxim Integrated 400µs/div 6 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Typical Operating Characteristics (continued) (VIN = +15V, VEN/UVLO = +2V, COMP = open, CIN = 1µF, CVCC = 1µF, TA = TJ = -40°C to +125°C, unless otherwise noted.) PEAK CURRENT LIMIT (ILIM) vs. RLIM AT ROOM TEMPERATURE PEAK CURRENT LIMIT AT RLIM = 100kI vs. TEMPERATURE 1200 1000 800 600 400 200 0 MAX17498 toc14 1400 PEAK CURRENT LIMIT AT RLIM (A) 1600 PEAK CURRENT LIMIT (mA) 2.00 MAX17498 toc13 1800 1.99 1.98 1.97 1.96 1.95 1.94 0 10 20 30 40 50 60 70 80 -40 -20 0 20 40 60 80 100 120 RLIM AT ROOM TEMPERATURE (kI) TEMPERATURE AT GIVEN RLIM (°C) TRANSIENT RESPONSE FOR 50% LOAD STEP ON FLYBACK OUTPUT (5V) BODE PLOT - (5V OUTPUT AT 24V INPUT) MAX17498 toc15 MAX17498 toc16 ILOAD 500mA/div PHASE 36°/div VOUT 200mV/div GAIN 10dB/div BW = 8.3kHz PM = 63° 2ms/div LOG (F) 100 90 EFFICIENCY (%) 80 VIN = 24V MAX17498 toc17 EFFICIENCY GRAPH AT 24V INPUT (FLYBACK REGULATOR) 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 LOAD CURRENT (A) Maxim Integrated 7 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications REF N.C. EA+ TOP VIEW N.C. Pin Configuration 12 11 10 9 PGOOD 13 MAX17498A MAX17498B MAX17498C PGND 14 LX 15 EP (SGND) 2 3 4 LIM EN/UVLO 1 OVI + VCC IN 16 8 SS 7 COMP 6 EA- 5 SLOPE TQFN-EP Pin Description PIN NAME FUNCTION 1 EN/UVLO Enable/Undervoltage-Lockout Pin. Drive to > 1.23V to start the devices. To externally program the UVLO threshold of the input supply, connect a resistor-divider between input supply EN/UVLO and SGND. 2 VCC Linear Regulator Output. Connect input bypass capacitor of at least 1µF from VCC to SGND as close as possible to the IC. 3 OVI Overvoltage Comparator Input. Connect a resistor-divider between the input supply (OVI) and SGND to set the input overvoltage threshold. 4 LIM Current-Limit Setting Pin. Connect a resistor between LIM and SGND to set the peak-current limit for nonisolated flyback converter. Peak-current limit defaults to 500mA if unconnected. 5 SLOPE Slope Compensation Input Pin. Connect a resistor between SLOPE and SGND to set slopecompensation ramp. Connect to VCC for minimum slope compensation. See the Programming Slope Compensation (SLOPE) section. 6 EA- Inverting Input of the Flexible Error Amplifier. Connect to mid-point of resistor-divider from the positive terminal output to SGND. 7 COMP Flexible Error-Amplifier Output. Connect the frequency-compensation network between COMP and SGND. 8 SS 9 EA+ Noninverting Input of the Flexible Error Amplifier. Connect to SS to use 1.22V as the reference. 10, 12 N.C. No Connection 11 REF Internal 1.22V Reference Output Pin. Connect a 100pF capacitor from REF to SGND. Maxim Integrated Soft-Start Pin. Connect a capacitor from SS to SGND to set the soft-start time interval. 8 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Pin Description (continued) PIN NAME FUNCTION 13 PGOOD 14 PGND 15 LX External Transformer/Inductor Connection for the Converter 16 IN Internal Linear Regulator Input. Connect IN to the input-voltage source. Bypass IN to PGND with a 1µF (min) ceramic capacitor. — EP (SGND) Exposed Pad. Internally connected to SGND. Connect EP to a large copper plane at SGND potential to provide adequate thermal dissipation. Connect EP (SGND) to PGND at a single point. Open-Drain Output. PGOOD goes high when EA- is within 5% of the set point. PGOOD pulls low when EA- falls below 92% of its set-point value. Power Ground for Converter Detailed Description The MAX17498A offers a bootstrap UVLO wakeup level of 20V with a wide hysteresis of 15V (min) optimized for implementing an isolated and nonisolated universal (85V AC to 265V AC) offline single-switch flyback converter or telecom (36V to 72V) power supplies. The MAX17498B/MAX17498C offer a UVLO wakeup level of 4.4V and are well suited for low-voltage DC-DC flyback/ boost power supplies. An internal reference (1.22V) can be used to regulate the output down to 1.23V in nonisolated flyback and boost applications. Additional semi-regulated outputs, if needed, can be generated by using additional secondary windings on the flyback converter transformer. A flexible error amplifier and REF allow the end-user selection between regulating positive and negative outputs. The devices utilize peak current-mode control and external compensation for optimizing the loop performance for various inductors and capacitors. The devices include a runaway current limit feature that triggers hiccup mode operation to protect the external component by halting switching for 32ms before restart. The devices include voltage soft-start for nonisolated designs and current soft-start for isolated designs to allow monotonic rise of the output voltage. The voltage or current soft-start can be selected using the SLOPE pin. See the Block Diagram for more information. Input Voltage Range The MAX17498A has different rising and falling UVLO thresholds on the IN pin than those of the MAX17498B/ MAX17498C. The thresholds for the MAX17498A are optimized for implementing power-supply startup schemes typically used for offline AC-DC power supplies. Maxim Integrated The MAX17498A is therefore well suited for operation from the rectified DC bus in AC-DC power-supply applications typically encountered in front-end industrial power-supply applications. As such, the MAX17498A has no limitation on the maximum input voltage as long as the external components are rated suitably and the maximum operating voltages of the MAX17498A are respected. The MAX17498A can successfully be used in universal input-rectified (85V to 265V AC) bus applications, rectified 3-phase DC bus applications, and telecom (36V to 72V DC) applications. The MAX17498B/MAX17498C are intended for implementing a flyback (isolated and nonisolated) and boost converter with an on-board 65V rated n-channel MOSFET. The IN pin of the MAX17498B/MAX17498C has a maximum operating voltage of 36V. The MAX17498B/ MAX17498C implement rising and falling thresholds on the IN pin that assume power-supply startup schemes, typical of lower voltage DC-DC applications, down to an input voltage of 4.5V DC. Therefore, flyback converters with a 4.5V to 36V supply voltage range can be implemented with the MAX17498B/MAX17498C. Internal Linear Regulator (VCC) The internal functions and driver circuits are designed to operate from a 5V Q5% power-supply voltage. The devices have an internal linear regulator that is powered from the IN pin and generates a 5V power rail. The output of the linear regulator is connected to the VCC pin and should be decoupled with a 2.2µF capacitor to ground for stable operation. The VCC converter output supplies the operating current for the devices. The maximum operating voltage of the IN pin is 29V for the MAX17498A and 36V for the MAX17498B/MAX17498C. 9 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Configuring the Power Stage (LX) The devices use an internal n-channel MOSFET to implement internal current sensing for current-mode control and overcurrent protection of the flyback/boost converter. To facilitate this, the drain of the internal nMOSFET is connected to the source of the external MOSFET in the MAX17498A high-input-voltage applications. The gate of the external MOSFET is connected to the IN pin. Ensure by design that the IN pin voltage does not exceed the maximum operating gate-voltage rating of the external MOSFET. The external MOSFET gate-source voltage is controlled by the switching action of the internal nMOSFET, while also sensing the source current of the external MOSFET. In the MAX17498B/ MAX17498C-based applications, the LX pin is directly connected to either the flyback transformer primary winding or to the boost-converter inductor. Maximum Duty Cycle The MAX17498A/MAX17498C operate at a maximum duty cycle of 94%. The MAX17498B offers a maximum duty cycle of 92%. The devices can be used to implement flyback and boost converters involving large inputto-output voltage ratios in DC-DC applications. Power-Good Signal (PGOOD) The devices include a PGOOD signal that serves as a power-good signal to the system. PGOOD is an open-drain signal and requires a pullup resistor to the preferred supply voltage. The PGOOD signal monitors EA- and pulls high when EA- is 95% (typ) of its regulation value (1.22V). For isolated power supplies, PGOOD cannot serve as a power-good signal. IN REF 10µA CHIPEN SSDONE SSDONE VCC 5V, 50mA LDO HICCUP VOLTAGE SS SS SS 33V CLAMP (MAX17498A ONLY) SSDONEF CURRENT SS MAX17498A MAX17498B MAX17498C POK BG 1.17V EN/UVLO CHIPEN VSLOPE OSC 1.23V VCS VSUM OVI LX CLK VCS RUNAWAY 1.23V 1 RUNAWAY PEAK 10µA LIMINT LIM VSUM 1.23V 10µA SLOPE 250mV DECODER CONTROL LOGIC AND DRIVER PGND PGOOD PWM PGOOD COMP COMP EA- FIXED SLOPE BLOCK VARIABLE SLOPE VOLTAGE SS CURRENT SS SSDONE EA+ EA- CHIPEN Figure 1. MAX17498A/MAX17498B/MAX17498C Block Diagram Maxim Integrated 10 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Soft-Start The devices implement soft-start operation for the flyback /boost converter. A capacitor connected to the SS pin programs the soft-start period for the flyback/ boost converter. The soft-start feature reduces the input inrush current. These devices allow the end user to select between voltage soft-start usually preferred in nonisolated applications and current soft-start, which is useful in isolated applications to get a monotonic rise in the output voltage. See the Programming Soft-Start of the Flyback/ Boost Converter (SS) section. Spread-Spectrum Factory Option For EMI-sensitive applications, a spread-spectrumenabled version of the device can be requested from the factory. The frequency-dithering feature modulates the switching frequency by Q10% at a rate of 4kHz. This spread-spectrum-modulation technique spreads the energy of switching-frequency harmonics over a wider band while reducing their peaks, helping to meet stringent EMI goals. Applications Information Startup Voltage and Input OvervoltageProtection Setting (EN/UVLO, OVI) The devices’ EN /UVLO pin serves as an enable /disable input, as well as an accurate programmable input UVLO pin. The devices do not commence startup operation unless the EN/UVLO pin voltage exceeds 1.23V (typ). The devices turn off if the EN/UVLO pin voltage falls below 1.17V (typ). A resistor-divider from the input DC bus to ground can be used to divide down and apply a fraction of the input DC voltage (VDC) to the EN/UVLO pin. The values of the resistor-divider can be selected so that the EN/UVLO pin voltage exceeds the 1.23V (typ) turn-on threshold at the desired input DC bus voltage. The same resistor-divider can be modified with an additional resistor (ROVI) to implement input overvoltage protection in addition to the EN/UVLO functionality as shown in Figure 2. When voltage at the OVI pin exceeds 1.23V (typ), the devices stop switching and resume switching operations only if voltage at the OVI pin falls below 1.17V (typ). For given values of startup DC input voltage (VSTART), and input overvoltage-protection voltage (VOVI), the Maxim Integrated resistor values for the divider can be calculated as follows, assuming a 24.9kI resistor for ROVI: V R EN= R OVI × OVI − 1 kΩ VSTART where ROVI is in kI while VSTART and VOVI are in volts. V = R OVI + R EN × START − 1 kΩ R SUM 1.23 where REN and ROVI are in kI. In universal AC input applications, RSUM might need to be implemented as equal resistors in series (RDC1, RDC2, RDC3) so that voltage across each resistor is limited to its maximum operation voltage. R = DC1 R= DC2 R= DC3 R SUM kΩ 3 For low-voltage DC-DC applications based on the MAX17498B/MAX17498C, a single resistor can be used in the place of RSUM, as the voltage across it is approximately 40V. VDC RDC1 RSUM RDC2 RDC3 EN/UVLO REN OVI MAX17498A MAX17498B MAX17498C ROVI Figure 2. Programming EN/UVLO and OVI 11 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Startup Operation The MAX17498A is optimized for implementing an offline single-switch flyback converter and has a 20V IN UVLO wake-up level with hysteresis of 15V (min). In offline applications, a simple cost-effective RC startup circuit is used. When the input DC voltage is applied, the startup resistor (RSTART) charges the startup capacitor (CSTART), causing the voltage at the IN pin to increase towards the wake-up IN UVLO threshold (20V typ). During this time, the MAX17498A draws a low startup current of 20µA (typ) through RSTART. When the voltage at IN reaches the wake-up IN UVLO threshold, the MAX17498A commences switching operations and drives the internal n-channel MOSFET whose drain is connected to the LX pin. In this condition, the MAX17498A draws 1.8mA current from CSTART, in addition to the current required to switch the gate of the external nMOSFET. Since this current cannot be supported by the current through RSTART, the voltage on CSTART starts to drop. When suitably configured, as shown in Figure 10, the external nMOSFET is switched by the LX pin and the flyback converter generates pulses in bias winding NB. The soft-start period of the converter should be programmed so the bias winding pulses sustain the voltage on CSTART before it falls below 5V, thus allowing continued operation. The large hysteresis (15V typ) of the MAX17498A allows for a small startup capacitor (CSTART). The low startup curent (20µA typ) allows the use of a large start resistor (RSTART), thus reducing power dissipation at higher DC bus voltages. Figure 3 shows the typical RC startup scheme for the MAX17498A. RSTART might need to be implemented as equal, multiple VDC D2 resistors in series (RIN1, RIN2, and RIN3) to share the applied high DC voltage in offline applications so that the voltage across each resistor is limited to the maximum continuous operating-voltage rating. RSTART and CSTART can be calculated as: 0.04 × t SS × Q G × fsw = C START 0.75 C VCC + IIN × t SS × 0.1 + µF 10 6 where IIN is the supply current drawn at the IN pin in mA, QG is the gate charge of the external nMOSFET in nC, fSW is the switching frequency of the converter in Hz, and tSS is the soft-start time programmed for the flyback converter in ms. CVCC is the cummulative capacitor used in VCC node. See the Programming Soft-Start of the Flyback/Boost Converter (SS) section. R START = (VSTART − 10) × 50 kΩ 1 + C START where CSTART is the startup capacitor in µF. For designs that cannot accept power dissipation in the startup resistors at high DC input voltages in offline applications, the startup circuit can be set up with a current source instead of a startup resistor as shown in Figure 4. VDC RIN1 VOUT VDC D2 RSTART VDC NB NP NS VOUT D1 D1 RIN2 NB COUT NP NS COUT RIN3 RIN1 IN RSTART RIN2 MAX17498A RIN3 IN CSTART LX LDO VCC CVCC Figure 3. MAX17498A RC-Based Startup Circuit Maxim Integrated MAX17498A RISRC IN CSTART LX LDO VCC CVCC Figure 4. MAX17498A Current Source-Based Startup Circuit 12 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications VDC VOUT D1 IN IN VCC LDO CIN MAX17498B MAX17498C COUT CVCC LX Np Ns the MAX17498B/MAX17498C can be tolerated, the IN pin is directly connected to the DC input, as shown in Figure 5. In the case of higher DC input voltages (e.g., 16V to 32V DC), a startup circuit, such as that shown in Figure 6, can be used to minimize power dissipation. In this startup scheme, the transistor (Q1) supplies the switching current until a bias winding NB comes up and turns off Q1. The resistor (RZ) can be calculated as: RZ = 2 × (VINMIN − 6.3) kΩ where VINMIN is the minimum input DC voltage. Programming Soft-Start of the Flyback/Boost Converter (SS) Figure 5. MAX17498B/MAX17498C Typical Startup Circuit with IN Connected Directly to DC Input The soft-start period in the voltage soft-start scheme of the devices can be programmed by selecting the value of the capacitor connected from the SS pin to GND. The capacitor CSS can be calculated as: VDC C= SS 8.13 × t SS nF VOUT D2 where tSS is expressed in ms. The soft-start period in the current soft-start scheme depends on the load at the output and the soft-start capacitor. RZ D1 Q1 ZD1 6.3V NB MAX17498B MAX17498C IN IN LDO CIN COUT LX Np Ns VCC CVCC Figure 6. MAX17498B/MAX17498C Typical Startup Circuit with Bias Winding to Turn Off Q1 and Reduce Power Dissipation Resistors RSUM and RISRC can be calculated as: VSTART MΩ 10 VBEQ1 = RISRC MΩ 70 = R SUM The IN UVLO wakeup threshold of the MAX17498B/ MAX17498C is set to 3.9V (typ) with a 200mV hysteresis, optimized for low-voltage DC-DC applications down to 4.5V. For applications where the input DC voltage is low enough (e.g., 4.5V to 5.5V DC) that the power loss incurred to supply the operating current of Maxim Integrated Programming Output Voltage The devices incorporate a flexible error amplifier that allows regulating to both the positive and negative outputs. The positive output voltage of the converter can be programmed by selecting the correct values for the resistor-divider connected from VOUT, the flyback /boost output to ground, with the midpoint of the divider connected to the EA- pin (Figure 7). With RB selected in the range of 20kI to 50kI, RU can be calculated as: V RU = RB × OUT − 1 kΩ 1.22 where RB is in kI. The negative output voltage of the converter can be programmed by selecting the correct values for the resistor-divider connected from VOUT, the flyback /boost output to REF with the midpoint of the divider connected to the EA+ pin (Figure 8). With R1 selected in the range of 20kI to 50kI, R2 can be calculated as: V R2 = R1× OUT kΩ 1.22 where R1 is in kI. 13 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Current-Limit Programming (LIM) The devices include a robust overcurrent-protection scheme that protects the device under overload and short-circuit conditions. For the flyback/boost converter, the devices include a cycle-by-cycle peak current limit that turns off the driver whenever the current into the LX pin exceeds an internal limit that is programmed by the resistor connected from the LIM pin to GND. The devices include a runaway current limit that protects the device under short-circuit conditions. One occurrence of the runaway current limit triggers a hiccup mode that protects the converter by immediately suspending switching for a period of time (32ms). This allows the overload current to decay due to power loss in the converter resistances, load, and the output diode of the flyback/boost converter before soft-start is attempted again. The resistor at the LIM pin for a desired current limit (IPK) can be calculated as: VOUT RU EARB Figure 7. Programming the Positive Output Voltage VOUT R LIM =50 × IPK kΩ where IPK is expressed in amperes. For a given peak current-limit setting, the runaway current limit is typically 20% higher. The runaway currentlimit-triggered hiccup operation is always enabled even during soft-start. MAX17498A MAX17498B MAX17498C EAREA- MAX17498A MAX17498B MAX17498C REF R1 R2 EA+ Figure 8. Programming the Negative Output Voltage Programming Slope Compensation (SLOPE) When the MAX17498A//MAX17498B/MAX17498C devices operate at a maximum duty cycle of 49%, in theory they do not require slope compensation for preventing subharmonic instability that occurs naturally in continuous-mode peak current-mode-controlled converters. In practice, the devices require a minimum amount of slope compensation to provide stable, jitter-free operation. These devices allow the user to program this default value of slope compensation simply by connecting the SLOPE pin to VCC. It is recommended that discontinuous-mode designs also use this minimum amount of slope compensation to provide noise immunity and jitter-free operation. To avoid subharmonic instability that occurs naturally over all specified load and line conditions in peak cur- Maxim Integrated rent-mode-controlled converters operating at duty cycles greater than 50%, the converter needs slope compensation. A minimum amount of slope signal is added to the sensed current signal even for converters operating below 50% duty to provide stable, jitter-free operation. The SLOPE pin allows the user to program the necessary slope compensation by setting the value of the resistor (RSLOPE) connected from SLOPE pin to ground. R SLOPE =0.5 × S E kΩ where the slope (SE) is expressed in millivolts per microsecond. 14 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Thermal Considerations It should be ensured that the junction temperature of the devices does not exceed +125°C under the operating conditions specified for the power supply. The power dissipated in the devices to operate can be calculated using the following equation: P= IN VIN × IIN where VIN is the voltage applied at the IN pin and IIN is operating supply current. The internal n-channel MOSFET experiences conduction loss and transition loss when switching between on and off states. These losses are calculated as: PCONDUCTION = ILXRMS 2 × R DSONLX PTRANSITION = 0.5 × VINMAX × IPK × (t R + t F ) × fSW where tR and tF are the rise and fall times of the internal nMOSFET in CCM operation. In DCM operation, since the switch current starts from zero, only tF exists and the transition-loss equation changes to: PTRANSITION = 0.5 × VINMAX × IPK × t F × fSW Additional loss occurs in the system in every switching cycle due to energy stored in the drain-source capacitance of the internal MOSFET being lost when the MOSFET turns on and discharges the drain-source capacitance voltage to zero. This loss is estimated as: PCAP =0.5 × C DS × VDSMAX × fSW The total power loss in the devices can be calculated from the following equation: PLOSS = PIN + PCONDUCTION + PTRANSITION + PCAP The maximum power that can be dissipated in the devices is 1666mW at +70°C temperature. The powerdissipation capability should be derated as the temperature rises above +70°C at 21mW/°C. For a multilayer board, the thermal-performance metrics for the package are given below: θ JA = 48°C / W The junction-temperature rise of the devices can be estimated at any given maximum ambient temperature (TAMAX) from the following equation: TJMAX = TAMAX + (θ JA × PLOSS ) If the application has a thermal-management system that ensures that the exposed pad of the devices is maintained at a given temperature (TEPMAX) by using proper heatsinks, then the junction-temperature rise of the devices can be estimated at any given maximum ambient temperature from the following equation: T= üüüüüüü T + (θ ×P ) Layout, Grounding, and Bypassing All connections carrying pulsed currents must be very short and as wide as possible. The inductance of these connections must be kept to an absolute minimum due to the high di/dt of the currents in high-frequency switching power converters. This implies that the loop areas for forward and return pulsed currents in various parts of the circuit should be minimized. Additionally, small-current loop areas reduce radiated EMI. Similarly, the heatsink of the main MOSFET presents a dV/dt source, and therefore, the surface area of the MOSFET heatsink should be minimized as much as possible. Ground planes must be kept as intact as possible. The ground plane for the power section of the converter should be kept separate from the analog ground plane, except for a connection at the least noisy section of the power ground plane, typically the return of the input filter capacitor. The negative terminal of the filter capacitor, ground return of the power switch, and current-sensing resistor must be close together. PCB layout also affects the thermal performance of the design. A number of thermal vias that connect to a large ground plane should be provided under the exposed pad of the part for efficient heat dissipation. For a sample layout that ensures firstpass success, refer to the MAX17498B Evaluation Kit. For universal AC input designs, follow all applicable safety regulations. Offline power supplies can require UL, VDE, and other similar agency approvals. θ JC = 10°C / W Maxim Integrated 15 Maxim Integrated NEUTRAL 85V AC TO 265V AC LINE D1 S5KC-13-F C1 0.1µF, 630V R1 10I VIN VOUT2 C2 100µF D2 RB160M-60TR R8 1.2MI R7 1.2MI L1 1µH C7 2.2µF, 50V R15 3MI R14 3MI 3MI R12 3MI R6 20.5kI R5 82kI R4 2.2MI R3 2.2MI R2 2.2MI VIN Q1 BC849CW IN C9 22nF C6 0.47µF, 35V R23 10kI N2 FQT1N80TF R9 15kI C11 47pF R17 1kI C4 2.2µF VCC R11 49.9kI C12 47nF IN OVI EN/UVLO PGND COMP EA- SLOPE VCC LX EP EA+ N.C. REF N.C. PGOOD MAX17498A LIM SS IN REF R22 49.3kI R10 133kI C3 100pF C8 0.1µF, 25V IN REF VOUT1 D5 BZT52C18-7F R20 10I R16 100kI, 0.5W N1 FQD1N80TM D3 US1K-TP C10 2.2nF, 250V T1 D6 D4 RF101L2STE25 C18 141µF, 6.3V C14 10µF, 16V C15 10µF, 16V VOUT1 C16 OPEN VOUT2 VOUT1 -3.3V, 2A PGND VOUT2 8.7V, 0.3A MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Typical Application Circuits Figure 9. MAX17498A Nonisolated Multiple-Output AC-DC Power Supply 16 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications VIN VOUT D2 T1 VIN C1 18V TO 36V 47µF, INPUT 63V C4 4.7µF, 50V C2 4.7µF, 50V VOUT C12 22µF, 16V C3 33nF R1 7.5kI C5 0.22µF, 50V C13 22µF, 16V C14 22µF, 16V 5V, 1.5A OUTPUT GND D1 PGND IN LX SS C9 68nF REF EA+ U1 R6 86.6kI PGOOD PGOOD R12 10kI MAX17498B LIM VCC VOUT VCC R9 10kI C6 2.2µF, 16V VCC VCC VFB R15 1kI EAR11 15kI REF C10 COMP R20 30.3kI C18 OPEN C15 4.7nF 100pF VIN PGND REF VFB R13 511I R3 348kI EN/UVLO EN/UVLO OVI PGND OVI R18 15kI SLOPE 2 R7 0I R4 20kI U2 U3 3 C16 33pF 1 R19 10kI R5 10kI Figure 10. MAX17498B Isolated DC-DC Power Supply Maxim Integrated 17 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications VIN VIN 4.5V TO 10V DC EP IN C1 10µF SS C5 47nF C7 1µF SS IN R2 71.5kI LIM PGND C2 2.2µF L1 56µH VOUT 24V, 0.1A D1 VCC LX VCC R2 12kI C6 2.2µF, 50V MAX17498B SLOPE PGOOD PGOOD R9 10kI R3 374kI VCC EA- R4 20kI N.C. VOUT REF R5 2.73kI COMP C3 100nF REF C4 270pF VIN R6 0I C8 100pF N.C. PGND SS EN/UVLO EA+ R7 OPEN OVI R8 0I Figure 11. MAX17498B Boost Power Supply Maxim Integrated 18 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Ordering Information PART TEMP RANGE MAX17498AATE+ -40°C to +125°C PIN-PACKAGE 16 TQFN-EP* 250kHz, Offline Flyback Converter DESCRIPTION MAX17498BATE+ -40°C to +125°C 16 TQFN-EP* 500kHz, Low-Voltage DC-DC Flyback/Boost Converter MAX17498CATE+ -40°C to +125°C 16 TQFN-EP* 250kHz, Low-Voltage DC-DC Flyback Converter +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 TQFN-EP T1633+5 21-0136 90-0032 Maxim Integrated 19 MAX17498A/MAX17498B/MAX17498C AC-DC and DC-DC Peak Current-Mode Converters for Flyback/Boost Applications Revision History REVISION NUMBER REVISION DATE 0 9/11 Initial release — 1 3/12 Removed future product references for MAX17498B and MAX17498C 27 2 2/13 Changed the maximum duty cycle for the A/C variants to 92% (min), 94.5% (typ), and 97% (max); updated General Description, Benefits and Features, Detailed Description, Maximum Duty Cycle, Current-Limit Programming (LIM), Programming Slope Compensation (SLOPE), and Peak/RMS-Current Calculation secondary RMS current equation 1, 3, 9, 10, 14, 15 3 4/13 Updated Benefits and Features, removed sections on pages 15–21, updated Figures 1, 3–6, 11, 12 1, 10, 12, 13, 15–22, 24, 25 DESCRIPTION PAGES CHANGED Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 © 2013 Maxim Integrated Products, Inc. 20 Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.