MAXIM MAX17597

EVALUATION KIT AVAILABLE
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
General Description
Benefits and Features
The MAX17595/MAX17596/MAX17597 is a family of peakcurrent-mode controllers for design of wide input-voltage
flyback and boost regulators. The MAX17595 offers
optimized input thresholds for universal input AC-DC
converters and telecom DC-DC (36V to 72V input range)
power supplies. The MAX17596/MAX17597 offer input
thresholds suitable for low-voltage DC-DC applications
(4.5V to 36V). The MAX17597 implements a boost converter. All three controllers contain a built-in gate driver
for external n-channel MOSFETs.
SPeak-Current-Mode Offline (Universal Input AC)
and Telecom (36V to 72V) Flyback Controller—
MAX17595
The
MAX17595/ MAX17596 / MAX17597
house
an internal error amplifier with 1% accurate reference, eliminating the need for an external
reference. The switching frequency is programmable
from 100kHz to 1MHz with an accuracy of 8% , allowing
optimization of magnetic and filter components, resulting in compact and cost-effective power conversion. For
EMI-sensitive applications, the MAX17595/MAX17596/
MAX17597 family incorporates a programmable frequency dithering scheme, enabling low-EMI spread-spectrum
operation.
SLow 20µA Startup Supply Current
Users can start the power supply precisely at the desired
input voltage, implement input overvoltage protection, and
program soft-start time. A programmable slope compensation scheme is provided to ensuree stability of the
peak-current-mode control scheme.
Hiccup-mode overcurrent protection and thermal
shutdown are provided to minimize dissipation in
overcurrent and overtemperature fault conditions.
SPeak-Current-Mode DC-DC (4.5V to 36V) Flyback
Controller—MAX17596
SPeak-Current-Mode Nonsynchronous (4.5V to 36V)
Boost PWM Controller—MAX17597
SCurrent Mode Control Provides Excellent
Transient Response
S100kHz to 1MHz Programmable Switching
Frequency with Optional Synchronization
SProgrammable Frequency Dithering for Low-EMI
Spread-Spectrum Operation
SAdjustable Current Limit with External CurrentSense Resistor
SFast Cycle-By-Cycle Peak Current Limiting
SHiccup-Mode Short-Circuit Protection
SOvertemperature Protection
SProgrammable Soft-Start and Slope Compensation
SInput Overvoltage Protection
SSpace-Saving, 3mm x 3mm TQFN Package
Ordering Information/Selector Guide appears at end of
data sheet.
Applications
Universal Input Offline AC-DC Power Supplies
Wide-Range DC-Input Flyback/Boost Battery
Chargers
Battery-Powered Applications
Industrial, Telecom, and Automotive Applications
For related parts and recommended products to use with this part,
refer to www.maximintegrated.com/MAX17595.related.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6178; Rev 2; 6/13
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ABSOLUTE MAXIMUM RATINGS
VIN to SGND...........................................................-0.3V to +40V
VDRV to SGND...................................-0.3V to +16V (MAX17595)
VDRV to SGND...........-0.3V to +6V (MAX17596 and MAX17597)
NDRV to SGND..................................... -0.3V to +(VDRV + 0.3)V
EN/UVLO to SGND................................... -0.3V to +(VIN + 0.3)V
OVI, RT, DITHER, COMP, SS, FB,
SLOPE to SGND..................................................... -0.3V to +6V
CS to SGND.............................................................-0.8V to +6V
PGND to SGND.....................................................-0.3V to +0.3V
Maximum Input/Output Current (Continuous)
VIN, VDRV..........................................................................100mA
NDRV (pulsed, for less than 100ns)........................... 1.5A/-0.9A
Continuous Power Dissipation TQFN (single-layer board)
(derate 20.8mW/NC above +70NC).............................1666mW
Operating Temperature Range......................... -40NC to +125NC
Storage Temperature Range............................. -65NC to +150NC
Junction Temperature......................................................+150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
Junction-to-Ambient Thermal Resistance (qJA)...............48°C/W
Junction-to-Case Thermal Resistance (qJC)......................7°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT SUPPLY (VIN)
VIN Voltage Range
VIN
MAX17595
8
29
4.5
MAX17595
18.5
20
21.5
MAX17596/MAX17597
3.8
4.1
4.4
MAX17595
6.5
7
7.5
MAX17596/MAX17597
3.6
3.9
4.2
MAX17596/MAX17597
36
V
VIN Bootstrap UVLO
Wakeup
VIN-UVR
VIN rising #
VIN Bootstrap UVLO
Shutdown Level
VIN-UVF
VIN falling $
VIN Supply Startup Current
(Under UVLO)
IVINSTARTUP
VIN < UVLO
20
32
FA
32
FA
VIN Supply Shutdown
Current
IIN-SH
VEN = 0V
20
VIN Supply Current
IIN-SW
Switching, fSW = 400kHz
2
VIN Clamp Voltage
VINC
MAX17595, IVIN = 2mA sinking, VEN = 0V (Note
3)
30
33
36
VENR
VEN rising #
1.16
1.21
1.26
VENF
VEN falling $
1.1
1.15
1.2
V
V
mA
V
ENABLE (EN)
EN Undervoltage
Threshold
EN Input Leakage Current
Maxim Integrated
IEN
VEN = 1.5V, TA = +25NC
-100
+100
V
nA
2
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
8V < VIN < 15V and 0mA < IVDRV < 50mA
(MAX17595)
7.1
7.4
7.7
6V < VIN < 15V and 0mA < IVDRV < 50mA
(MAX17596/MAX17597)
4.7
4.9
IVDRV-MAX
70
100
VVDRV-DO
VIN = 4.5V, IVDRV = 20mA (MAX17596/
MAX17597)
4.2
VOVIR
VOVI rising #
1.16
1.21
1.26
VOVIF
VOVI falling $
1.1
1.15
1.2
UNITS
INTERNAL LDO (VDRV)
VDRV Output Voltage
Range
VDRV Current Limit
VDRV Dropout
VDRV
V
OVERVOLTAGE PROTECTION (OVI)
OVI Overvoltage Threshold
OVI Masking Delay
OVI Input Leakage Current
tOVI-MD
IOVI
VOVI = 1V, TA = +25NC
-100
NDRV Switching
Frequency Range
fSW
100
NDRV Switching
Frequency Accuracy
-8
2
5.1
mA
V
V
Fs
+100
nA
1000
kHz
+8
%
OSCILLATOR (RT)
Maximum Duty Cycle
DMAX
fSW = 400kHz
(MAX17595/MAX17596)
46
48
50
(MAX17597)
90
92.5
95
%
SYNCHRONIZATION (DITHER/SYNC)
Synchronization Logic-High
Input
Synchronization Pulse
Width
Synchronization Frequency
Range
VHI-SYNC
fSYNC
3
(MAX17595/MAX17596) (Note 4)
V
50 ns
1.8 x fSW
Hz
1.1 x fSW
DITHERING RAMP GENERATOR (DITHER/SYNC)
Charging Current
Discharging Current
Ramp-High Trip Point
Ramp-Low Trip Point
Maxim Integrated
45
50
55
FA
43
50
57
FA
2
0.4
V
V
3
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
11
FA
SOFT-START (SS)
Soft-Start Charging Current
SS Bias Voltage
ISSCH
VSS
NDRV DRIVER (NDRV)
Pulldown Impedance
RNDRV-N
INDRV (sinking) = 100mA
Pullup Impedance
RNDRV-P
INDRV (sourcing) = 50mA
Peak Sink Current
Peak Source Current
CNDRV = 10nF
CNDRV = 10nF
9
10
1.19
1.21
1.23 V
1.37
3
I
4.26
8.5
I
1.5
A
0.9
10
A
Fall Time
tNDRV-F
CNDRV = 1nF
Rise Time
tNDRV-R
CNDRV = 1nF
20
ns
ns
CURRENT-LIMIT COMPARATOR (CS)
Cycle-by-Cycle Peak
Current-Limit Threshold
VCS-PEAK
290
305
320
mV
Cycle-by-Cycle Runaway
Current-Limit Threshold
VCS-RUN
340
360
380
mV
Current-Sense LeadingEdge Blanking Time
tCS-BLANK
From NDRV rising # edge
70
ns
From CS rising (10mV overdrive) to
NDRV falling (excluding leading
edge blanking)
40
ns
Propagation Delay from
Comparator Input to NDRV
tPDCS
Number of Consecutive
Peak- Current-Limit Events
to Hiccup
NHICCUP-P
8
events
Number of RunawayCurrent-Limit Events to
Hiccup
NHICCUP-R
1
event
32,768
cycle
90
Overcurrent Hiccup
Timeout
Minimum On-Time
tON-MIN
130
170 ns
SLOPE COMPENSATION (SLOPE)
Slope Bias Current
Slope Resistor Range
Maxim Integrated
ISLOPE
9
10
11
FA
25
200
kI
4
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V (for the MAX17595, bring VIN up to 21V for startup), VCS = VSLOPE = VDITHER = VFB = VOVI = VSGND = VPGND = 0V,
VEN/UVLO = +2V; NDRV, SS, COMP are unconnected, RRT = 25kI, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless
otherwise noted. Typical values are at TA = TJ = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
Slope Voltage Range
for Default Slope
Compensation
4
Slope Voltage Range
for Programmable Slope
Compensation
0.2
Slope Compensation Ramp
RSLOPE = 100kW
140
165
Default Slope
Compensation Ramp
4V < VSLOPE
MAX
UNITS
V
2
V
190
mV/Fs
50
mV/Fs
PWM COMPARATOR
Comparator Offset Voltage
VPWM-OS
VCOMP, when VCS = 0
1.65
1.81
2
V
Current-Sense Gain
ACS-PWM
DVCOMP/DVCS
1.75
1.97
2.15
V/V
Comparator Propagation
Delay
tPWM
Change in VCS = 10mV (including internal leadedge blanking)
FB Reference Voltage
VREF
VFB, when ICOMP = 0 and VCOMP = 1.8V
1.19
FB Input Bias Current
IFB
VFB = 1.5V, TA = +25NC
-100
110
ns
ERROR AMPLIFIER
V
+100
nA
90
Transconductance
Gm
1.5
1.8
2.1
Transconductance
Bandwidth
BW
Open-loop (gain = 1), -3dB frequency
10
Source Current
VCOMP = 1.8V, VFB = 1V
80
120
210
FA
VCOMP = 1.8V, VFB = 1.75V
80
120
210
FA
Thermal-Shutdown
Threshold
Temperature rising
+160
NC
Thermal-Shutdown
Hysteresis
20
NC
Sink Current
AEAMP
1.23
Voltage Gain
1.21
dB
mS
MHz
THERMAL SHUTDOWN
Note 2: All devices 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 3: The MAX17595 is intended for use in universal input power supplies. The internal clamp circuit at VIN is used to prevent
the bootstrap capacitor from charging to a voltage beyond the absolute maximum rating of the device when EN is low
(shutdown mode). Externally limit the maximum current to VIN (hence to clamp) to 2mA (max) when EN is low.
Note 4: Using an external clock for synchronization increases the maximum duty cycle by a factor equal to fSYNC / fSW for the
MAX17595/MAX17596. External synchronization is not available for the MAX17597.
Maxim Integrated
5
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Characteristics
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.)
VIN WAKE-UP LEVEL vs. TEMPERATURE
(MAX17596/MAX17597)
BOOTSTRAP UVLO WAKE-UP LEVEL
vs. TEMPERATURE (MAX17595)
VIN BOOTSTRAP UVLO SHUTDOWN LEVEL (V)
4.12
20.03
VIN WAKE-UP LEVEL (V)
BOOTSTRAP UVLO WAKE-UP LEVEL (V)
4.13
MAX17595/6/7 toc01
20.04
20.02
20.01
20.00
19.99
4.11
4.10
4.09
4.08
19.98
-40 -20
0
20
40
60
80
-40 -20
VIN FALLING THRESHOLD vs. TEMPERATURE
(MAX17596/MAX17597)
0
20
40
60
80
7.020
7.015
7.010
7.005
7.000
TEMPERATURE (°C)
3.90
3.89
3.88
40
60
80
100 120
MAX17595/6/7 toc05
1.208
1.207
1.206
1.205
1.204
1.203
1.202
-40 -20
0
20
40
60
80
-40 -20
100 120
0
EN/UVLO FALLING THRESHOLD
vs. TEMPERATURE
40
60
80
100 120
OVI RISING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc06
1.148
1.147
1.146
1.145
MAX17595/6/7 toc07
1.211
OVI RISING THRESHOLD (V)
1.149
20
TEMPERATURE (°C)
TEMPERATURE (°C)
EN / UVLO FALLING THRESHOLD (V)
20
TEMPERATURE (°C)
1.209
3.97
1.210
1.209
1.208
1.207
-40 -20
0
20
40
60
TEMPERATURE (°C)
Maxim Integrated
0
EN/ UVLO RISING THRESHOLD
vs. TEMPERATURE
EN/UVLO RISING THRESHOLD (V)
3.91
-40 -20
100 120
MAX17595/6/7 toc04
3.92
MAX17595/6/7 toc03
7.025
6.995
4.07
100 120
TEMPERATURE (°C)
VIN UVLO SHUTDOWN THRESHOLD (V)
VIN FALLING THRESHOLD
vs. TEMPERATURE (MAX17595)
MAX17595/6/7 toc02
80
100 120
-40 -20
0
20
40
60
80
100 120
TEMPERATURE (°C)
6
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Characteristics (continued)
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.)
OVI FALLING THRESHOLD
vs. TEMPERATURE
MAX17595/6/7 toc08
1.1495
1.1490
1.1485
1.1480
1.1475
2.4
24.5
23.5
22.5
21.5
0
20
40
60
80
0
20
40
60
80
2.0
1.9
1.8
100 120
-40 -20
0
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY (kHz)
700
600
500
400
300
200
80
100 120
RRT = 10kI
850
750
650
550
450
350
250
RRT = 100kI
150
100
60
MAX17595/6/7 toc12
950
800
40
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
MAX17595/6/7 toc11
900
20
TEMPERATURE (°C)
NDRV SWITCHING FREQUENCY
vs. RESISTOR
NDRV SWITCHING FREQUENCY (kHz)
2.1
1.5
-40 -20
TEMPERATURE (°C)
50
0
5
15
25 35 45 55
65 75 85 95
FREQUENCY SELECTION RESISTOR (kI)
FREQUENCY DITHERING vs. RDITHER
-40 -20
0
20
40
60
80
100 120
TEMPERATURE (°C)
SWITCHING WAVEFORMS (MAX17595)
MAX17595/6/7 toc13
14
FREQUENCY DITHERING (%)
2.2
1.6
100 120
1000
2.3
1.7
20.5
19.5
-40 -20
MAX17595/6/7 toc10
2.5
SWITCHING CURRENT (mA)
1.1500
SWITCHING CURRENT
vs. TEMPERATURE
MAX17595/6/7 toc09
25.5
VIN SUPPLY CURRENT UNDER UVLO (µA)
1.1505
OVI FALLING THRESHOLD (V)
VIN SUPPLY CURRENT UNDER UVLO
vs. TEMPERATURE
MAX17595/6/7 toc14
12
10
VDRAIN
100V/div
8
6
IPRI
1A /div
4
2
200 300 400 500 600 700 800 900 1000
4µs/div
RDITHER (kI)
Maxim Integrated
7
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Characteristics (continued)
(VIN = 15V, VEN/UVLO = +2V, COMP = open, CVIN = 1FF, CVDRV = 1FF, TA = TJ = -40NC to +125NC, unless otherwise noted.)
ENABLE STARTUP
ENABLE SHUTDOWN
MAX17595/6/7 toc15
HICCUP OPERATION
MAX17595/6/7 toc16
EN/UVLO
5V/div
MAX17595/6/7 toc17
EN/UVLO
5V/div
VOUT
10V/div
VOUT
10V/div
VOUT
10V/div
COMP
1V/div
VDRAIN
100V/div
COMP
1V/div
2ms/div
IPRI
2A/div
1ms/div
400µs /div
LOAD TRANSIENT RESPONSE
(FIGURE 9 OUTPUT)
SWITCHING CURRENT
vs. SWITCHING FREQUENCY
MAX17595/6/7 toc18
MAX17595/6/7 toc19
SWITCHING CURRENT (mA)
2.5
VOUT (AC)
0.5V/div
2.3
2.1
ILOAD
0.5A/div
1.9
1.7
1.5
100 200 300 400 500 600 700 800 900 1000
0.4ms/div
SWITCHING FREQUENCY (Hz)
EFFICIENCY GRAPH
(FIGURE 9 OUTPUT)
BODE PLOT (FIGURE 9 OUTPUT)
MAX17595/6/7 toc20
MAX17595/6/7 toc21
100
90
PHASE
36°/div
GAIN
10dB/div
BANDWIDTH = 11.5kHz
PHASE MARGIN = 50.9°
6 8 1
2
4
6 8 1
2
4
EFFICIENCY (%)
80
VDC = 120V
70
60
50
40
30
20
10
0
0
Maxim Integrated
0.2
0.4
0.6
0.8
1.0
LOAD CURRENT (A)
1.2
1.4
8
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
NDRV
PGND
CS
N.C.
NDRV
PGND
CS
TOP VIEW
N.C.
Pin Configuration
12
11
10
9
12
11
10
9
VDRV 13
MAX17595
MAX17596
VIN 14
EN / UVLO 15
EP
7
SS
VIN 14
6
FB
EN / UVLO 15
5
COMP
VDRV 13
EP
1
2
3
4
1
2
3
4
DITHER /
SYNC
N.C.
SLOPE
RT
DITHER
+
RT
OVI 16
MAX17597
SLOPE
+
SGND
N.C.
OVI 16
8
TQFN
8
SGND
7
SS
6
FB
5
COMP
TQFN
Pin Description
PIN
NAME
1, 12
N.C.
FUNCTION
No Connection
2
SLOPE
Slope Compensation Input. A resistor, RSLOPE, connected from SLOPE to SGND programs the
amount of slope compensation with reference-voltage soft-start mode. Connecting this pin to
SGND enables duty-cycle soft-start with default slope compensation of 50mV/Fs. Setting VSLOPE >
4V enables reference voltage soft-start with default slope compensation of 50mV/Fs.
3
RT
Switching Frequency Programming Resistor Connection. Connect resistor RRT from RT to SGND to
set the PWM switching frequency.
4
DITHER/SYNC
Frequency Dithering Programming or Synchronization Connection. For spread-spectrum frequency
operation, connect a capacitor from DITHER to SGND, and a resistor from DITHER to RT. To
synchronize the internal oscillator to the externally applied frequency (MAX17595/MAX17596 only),
connect DITHER/SYNC to the synchronization pulse.
5
COMP
6
FB
Transconductance Amplifier Inverting Input
7
SS
Soft-Start Capacitor Pin for Flyback Regulator. Connect a capacitor CSS from SS to SGND to set
the soft-start time interval.
8
SGND
9
CS
10
PGND
Power Ground. Connect PGND to the power ground plane.
11
NDRV
External Switching nMOS Gate-Driver Output
Maxim Integrated
Transconductance Amplifier Output. Connect the frequency compensation network between
COMP and SGND.
Signal Ground. Connect SGND to the signal ground plane.
Current-Sense Input. Peak-current-limit trip voltage is 300mV (typ).
9
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Pin Description (continued)
PIN
NAME
FUNCTION
13
VDRV
Linear Regulator Output and Driver Input. Connect a 1µF bypass capacitor from VDRV to SGND as
close as possible to the IC.
14
VIN
Internal VDRV Regulator Input. Connect VIN to the input voltage source. Bypass VIN to PGND with
a 1FF minimum ceramic capacitor.
15
EN/UVLO
16
OVI
Overvoltage Comparator Input. Connect a resistive divider between the input supply, OVI, and
SGND to set the input overvoltage threshold.
—
EP
Exposed Pad. Connect to a large ground plane through multiple vias to maximize thermal
dissipation.
Enable/Undervoltage Lockout. To externally program the UVLO threshold of the input supply,
connect a resistive divider between input supply, EN, and SGND.
Detailed Description
The MAX17595 offers a bootstrap UVLO wake-up level
of 20V with a wide hysteresis, and is optimized for implementing isolated and nonisolated universal (85V to 265V
AC) offline single-switch flyback converter or telecom
(36V to 72V) power supplies. The MAX17596/MAX17597
offer a UVLO wake-up level of 4.4V and are well-suited
for low-voltage DC-DC flyback/boost power supplies. An
internal 1% reference (1.21V) can be used to regulate
the output in nonisolated flyback and boost applications.
Additional semiregulated outputs, if needed, can be generated by using additional secondary windings on the
flyback converter transformer.
The MAX17595/MAX17596/MAX17597 family utilizes
peak-current-mode control and external compensation
for optimizing closed-loop performance. The devices
include cycle-by-cycle peak current limit, and eight
consecutive occurrences of current-limit-event trigger
hiccup mode, which protects external components by
halting switching for a period of 32,768 cycles. .
Input Voltage Range (VIN)
The MAX17595 has no limitation on maximum input voltage, as long as the external
components are rated suitably and the maximum
operating voltages of the MAX17595 are respected.
Maxim Integrated
The MAX17595 implements a rising and falling UVLO
threshold that allows it to be successfully used in universal input (85V to 265V AC) rectified bus applications, in
rectified 3-phase DC bus applications, and in telecom
(36V to 72V DC) applications.
The MAX17596/MAX17597 are intended to implement
flyback (isolated and nonisolated) and boost converters. The VIN pin of the MAX17596/MAX17597 has a
maximum operating voltage of 36V. The MAX17596/
MAX17597 implement rising and falling thresholds on
the VIN pin that assume power-supply startup schemes
typical of low-voltage DC-DC applications, down to
an input voltage of 4.5V DC. Therefore, flyback /boost
converters with a 4.5V to 36V supply voltage range can
be implemented with the MAX17596/MAX17597.
Internal Linear Regulator (VDRV)
The internal functions and driver circuits are designed
to operate from 7.4V (MAX17595) or 5V (MAX17596/
MAX17597) power-supply voltages. The MAX17595/
MAX17596/MAX17597 family has an internal linear regulator that is powered from the VIN pin. The output of the
linear regulator is connected to the VDRV pin, and should
be decoupled with a 1FF capacitor to ground for stable
operation. The VDRV regulator output supplies all the operating current of the MAX17595/MAX17596/MAX17597.
The maximum operating voltage on the VIN pin is 29V for
the MAX17595, and 36V for the MAX17596/MAX17597.
10
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
THERMAL SENSOR
VDRV
7.4V (MAX17595)
OR
5V (MAX17596/
MAX17597)
7.4V
LDO
MAX17595
MAX17596
MAX17597*
±50µA
DITHER/SYNC
5V
LDO
CONTROL
AND
DRIVER LOGIC
POK
2V/0.4V
HICCUP
VDRV
VIN
NDRV
DRIVER
UVLO
8 PEAK EVENTS
OR 1 RUNAWAY
CHIPEN
OSC
EN /
UVLO
SSDONE
PGND
OSC
PEAKLIM
COMP
PGND
305mV
DITHER/
SYNC
1.21V
RUNAWAY
COMP
OVI
360mV
1.21V
0.9V
BLANKING
CS
70ns
PWM COMP
RT
FIXED
OR VAR
10µA
10µA
SS
CHIPPEN
SLOPE
SLOPE
DECODE
SS
SSDONE
OSC
1.21V
R
COMP
1X
R
SGND
INTERNAL
REFERENCE
1.21V
SS
FB
Figure 1. MAX17595/MAX17596/MAX17597 Block Diagram (*See Note 4.)
Maxim Integrated
11
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
n-Channel MOSFET Gate Driver (NDRV)
The devices offer a built-in gate driver for driving an
external n-channel MOSFET. The NDRV pin can source/
sink peak currents in excess of 900mA/1500mA.
Maximum Duty Cycle
The MAX17595/MAX17596 operate at a maximum duty
cycle of 49%. The MAX17597 offers a maximum duty
cycle of 94% to implement flyback and boost converters
involving large input-to-output voltage ratios in DC-DC
applications. Slope compensation is necessary for stable operation of peak-current-mode controlled converters such as the MAX17595/MAX17596/MAX17597, in
addition to the loop compensation required for small
signal stability. The MAX17595/MAX17596/MAX17597
implement a SLOPE pin for this purpose. See the Slope
Compensation section for more details.
Soft-Start (SS)
The devices implement soft-start operation for the flyback/boost regulators. A capacitor connected to the SS
pin programs the soft-start period. The soft-start feature
reduces input inrush current during startup. When the
voltage on the SLOPE pin is more than 0.2V, the reference to the internal error amplifier is ramped up from
0V to 1.21V in a linear manner, as programmed by the
soft-start capacitor. See the Programming Soft-Start (SS)
(SS) section.
Applications Information
Startup Voltage and Input Overvoltage
Protection Setting (EN/UVLO, OVI)
The devices’ EN/UVLO pin serves as an enable/disable
input, as well as an accurate programmable input UVLO
pin. The devices do not commence startup operation
unless the EN/UVLO pin voltage exceeds 1.21V (typ).
The devices turn off if the EN/UVLO pin voltage falls
below 1.15V (typ). A resistor-divider from the input DC
bus to ground can be used to divide down and apply a
fraction of the input DC voltage (VDC) to the EN/UVLO
pin. The values of the resistor-divider can be selected so
the EN/UVLO pin voltage exceeds the 1.23V (typ) turnon threshold at the desired input DC bus voltage. The
same resistor-divider can be modified with an additional
resistor (ROVI) to implement input overvoltage protection in addition to the EN/UVLO functionality as shown
in Figure 2. When voltage at the OVI pin exceeds
1.21V (typ), the devices stop switching and resume
switching opera­tions only if voltage at the OVI pin falls
below 1.15V (typ). For given values of startup DC input
voltage (VSTART) and input overvoltage-protection
voltage (VOVI), the resistor values for the divider can
be calculated as fol­
lows, assuming a 24.9kI resistor
for ROVI:
 VOVI

R EN =
R OVI × 
− 1 k I
 VSTART

Switching Frequency Selection (RT)
The ICs’ switching frequency is programmable between
100kHz and 1MHz with resistor RRT connected between
RT and SGND. Use the following formula to determine the
appropriate value of RRT needed to generate the desired
output-switching frequency (fSW):
R RT =
10 10
fSW
where fSW is the desired switching frequency.
Frequency Dithering for
Spread-Spectrum Applications (Low EMI)
The switching frequency of the converter can be
dithered in a range of Q10% by connecting a capacitor from DITHER/SYNC to SGND, and a resistor from
DITHER to RT. Spread-spectrum modulation technique
spreads the energy of switching frequency and its harmonics over a wider band while reducing their peaks,
helping to meet stringent EMI goals.
Maxim Integrated
where ROVI is in kI, while VSTART and VOVI are in volts.
 VSTART 
R SUM = R OVI + R EN × 
− 1 k I
 1.21

where REN
and ROVI are in kI, while VSTART is in volts.
In universal AC input applications, RSUM may need to be
implemented as equal resistors in series (RDC1, RDC2,
and RDC) so that voltage across each resistor is limited
to its maximum operation voltage.
R
=
DC1 R=
DC2 R=
DC3
R SUM
3
kI
For low-voltage DC-DC applications based on the
MAX17596/MAX17597, a single resistor can be used in
the place of RSUM, as the voltage across it is approximately 40V.
12
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Startup Operation
The MAX17595 is optimized for implementing an offline
single-switch flyback converter and has a 20V VIN UVLO
wake-up level with hysteresis of 15V (min). In offline
applications, a simple cost-effective RC startup circuit is
used. When the input DC voltage is applied, the startup
resistor (RSTART) charges the startup capacitor (CSTART),
causing the voltage at the VIN pin to increase towards the
wake-up VIN UVLO threshold (20V typ). During this time,
the MAX17595 draws a low startup current of 20FA (typ)
through RSTART. When the voltage at VIN reaches the
wake-up VIN UVLO threshold, the MAX17595 commences switching and control operations. In this condition, the
MAX17595 draws 2mA (typ) current from CSTART for its
internal operation. In addition, the gate-drive current is
also drawn from CSTART, which is a function of the gate
charge of the external MOSFET used and switching frequency. Since this total current cannot be supported by
the current through RSTART, the voltage on CSTART
starts to drop. When suitably configured, as shown
in Figure 3, the external MOSFET is switched by the
NDRV pin and the flyback converter generates pulses
on bias winding NB. The soft-start period of the converter should be programmed so the bias winding
pulses sustain the voltage on CSTART before it falls
below 7V, thus allowing continued operation. The large
hysteresis of the MAX17595 allows for a small startup
capacitor (CSTART). The low startup current (20FA typ)
allows the use of a large startup resistor (RSTART), thus
reducing power dissipation at higher DC bus voltages.
RSTART might need to be implemented as equal, multiple
resistors in series (RIN1, RIN2, and RIN3) to share the
applied high DC voltage in offline applications so
that the voltage across each resistor is limited to its
maximum continuous operating voltage rating. RSTART
and CSTART can be calculated as:
C START
 C VDRV + IIN × t SS × 0.1 


0.75 
t SS × Q G × fSW  µF
 + 0.04 ×

10 6


where IIN is the supply current drawn at the VIN pin in
mA, QG is the gate charge of the external MOSFET used
in nC, fSW is the switching frequency of the converter in
Hz, and tSS is the soft-start time programmed for the flyback converter in ms. CVDRV is a cummulative capacitor
used in VDRV node in μF. See the Programming Soft-Start
of Flyback/Boost Converter (SS) section.
Maxim Integrated
RDC1
RSUM
RDC2
RDC3
EN/UVLO
REN
OVI
MAX17595
MAX17596
MAX17597
ROVI
Figure 2. Programming EN /UVLO and OVI
R START =
(VSTART − 10) × 50
1 + C START 
kI
where CSTART is the startup capacitor in FF.
For designs that cannot accept power dissipation in the
startup resistors at high DC input voltages in offline appli­
cations, the startup circuit can be set up with a current
source instead of a startup resistor as shown in Figure 4.
The startup capacitor (CSTART) can be calculated using
the above equation:
Resistors RSUM and RISRC can be calculated as:
=
R SUM
=
RISRC
VSTART
10
VBEQ1
70
MW
MW
The VIN UVLO wake-up threshold of the MAX17596/
MAX17597 is set to 4.1V (typ) with a 200mV hyster­esis,
optimized for low-voltage DC-DC applications down to
4.5V. For applications where the input DC voltage is low
enough (e.g., 4.5V to 5.5V DC) that the power loss
incurred to supply the operating current of the MAX17596/
MAX17597 can be tolerated, the VIN pin is directly
connected to the DC input, as shown in Figure 5. In the
case of higher DC input voltages (e.g., 16V to 32V DC),
a startup circuit, such as that shown in Figure 6, can be
used to minimize power dissipation. In this startup
13
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
scheme, the transistor (Q1) supplies the switching current until a bias winding NB comes up and turns off Q1.
The resistor (RZ) can be calculated as:
from the SS pin to SGND. Capacitor CSS can be calculated as:
=
C SS 8.2645 × t SS nF
RZ =
2 × (VINMIN − 6.3) kW
where tSS is expressed in ms. This equation is directly
applicable to the boost converter application circuit of
Figure 11. For optoisolated converters, the soft-start
period is approximately equal to 30% of tSS when the
Programming Soft-Start (SS)
The soft-start period for the devices can be programmed
by selecting the value of the capacitor CSS connected
VDC
VOUT
VDC
D2
D1
RIN1
RSTART
RIN2
COUT
NB
MAX17595
RIN3
NDRV
VIN
CSTART
LDO
DRV
NS
NP
CS
VDRV
CVDRV
Figure 3. MAX17595 RC-Based Startup Circuit
VDC
RIN1
RSUM
RIN2
VDC
D2
VOUT
D1
RIN3
NB
MAX17595
NP
RISRC
NS
NDRV
VIN
CSTART
COUT
LDO
DRV
CS
VDRV
CVDRV
RS
Figure 4. MAX17595 Current-Source-Based Startup Circuit
Maxim Integrated
14
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
error amplifier is set up as a proportional gain amplifier
as shown in Figure 9.
selected in the 20kI to 50kI range, RU can be calculated as:
Programming Output Voltage
 OUT 
R U =×
RB 
− 1 kI, where R B is in kI.
 1.21

The devices incorporate an error amplifier with a 1% precision voltage reference that enables negative feedback
control of the output voltage. The output voltage of the
switching converter can be programmed by selecting the
values for the resistor-divider connected from VOUT, and
the flyback/boost output to ground, with the midpoint of
the divider connected to the FB pin (Figure 7). With RB
Peak-Current-Limit Setting (CS)
The devices include a robust overcurrent protection scheme
that protects the device under overload and short-circuit
conditions. A current-sense resistor, connected between
the source of the MOSFET and PGND, sets the peak
current limit. The current-limit comparator has a voltage
VDC
VOUT
D1
VIN
VIN
VDRV
LDO
COUT
CDRV
Np
Ns
NDRV
DRV
CS
MAX17596
MAX17597
RS
Figure 5. MAX17596/MAX17597 Typical Startup Circuit with VIN Connected Directly to DC Input
VDC
D2
D1
RZ
Q1
VIN
LDO
VDRV
ZD1
6.3V
NB
COUT
CDRV
Np
Ns
VIN
CIN
DRV
NDRV
CS
MAX17596
MAX17597
RS
Figure 6. MAX17596/MAX17597 Typical Startup Circuit with Bias Winding to Turn Off Q1 and Reduce Power Dissipation
Maxim Integrated
15
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
trip level (VCS-PEAK) of 300mV. Use the following equation to calculate the value of RCS:
R CS =
300mV
IMOSFET
I
where IMOSFET is the peak current flowing through the
MOSFET.
The devices implement 65ns of leading-edge blanking to ignore leading-edge current spikes. Use a
small RC network for additional filtering of the leading edge spike on the sense waveform when needed. Set the corner frequency between 10MHz and
20MHz. After the leading-edge blanking time,
the device monitors VCS. The switching cycle is terminated within 30ns from VCS exceeding 300mV.
The devices offer a runaway current limit scheme that
protects the devices under high-input-voltage shortcircuit conditions when there is insufficient output voltage available to restore inductor current built up during
the on period of the flyback/boost converter. Either eight
consecutive occurrences of the peak-current-limit event
or one occurrence of the runaway current limit trigger a
hiccup mode that protects the converter by immediately
suspending switching for a period of time (tRSTART).
This allows the overload current to decay due to power
loss in the converter resistances, load, and the output
diode of the flyback/boost converter before soft-start
is attempted again. The runaway current limit is set
at a VCS-PEAK of 360mV (typ). The peak-current-limittriggered hiccup operation is disabled until the end of
the soft-start period, while the runaway current-limittriggered hiccup operation is always enabled.
Programming Slope
Compensation (SLOPE)
The MAX17595/MAX17596 operate at a maximum duty
cycle of 49%. In theory, they do not require slope
compensation to prevent subharmonic instability that
occurs naturally in continuous-conduction mode (CCM)
peak-current-mode-controlled converters operating at
duty cycles greater than 50%. In practice, the MAX17595/
MAX17596 require a minimum amount of slope compensation to provide stable operation. The devices allow the
user to program this default value of slope compensation
simply by leaving the SLOPE pin unconnected. It is recommended that discontinuous-mode designs also use
this minimum amount of slope compensation to provide
better noise immunity and jitter-free operation.
Maxim Integrated
VOUT
RU
FB
MAX17595
MAX17596
MAX17597
RB
Figure 7. Programming Output Voltage
The MAX17597 flyback/boost converter can be designed
to operate in either discontinuous-conduction mode
(DCM) or to enter into continuous-conduction mode
at a specific load condition for a given DC input
voltage. In continuous-conduction mode, the flyback/
boost converter needs slope compensation to avoid
subharmonic instability that occurs naturally over all
specified load and line conditions in peak-current-modecontrolled converters operating at duty cycles greater
than 50%. A minimum amount of slope signal is added to
the sensed current signal even for converters operating
below 50% duty to provide stable, jitter-free operation.
The SLOPE pin allows the user to program the necessary
slope compensation by setting the value of the resistor
(RSLOPE) connected from the SLOPE pin to ground.
R SLOPE =
SE − 8
1.55
kI
where the slope (SE) is expressed in mV/Fs.
Frequency Dithering for
Spread-Spectrum Applications (Low EMI)
The switching frequency of the converter can be dithered
in a range of Q10% by connecting a capacitor from
DITHER/SYNC to SGND, and a resistor from DITHER
to RT as shown in the Typical Operating Circuits. This
results in lower EMI.
A current source at DITHER/SYNC charges capacitor
CDITHER to 2V at 50FA. Upon reaching this trip point, it
discharges CDITHER to 0.4V at 50FA. The charging and
discharging of the capacitor generates a triangular waveform on DITHER/SYNC with peak levels at 0.4V and 2V
and a frequency that is equal to:
fTRI =
50 FA
C DITHER × 3.2V
16
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
typically, fTRI should be set close to 1kHz. Resistor
RDITHER connected from DITHER/SYNC to RT determines the amount of dither as follows:
%DITHER =
R RT
R DITHER
where %DITHER is the amount of dither expressed as a
percentage of the switching frequency. Setting RDITHER
to 10 x RRT generates Q10% dither.
Synchronization (SYNC)
The internal oscillator can be synchronized to an external clock by applying the clock to the DITHER/SYNC pin
directly. The external clock frequency can be set anywhere between 1.1x and 1.8x times the programmable
switching frequency for the MAX17595/MAX17596. The
synchronization feature is not available in the MAX17597.
An external clock increases the maximum duty cycle by
a factor of (fSYNC / fSW).
Error Amplifier and Loop Compensation
The MAX17595/MAX17596/MAX17597 include an internal transconductance error amplifier. The noninverting
input of the error amplifier is internally connected to the
internal reference and the inverting input is brought out
at the FB pin to apply the feedback signal. The internal
reference is linearly ramped up from 0V to 1.21V (typ)
when the device is enabled at turn-on. After soft-start, the
internal reference is connected to the bandgap.
In isolated applications, where an optocoupler is used to
transmit the control signal from the secondary side, the
emitter current of the optocoupler flows through a resistor to ground to set up the feedback voltage. A shunt
regulator is usually employed as a secondary-side error
amplifier to drive the optocoupler photodiode to couple
the control signal to the primary. The loop compensation
is applied in the secondary side as an R-C network on the
shunt regulator. The MAX17595/MAX17596/MAX17597
error amp can be set up as a proportional gain amplifier, or used to implement additional poles or zeros.
The Typical Application Circuits for the MAX17595/
MAX17596 use the internal error amplifier as a proportional gain amplifier.
In nonisolated applications, the output voltage is divided
down with a voltage-divider to ground and is applied to
the FB pin. Loop compensation is applied at the COMP
pin as an R-C network from COMP to GND that implements the required poles and zeros, as shown in Figure
Maxim Integrated
8. The boost converter application circuit of Figure 11 for
the MAX17597 uses this approach.
Layout, Grounding and Bypassing
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to
the high di/dt of the currents in high-frequency-switching
power converters. This implies that the loop areas for
forward and return pulsed currents in various parts of the
circuit should be minimized. Additionally, small current
loop areas reduce radiated EMI. Similarly, the heatsink
of the MOSFET presents a dV/dt source; therefore,
the surface area of the MOSFET heatsink should be
minimized as much as possible.
Ground planes must be kept as intact as possible. The
ground plane for the power section of the converter
should be kept separate from the analog ground plane,
except for a connection at the least noisy section of the
power ground plane, typically the return of the input filter
capacitor. The negative terminal of the filter capacitor, the
ground return of the power switch and current-sensing
resistor, must be close together. PCB layout also affects
the thermal performance of the design. A number of
thermal vias that connect to a large ground plane should
be provided under the exposed pad of the part for
efficient heat dissipation. For a sample layout that
ensures first-pass success, refer to the MAX17595 evaluation kit layout available at www.maximintegrated.com.
For universal AC input designs, follow all applicable
safety regulations. Offline power supplies can require UL,
VDE, and other similar agency approvals.
COMP
RZ
CZ
CP
MAX17595
MAX17596
MAX17597
Figure 8. Error-Amplifier Compensation Network
17
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Circuits
R15
402kI
IN
R16
402kI
VIN
C5
100µF
450V
D1
L1
6.8mH
C1
0.1µF/
275V AC
15V, 1.5A
PGND
R1
10I
VOUT
D4
T1
C9
4.7µF
50V
R14
402kI
AC1
VOUT
D2
R18
100kI
C13
22µF
C14
22µF
C15
22µF
C16
22µF
C10
3300pF
GND0
D3
IN
PGND
AC2
C6
0.47µF
C7
100nF
VIN
PGND
SS
SLOPE
VOUT
NDRV
R9
82.5kI
DITHER /
SYNC
R12
49.9kI
VFB
SGND
CS
R28
2.49kI
R20
100I
C11
1000pF
VDRV
FB
VDRV
2
VFB
R21
R22
0.2I
470I
C17
68nF
SGND
C8
1µF
U3
R29
221I
SGND
EN /UVLO
C21
470nF
OVI
R6
4.99kI
PGND
MAX17595
1
VDRV
COMP
C4
56pF
R13
22kI
PGND
SGND
SGND
R4
549kI
R5
19.8kI
R26
4.99kI
RT
VIN
R3
549kI
N1
SGND
SGND
R2
549kI
R19
10I
EP
SGND
SGND
PGND
Figure 9. MAX17595 Typical Application Circuit (Universal Offline Isolated Power Supply)
Maxim Integrated
18
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Circuits (continued)
VOUT
VIN
VIN
C1
18V TO 36V 47µF
63V
PGND
C2
4.7µF
50V
R1
750I
C9
10µF
50V
C4
0.1µF, 50V
D1
C3
0.22µF
VOUT
D2
T1
C10
10µF
50V
C11
10µF
50V
C12
10µF
50V
C13
10µF
50V
24V, 1.5A
OUTPUT
GND0
VIN
EP
SS
C5
100nF
NDRV
SLOPE
N1
R8
100I
CS
R3
22kI
FB
VFB
R4
49.9kI
C6
300pF
U1
MAX17596
COMP
SGND
R15
8.6kI
GND0
VDRV
VIN
RT
R16
16.5kI
VFB
C7
1µF
R12
10kI
C17
500nF
C14
0.1µF
VDRV
R6
20kI
R14
8.6kI
VDRV
PGND
R5
348kI
VOUT
R9
50mI
R13
470I
C16
56pF
U2
R10
28.5kI
EN /UVLO
C15
22nF
U3
C8
100nF
R17
470I
OVI
DITHER/
SYNC
R7
10kI
SGND
SGND
PGND
Figure 10. MAX17596 Typical Application Circuit (Power Supply for DC-DC Applications)
Maxim Integrated
19
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Typical Operating Circuits (continued)
VIN
VIN
VIN
C7
10µF
C1
22µF
8V TO
14V DC
C2
1µF
PGND
EP
SS
C3
47nF
C4
1µF
VDRV
R1
32.4kI
VIN
SLOPE
MAX17597
R2
9.92kI
L1
6.8µH
FB
VOUT
NDRV
R4
1.96kI
C5
33nF
COMP
CS
C6
330pF
VIN
R5
187kI
R6
18kI
VOUT
24V, 1A
D1
R3
187kI
N1
C9
4.7µF/
50V
C10
4.7µF/
50V
C11
4.7µF/
50V
R8
100I
C8
300pF
R9
65mI
PGND
RT
R10
21kI
EN /UVLO
C12
10nF
DITHER
OVI
R7
18kI
SGND
SGND
PGND
Figure 11. MAX17597 Typical Application Circuit (Nonsynchronous Boost Converter)
Maxim Integrated
20
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Ordering Information/Selector Guide
PART
TEMP
RANGE
PIN
PACKAGE
MAX17595ATE+
-40NC to +125NC
16 TQFN-EP*
Offline Flyback Controller
MAX17596ATE+
-40NC to +125NC
16 TQFN-EP*
Low-Voltage DC-DC Flyback Controller
MAX17597ATE+
-40NC to +125NC
16 TQFN-EP*
Boost Controller
FUNCTIONALITY
UVLO, VIN
CLAMP
DMAX
20V, Yes
46%
4V, No
46%
4V, No
93%
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Exposed pad.
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
16 TQFN
T1633+4
21-0136
90-0032
Maxim Integrated
21
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Revision History
REVISION
NUMBER
REVISION
DATE
0
1/12
Initial release
1
2/13
Updated General Description, Electrical Characteristics tables, Typical Operating
Characteristics; Detailed Description, Figures 1, 3–6; Typical Operating Circuits,
deleted sections relating to soft-stop, flyback, and boost.
2
6/13
Updated Pin Description for EP and Figure 10
DESCRIPTION
PAGES
CHANGED
—
1–22
10, 19
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
© 2013
Maxim Integrated Products, Inc.
22
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX17595/MAX17596/MAX17597
Peak-Current-Mode Controllers for
Flyback and Boost Regulators
Maxim Integrated
23