VSC7718, VSC7728 GPON and GE-PON OLT Transimpedance Amplifier and Limiting Amplifier Chipset VSC7728 VSC7718 F E AT U R E S : BENEFITS: ` Burst average received power monitor ` Enables the system to monitor the burst power to determine if there are any issues with the ONU transmission ` Reset through the high-speed data interface ` Reduces pin count for the BOSA ` Fast settling time ` Enables the receiver to meet GPON settling-time requirements ` Differential Data Ready (DATRDYP, DATRDYN) output ` Used to latch the receive power monitor as well as tell the downstream CDR when to start acquiring good data ` LVPECL outputs ` Standard interface that directly couples to the CDR ` Bare die or 16-pin 3 mm x 3 mm QFP package ` Small enough to fit in a SFF or SFP module along with a laser driver to achieve a complete solution A P P L I C AT I O N S : ` GPON - G.984 1244 Mbps upstream, class A, B, B+, and C S P E C I F I C AT I O N S : ` 3.3 V power supply ` GE-PON - IEEE Std. 802.3ah (EFM), 1000BASE-PX10/20-U (GE-PON OLT) VPPD-01548 Revision 1.0 VSC7718, VSC7728 GPON and GE-PON OLT Transimpedance Amplifier and Limiting Amplifier Chipset GENERAL DESCRIPTION: The VSC7718 transimpedance amplifier (TIA) and VSC7728 post amplifier together form a complete chipset solution for Gigabit-capable Passive Optical Networks (GPON) and Gigabit Ethernet Passive Optical Networks (GE-PON) OLT burst-mode receivers. This chipset exceeds GPON requirements with better than –33 dBm sensitivity, industry-leading overload performance of better than –4 dBm and over 23 dBm of dynamic range. correction circuitry, providing fast settling times with immunity to long streams of consecutive identical digits. The VSC7718 also features a space-saving filter connection provided for positive bias to a PIN diode through a filter resistor to VCC. The VSC7718 is available as bare die with padout optimized for standard 4-pin, 5-pin and 6-pin TO-46 packages. The VSC7728 is available in a 16-pin, 3mm x 3mm QFP package. Designed to be used in conjunction with one another, the VSC7728 supplies a reset signal to the VSC7718 in order to control its internal offset BLOCK DIAGRAM: RESET Signal from OLT MAC VCC APD Supply RESETP RESETN RTHAD VCC VSC7728 VSC7718 Signal Detect Threshold Adjust Block FILTER PD VOUTP IN Incoming RESET Signal TIA VOUTN LINP LINN LOUTP Outgoing RESET Signall Block LA INTERNAL RESET GND RMON LOUTN DATRDYP DATRDYN GND (Data Ready Indicator for CDR) Trademarks TM Vitesse, ASIC-Friendly, FibreTimer, TimeStream, Snoop Loop, Super FEC, FOCUSConnect, Meigs-II, Meigs-IIe, Lansing, Campbell-I, Barrington, PaceMaker, HOVCAT48, HOVCAT48e, HOVCAT192, HOVCAT192e, Micro PHY, FOCUS32, FOCUS16, IQ2200, NexSAS, VersaCAT, GigaStream, HawX, SparX, StaX, VstaX, SimpliPHY,VeriPHY, ActiPHY, XFP PRO, SFP PRO, Smart-LINK, OctalMAC, EQ Technology are trademarks in the United States and/or other jurisdictions of Vitesse Semiconductor Corporation. All other trademarks or registered trademarks mentioned herein are the property of their respective holders. Copyright © 2006 Vitesse Semiconductor Corporation (“Vitesse”) retains the right to make changes to its products or specifications to improve performance, reliability or manufacturability. All information in this document, including descriptions of features, functions, performance, technical specifications and availability, is subject to change without notice at any time. While the information furnished herein is held to be accurate and reliable, no responsibility will be assumed by Vitesse for its use. Furthermore, the information contained herein does not convey to the purchaser of microelectronic devices any license under the patent right of any manufacturer. 741 Calle Plano Camarillo, CA 93012, USA Tel: +1 805.388.3700 Fax: +1 805.987.5896 www.vitesse.com [email protected]