19-0667; Rev 0; 10/06 USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode Features ♦ ±15kV ESD HBM Protection on D+ and D- The MAX3349EA ±15kV ESD-protected, USB transceiver provides a full-speed USB interface to a lower voltage microprocessor or ASIC. The device supports enumeration, suspend, and VBUS detection. A special UART multiplexing mode routes external UART signals (Rx and Tx) to D+ and D-, allowing the use of a shared connector to reduce cost and part count for mobile devices. The UART interface allows mobile devices such as PDAs, cellular phones, and digital cameras to use either UART or USB signaling through the same connector. The MAX3349EA features a separate UART voltage supply input to support legacy devices using +2.75V signaling. The MAX3349EA supports a maximum UART baud rate of 921kbaud. Upon connection to a USB host, the MAX3349EA enters USB mode and provides a full-speed USB 2.0 compliant interface through VP, VM, RCV, and OE. The MAX3349EA features internal series termination resistors on D+ and D-, and an internal 1.5kΩ pullup resistor to D+ to allow the device to logically connect and disconnect from the USB while plugged in. A suspend mode is provided for low-power operation. D+ and D- are protected from electrostatic discharge (ESD) up to ±15kV. The MAX3349EA is available in 16-pin TQFN (4mm x 4mm) and 16-bump UCSP™ (2mm x 2mm) packages, and is specified over the -40°C to +85°C extended temperature range. ♦ UART Mode Routes External UART Signals to D+/D♦ Internal Linear Regulator Allows Direct Powering from the USB Cable ♦ Separate Voltage Input for UART Transmitter/Receiver (VUART) ♦ Internal 1.5kΩ Pullup Resistor on D+ Controlled by Enumerate Input ♦ Internal Series Termination Resistors on D+ and D♦ Complies with USB Specification Revision 2.0, Full-Speed 12Mbps Operation ♦ Built-In Level Shifting Down to +1.4V, Ensuring Compatibility with Low-Voltage ASICs ♦ VBUS Detection ♦ Combined VP and VM Inputs/Outputs ♦ No Power-Supply Sequencing Required ♦ Available in 16-Bump UCSP (2mm x 2mm) Package Ordering Information PART Applications Cell Phones PDAs PIN-PACKAGE PKG CODE MAX3349EAEBE+T 16 UCSP B16-1 MAX3349EAETE** 16 TQFN-EP* T1644-4 Note: All devices specified for the -40°C to +85°C extended temperature range. **Future product—contact factory for availability. *EP = Exposed paddle. +Indicates lead-free package. Digital Cameras MP3 Players Pin Configurations TOP VIEW ENUM 13 VTRM 14 VBUS D+ D- GND TOP VIEW 12 11 10 9 *EP 1 8 SUS 7 OE VM 16 5 VP 2 3 4 BD RCV TX 6 RX 15 VUART VL 1 3 4 MAX3349EA MAX3349EA + 2 + A VUART RX TX BD B VL VM VP RCV C VTRM ENUM SUS OE D VBUS D+ D- GND UCSP (2mm x 2mm) (BUMPS ON BOTTOM OF DIE) TQFN-EP (4mm x 4mm) *EXPOSED PADDLE—CONNECT TO GND OR LEAVE UNCONNECTED. + DENOTES LEAD-FREE PACKAGE. UCSP is a trademark of Maxim Integrated Products, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX3349EA General Description MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) VUART, VL, VBUS, D+, D- ..........................................-0.3V to +6V VTRM .........................................................-0.3V to (VBUS + 0.3V) VP, VM, SUS, RX, TX, ENUM, RCV, OE, BD, -0.3V to (VL + 0.3V) Short Circuit Current (D+ and D-)...................................±150mA Maximum Continuous Current (all other pins) .................±15mA Continuous Power Dissipation (TA = +70°C) 16-Bump UCSP (derate 8.2mW/°C above +70°C) ....659.5mW 16-Pin 4mm x 4mm TQFN (derate 25.0mW/°C above +70°C).............................................................2000mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Bump Temperature (soldering, reflow) ............................+235°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VBUS = +4.0V to +5.5V, VUART = +2.7V to +3.3V, VL = +1.40V to +2.75V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBUS = +5V, VL = +1.8V, VUART = +2.75V (UART Mode), and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4.0 5.5 V 1.40 2.75 V SUPPLY INPUTS/OUTPUTS (VBUS, VUART, VTRM, VL) VBUS Input Range VL Input Range VBUS USB mode VL VUART Input Range VUART UART mode 2.7 3.3 V Regulated Supply-Voltage Output VTRM Internal regulator, USB mode 3.0 3.6 V Operating VBUS Supply Current IBUS Full-speed transmitting/receiving at 12Mbps, CL = 50pF on D+ and D- 10 mA Operating VUART Supply Current IVUART UART transmitting/receiving at 921kbaud, CL = 200pF 2.5 mA 5 µA 6 mA Static VUART Supply Current Operating VL Supply Current Full-Speed Idle and SE0 Supply Current Static VL Supply Current Sharing Mode VL Supply Current USB Suspend VBUS Supply Current IVUART(STATIC) IVL IVBUS(IDLE) IVL(STATIC) IVL(OFF) IVBUS(SUS) UART mode 3.5 Full-speed transmitting/receiving at 12Mbps, CL = 50pF on D+ and DFull-speed idle, VD+ > +2.7V, VD- < +0.3V 290 400 SE0: VD+ < +0.3V, VD- < +0.3V 340 450 Full-speed idle, SE0, suspend mode, or static UART mode 2 10 µA VBUS and VUART not present 2 5 µA VM, VP unconnected; OE = 1, SUS = 1 38 65 µA µA VBUS DETECTION (BD) USB Power-Supply Detection Threshold VTH_VBUS USB Power-Supply Detection Hysteresis VHYS_VBUS VL Power-Supply Detection Threshold 2 VTH_VL VL = +1.8V 1.8 2.7 3.4 VL = +2.5V 2.3 3.2 4.0 VL = +1.8V 80 VL = +2.5V 100 0.7 _______________________________________________________________________________________ V mV V USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode (VBUS = +4.0V to +5.5V, VUART = +2.7V to +3.3V, VL = +1.40V to +2.75V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBUS = +5V, VL = +1.8V, VUART = +2.75V (UART Mode), and TA = +25°C.) (Note 1) PARAMETER VUART Power-Supply Detection Threshold SYMBOL CONDITIONS VTH_UART MIN TYP MAX UNITS 0.4 x VL 0.65 x VL 0.9 x VL V 0.3 x VL V DIGITAL INPUTS/OUTPUTS (VP, VM, RCV, SUS, OE, RX, TX, ENUM, BD) Input Voltage Low VIL Input Voltage High VIH Output Voltage Low VOL IOL = +2mA, VL > 1.65V IOL = +1mA, VL < 1.65V Output Voltage High VOH IOH = +2mA, VL > 1.65V IOH = +1mA, VL < 1.65V Input Leakage Current ILKG 0.7 x VL V 0.4 VL 0.4 V V -1 +1 µA ANALOG INPUTS/OUTPUTS (D+, D- in USB Mode) Differential Input Sensitivity VID |VD+ - VD-| 0.2 Differential Common-Mode Voltage VCM Includes VID range 0.8 Single-Ended Input Low Voltage VILSE Single-Ended Input High Voltage VIHSE V 2.5 V 0.8 V 2.0 USB Output Voltage Low VUSB_OLD RL = 1.5kΩ connected to +3.6V USB Output Voltage High VUSB_OHD RL = 15kΩ connected to GND Off-State Leakage Current ILZ Driver Output Impedance ZDRV Steady-state drive Transceiver Capacitance CIND Measured from D+/D- to GND Input Impedance ZIN Driver off D+ Internal Pullup Resistor RPU ENUM = 1 V 0.3 V 2.8 3.6 V -10 +10 µA 43.5 Ω 29.0 38 0.9 1.3 2.0 MΩ 1425 1500 1575 Ω 20 pF ANALOG INPUTS/OUTPUTS (D+, D- in UART Mode) Input Voltage High VUART_IH UART mode, +2.70 < VUART < +2.85V Input Voltage Low VUART_IL UART mode, +2.70V < VUART < +2.85V Output Voltage High VUART_OH UART mode, +2.70V < VUART < +2.85V IUART_OH = -2mA Output Voltage Low VUART_OL UART mode, +2.70V < VUART < +2.85V IUART_OL = +2mA 2.0 V 0.8 2.2 V V 0.4 V _______________________________________________________________________________________ 3 MAX3349EA ELECTRICAL CHARACTERISTICS (continued) MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode ELECTRICAL CHARACTERISTICS (continued) (VBUS = +4.0V to +5.5V, VUART = +2.7V to +3.3V, VL = +1.40V to +2.75V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBUS = +5V, VL = +1.8V, VUART = +2.75V (UART Mode), and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ESD PROTECTION (D+, D-) Human Body Model (Figures 9 and 10) ±15 kV IEC 61000-4-2 Air-Gap Discharge ±8 kV IEC 61000-4-2 Contact Discharge ±8 kV TIMING CHARACTERISTICS (VBUS = +4.0V to +5.5V, VUART = +2.7V to +3.3V, VL = +1.4V to +2.75V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBUS = +5V, VL = +1.8V, VUART = +2.75V (UART Mode), and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS USB DRIVER CHARACTERISTICS (CL = 50pF) Rise Time tFR 10% to 90% of | VUSB_OHD - VUSB_OLD | (Figures 1 and 7) 4 20 ns Fall Time tFF 90% to 10% of | VUSB_OHD - VUSB_OLD | (Figures 1 and 7) 4 20 ns Rise/Fall Time Matching tFR/tFF Excluding the first transition from idle state (Note 2) (Figures 1 and 7) 90 110 % Output Signal Crossover Voltage VCRS_F Excluding the first transition from idle state (Note 2) (Figure 2) 1.3 2.0 V tPLH_DRV Driver Propagation Delay tPHL_DRV Driver Disable Delay Driver Enable Delay VL > +1.65V (Figures 2 and 7) +1.4V < VL < +1.65V (Figures 2 and 7) VL > +1.65V (Figures 2 and 7) 22.5 25 22.5 +1.4V < VL < +1.65V (Figures 2 and 7) 25 tPHZ_DRV High-to-off transition (Figures 3 and 6) 25 tPLZ_DRV Low-to-off transition (Figures 3 and 6) 25 tPZH_DRV Off-to-high transition (Figures 3 and 7) 25 tPZL_DRV Off-to-low transition (Figures 3 and 7) 25 VL > +1.65V (Figures 4 and 8) 25 ns ns ns USB RECEIVER CHARACTERISTICS (CL = 15pF) Differential Receiver Propagation Delay tPLH_RCV tPHL_RCV Single-Ended Receiver Propagation Delay tPLH_SE tPHL_SE 4 +1.4V < VL < +1.65V (Figures 4 and 8) 30 VL > +1.65V (Figures 4 and 8) 25 1.4V < VL < +1.65V (Figures 4 and 8) 30 VL > +1.65V (Figures 4 and 8) 28 +1.4V < VL < +1.65V (Figures 4 and 8) 35 VL > +1.65V (Figures 4 and 8) 28 +1.4V < VL < +1.65V (Figures 4 and 8) 35 _______________________________________________________________________________________ ns ns USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode (VBUS = +4.0V to +5.5V, VUART = +2.7V to +3.3V, VL = +1.4V to +2.75V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VBUS = +5V, VL = +1.8V, VUART = +2.75V (UART Mode), and TA = +25°C.) (Note 1) PARAMETER SYMBOL tPHZ_SE Single-Ended Receiver Disable Delay tPLZ_SE tPZH_SE Single-Ended Receiver Enable Delay tPZL_SE CONDITIONS MIN TYP MAX High-to-off transition, VL > +1.65V (Figure 5) 10 High-to-off transition, +1.4V < VL < +1.65V (Figure 5) 12 Low-to-off transition, VL > +1.65V (Figure 5) 10 Low-to-off transition, +1.4V < VL < +1.65V (Figure 5) 12 Off-to-high transition, VL > +1.65V (Figure 5) 20 Off-to-high transition, +1.4V < VL < +1.65 (Figure 5) 20 Off-to-low transition, VL > +1.65V (Figure 5) 20 Off-to-low transition, +1.4V < VL < +1.65V (Figure 5) 20 UNITS ns ns UART DRIVER CHARACTERISTICS (CL = 200pF) Rise Time (D-) tFR_TUART 10% to 90% of |VOHD - VOLD| (Figure 13) 60 200 ns Fall Time (D-) tFF_TUART 90% to 10% of |VOHD - VOLD| (Figure 13) 60 200 ns tPLH_TUART (Figure 13) 70 200 tPHL_TUART (Figure 13) 70 200 Driver Propagation Delay ns UART RECEIVER CHARACTERISTICS (CL = 15pF) Receiver (Rx) Propagation Delay Receiver (Rx) Rise/Fall Time tPLH_RUART (Figure 14) 60 tPHL_RUART (Figure 14) 60 tFR_RUART (Figure 14) 45 tFF_RUART (Figure 14) 45 ns ns Note 1: Parameters are 100% production tested at TA =+25°C, unless otherwise noted. Limits over temperature are guaranteed by design. Note 2: Guaranteed by design, not production tested. _______________________________________________________________________________________ 5 MAX3349EA TIMING CHARACTERISTICS (continued) Typical Operating Characteristics (VBUS = +5V, VL = +3.3V, VUART = +2.75V, TA = +25°C, unless otherwise noted.) SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VL 30 TA = +25°C 20 20 18 TA = +25°C 4 3 2 16 TA = -40°C 14 10 MAX3349EA toc03 TA = +85°C IVL (µA) TA = +85°C 5 MAX3349EA toc02 40 22 PROPAGATION DELAY (ns) MAX3349EA toc01 PROPAGATION DELAY (ns) LOGIC CURRENT CONSUMPTION IN SUSPEND MODE SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VBUS 50 1 TA = -40°C 12 0 1.6 1.8 2.0 2.2 2.4 2.6 0 4.00 4.25 4.50 4.75 5.00 5.25 1.4 5.50 1.6 1.8 2.0 2.2 2.4 2.6 VL (V) VBUS (V) VL (V) VBUS CURRENT CONSUMPTION IN SUSPEND MODE VL CURRENT DURING USB OPERATION vs. D+/D- CAPACITANCE VBUS CURRENT DURING USB OPERATION vs. D+/D- CAPACITANCE 39 38 12Mbps DATA RATE TRANSMITTING 20 0.53 MAX3349EA toc06 0.55 MAX3349EA toc04 40 MAX3349EA toc05 1.4 12Mbps DATA RATE TRANSMITTING 16 IVL (mA) 36 35 IVBUS (mA) 37 IVCC (µA) MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode 0.51 0.49 34 12 8 33 0.47 32 4 31 0.45 30 4.00 4.25 4.50 4.75 5.00 5.25 5.50 0 0 40 80 120 160 200 240 0 D+/D- CAPACITANCE (CL) VBUS (V) SUSPEND MODE 40 80 120 160 D+/D- CAPACITANCE (CL) BUS DETECT RESPONSE MAX3349EA toc07 MAX3349EA toc08 SUS 2V/div VBUS 2V/div RCV 2V/div 10ns/div 6 BD 1V/div 4µs/div _______________________________________________________________________________________ 200 240 USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode PIN TYPE NAME 1 POWER VUART A2 2 OUTPUT RX A3 3 INPUT TX A4 4 OUTPUT BD B1 15 POWER VL Digital Logic Supply. Connect a +1.4V to +2.75V supply to VL. Bypass VL to GND with a 0.1µF or larger ceramic capacitor. B2 16 I/O VM Receiver Output/Driver Input. VM functions as a receiver output when OE = VL. VM follows the logic state of D- when receiving. VM functions as a driver input when OE = GND (Tables 2 and 3). B3 5 I/O VP Receiver Output/Driver Input. VP functions as a receiver output when OE = VL. VP follows the logic state of D+ when receiving. VP functions as a driver input when OE = GND (Tables 2 and 3). B4 6 OUTPUT RCV Differential Receiver Output. In USB mode, RCV is the output of the USB differential receiver (Table 3). C1 14 POWER VTRM Internal Regulator Output. VTRM provides a regulated +3.3V output. Bypass VTRM to GND with a 1µF ceramic capacitor. VTRM draws power from VBUS. Do not power external circuitry from VTRM. C2 13 INPUT ENUM Enumerate Input. Drive ENUM to VL to connect the internal 1.5kΩ resistor from D+ to VTRM (when VBUS is present). Drive ENUM to GND to disconnect the internal 1.5kΩ pullup resistor. ENUM has no effect when the device is in UART mode. C3 8 INPUT SUS Suspend Input. Drive SUS low for normal operation. Drive SUS high to force the MAX3349E into suspend mode. C4 7 INPUT OE Output Enable. Drive OE low to set VP/VM to transmitter inputs in USB mode. Drive OE high to set VP/VM to receiver outputs in USB mode. OE has no effect when the device is in UART mode. D1 12 POWER VBUS D2 11 I/O D+ USB Differential Data Input/Output. Connect D+ directly to the USB connector. D3 10 I/O D- USB Differential Data Input/Output. Connect D- directly to the USB connector. D4 9 POWER GND — EP — EP UCSP TQFN A1 FUNCTION UART Supply Voltage. VUART powers the internal UART transmitter and receiver. Connect a regulated voltage between +2.7V and +3.3V to VUART. Bypass VUART to GND with a 0.1µF ceramic capacitor. UART Receive Output. In UART mode, RX is a level-shifted output that expresses the logic state of D+. UART Transmit Input. In UART mode, D- follows the logic state on TX. USB Detect Output. When VBUS exceeds the VTH-BUS threshold, BD is logic-high to indicate that the MAX3349E is connected to a USB host. The MAX3349E operates in USB mode when BD is logic-high, and operates in UART mode when BD is logiclow. USB Supply Voltage. VBUS provides power to the internal linear regulator when in USB mode. Bypass VBUS to GND with a 0.1µF ceramic capacitor. Ground Exposed Paddle. Connect exposed paddle to GND. _______________________________________________________________________________________ 7 MAX3349EA Pin Description MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode Timing Diagrams OE tFR, tFR_TUART tFF, tFF_TUART VP/VM CONNECTED TO GND, D+/D- CONNECTED TO PULLUP VUSB_OHD, VOHD 90% 90% D+/D- 10% 10% tPLZ_DRV VUSB_OLD, VOLD tPZL_DRV VP/VM CONNECTED TO VL, D+/D- CONNECTED TO PULLDOWN OE Figure 1. Rise and Fall Times D+/D- tPHZ_DRV VP AND VM RISE/FALL TIMES < 4ns VM tPZH_DRV Figure 3. Driver Enable and Disable Timing INPUT RISE/FALL TIME < 4ns +3V VP D+/DtPLH_DRV tPHL_DRV 0V D- VCRS_F VL tPLH_RCV, tPLH_SE D+ RCV, VM, AND VP Figure 2. Timing of VP and VM to D+ and D- 8 Figure 4. D+/D- Timing to VP, VM, and RCV _______________________________________________________________________________________ tPHL_RCV, tPHL_SE USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode TEST POINT OE MAX3349EA 1. ENABLE TIME (D+/D-) MEASUREMENT D+/DCL 50pF 15kΩ 2. VP/VM TO D+/DPROPAGATION DELAY 3. D+/D- RISE/FALL TIMES D+/D- CONNECTED TO GND, VP/VM CONNECTED TO PULLUP VP/VM Figure 7. Test Circuit for Enable Time, Transmitter Propagation Delay, and Transmitter Rise/Fall Time tPLZ_SE tPZL_SE D+/D- CONNECTED TO +3V, VP/VM CONNECTED TO PULLDOWN OE TEST POINT MAX3349EA 1. D+/D- TO RCV/VM/VP PROPAGATION DELAYS RCV/VP/VM CL 15pF VP/VM Figure 8. Test Circuit for Receiver Propagation Delay tPHZ_SE tPZH_SE RC 1MΩ Figure 5. Receiver Enable and Disable Timing CHARGE-CURRENTLIMIT RESISTOR TEST POINT MAX3349EA 220Ω D+/DCL 50pF 1. DISABLE TIME (D+/D-) MEASUREMENT HIGHVOLTAGE DC SOURCE Cs 100pF RD 1.5kΩ DISCHARGE RESISTANCE STORAGE CAPACITOR DEVICE UNDER TEST V = 0 FOR tPHZ V = VTRM FOR tPLZ Figure 6. Test Circuit for Disable Time Detailed Description The MAX3349EA ±15kV ESD-protected, USB transceiver provides a full-speed USB interface to a microprocessor or ASIC. The device supports enumeration, suspend, and VBUS detection. A special UART multiplexing mode routes external UART signals (Rx and Tx) to D+ and D-, allowing the use of a shared connector to reduce cost and part count for mobile devices. The UART interface allows mobile devices such as PDAs, cellular phones, and digital cameras to use either UART or USB signaling through the same connector. The MAX3349EA features a separate UART voltage supply Figure 9. Human Body ESD Test Model input. The MAX3349EA supports a maximum UART baud rate of 921kbaud. Upon connection to a USB host, the MAX3349EA enters USB mode and provides a full-speed USB 2.0 compliant interface through VP, VM, RCV, and OE. The MAX3349EA features internal series resistors on D+ and D-, and an internal 1.5kΩ pullup resistor to D+ to allow the device to logically connect and disconnect from the USB bus while plugged in. A suspend mode is provided for low-power operation. D+ and D- are protected from electrostatic discharge (ESD) up to ±15kV. To ensure full ±15kV ESD protection, bypass VBUS to _______________________________________________________________________________________ 9 MAX3349EA Timing Diagrams (continued) Timing Diagrams (continued) IP 100% 90% I 100% 90% PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) Ir IPEAK MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode AMPERES 36.8% 10% 0 10% 0 tRL TIME tR = 0.7ns to 1ns tDL CURRENT WAVEFORM 60ns Figure 10. Human Body Model Current Waveform RC 50MΩ to 100MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 150pF Figure 12. IEC 61000-4-2 Contact Discharge Model Current Waveform RD 330Ω DISCHARGE RESISTANCE STORAGE CAPACITOR DEVICE UNDER TEST Figure 11. IEC61000-4-2 ESD Contact Discharge Test Model GND with a 0.1µF ceramic capacitor as close to the device as possible. There are high-impedance resistors ~2MΩ to ground on D+ and D- to prevent floating nodes when in UART mode and nothing is connected. Operating Modes The MAX3349EA operates in either USB mode or UART mode, depending on the presence or absence of VBUS. Bus detect output BD is logic-high when a voltage higher than VTH-VBUS is applied to VBUS, and logic-low otherwise. The MAX3349EA operates in USB mode when BD is logic-high, and UART mode when BD is logic-low. 10 t 30ns USB Mode In USB mode, the MAX3349EA implements a full-speed (12Mbps) USB interface on D+ and D-, with enumerate and suspend functions. A differential USB receiver presents the USB state as a logic-level output RCV (Table 3a). VP/VM are outputs of single-ended USB receivers when OE is logic-high, allowing detection of singleended 0 (SE0) events. When OE is logic-low, VP and VM serve as inputs to the USB transmitter. Drive suspend input SUS logic-high to force the MAX3349EA into a low-power operating mode and disable the differential USB receiver (Table 3b). UART Mode The MAX3349EA operates in UART mode when BD is logic-low (VBUS not present). The Rx signal is the output of a single-ended receiver on D+, and the Tx input is driven out on D-. Signaling voltage thresholds for D+ and D- are determined by VUART, an externally applied voltage between +2.7V and +3.3V. Power-Supply Configurations VL Logic Supply In both USB and UART modes, the control interface is powered from VL. The MAX3349EA operates with logicside voltage (VL) as low as +1.4V, providing level shifting for lower voltage ASICs and microcontrollers. ______________________________________________________________________________________ USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode VBUS(V) VTRM(V) VL(V) VUART(V) CONFIGURATION USB Mode +4.0 to +5.5 +3.0 to +3.6 Output +1.4 to +2.75 GND, Unconnected, or +2.7V to +3.3V +4.0 to +5.5 +3.0 to +3.6 Output GND or Unconnected GND, Unconnected, or +2.7V to +3.3V Disable Mode GND or Unconnected High Impedance +1.4 to +2.75 +2.7V to +3.3V UART Mode Table 2. USB Transmit Truth Table (OE = 0) INPUTS OUTPUTS Table 3b. USB Receive Truth Table (OE = 1, SUS = 1) VP VM D+ D- 0 0 0 0 D+ D- VP VM RCV 0 1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 1 0 1 1 1 1 1 0 1 0 0 1 1 1 1 0 INPUTS Table 3a. USB Receive Truth Table (OE = 1, SUS = 0) INPUTS OUTPUTS D+ D- VP VM RCV 0 0 0 0 RCV* 0 1 0 1 0 1 0 1 0 1 1 1 1 1 X * = Last state. X = Undefined. USB Mode The MAX3349EA is in USB mode when VBUS is greater than VTH-BUS and the bus detect output (BD) is logichigh. In USB mode, power for the MAX3349EA is derived from VBUS, typically provided through the USB connector. An internal linear regulator generates the required +3.3V VTRM voltage from VBUS. VTRM powers the internal USB transceiver circuitry and the D+ enumeration resistor. Bypass V TRM to GND with a 1µF ceramic capacitor as close to the device as possible. Do not power external circuitry from VTRM. Disable Mode Connect VBUS to a system power supply and leave VL unconnected or connect to ground to enter disable mode. In disable mode, D+ and D- are high impedance, and withstand external signals up to +5.5V. OE, SUS, and control signals are ignored. OUTPUTS UART Mode Connect VL and VUART to system power supplies, and leave VBUS unconnected or below VTH-BUS to operate the MAX3349EA in UART mode. The MAX3349EA supports VUART from +2.7V to +3.3V (see Table 1). USB Control Signals OE OE controls the direction of communication for USB mode. When OE is logic-low, VP and VM operate as logic inputs, and D+/D- are outputs. When OE is logichigh, VP and VM operate as logic outputs, and D+/Dare inputs. RCV is the output of the differential USB receiver connected to D+/D-, and is not affected by the OE logic level. ENUM Drive ENUM logic-high to enable the internal 1.5kΩ pullup resistor from D+ to VTRM. Drive ENUM logic-low to disable the internal pullup resistor and logically disconnect the MAX3349EA from the USB. SUS Operate the MAX3349EA in low-power USB suspend mode by driving SUS logic-high. In suspend mode, the USB differential receiver is turned off and V BUS consumes 38µA (typ) of supply current. The single-ended VP and VM receivers remain active to detect a SE0 state on USB bus lines D+ and D-. The USB transmitter remains enabled in suspend mode to allow transmission of a remote wake-up on D+ and D-. ______________________________________________________________________________________ 11 MAX3349EA Table 1. Power-Supply Configuration MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode D+ and DD+ and D- are either USB signals or UART signals, depending on the operating mode. In USB mode, D+/D- serve as receiver inputs when OE is logic-high and transmitter outputs when OE is logic-low. Internal series resistors are provided on D+ and D- to allow a direct interface with a USB connector. In UART mode, D+ is an input and D- is an output. UART signals on Tx are presented on D-, and signals on D+ are presented on Rx. The UART signaling levels for D+/D- are determined by VUART. Logic thresholds for Rx and Tx are determined by V L. D+ and D- are ESD protected to ±15kV HBM. RCV RCV is the output of the differential USB receiver. RCV is a logic 1 for D+ high and D- low. RCV is a logic 0 for D+ low and D- high. RCV retains the last valid logic state when D+ and D- are both low (SE0). RCV is driven logic-low when SUS is high. See Tables 3a and 3b. BD The bus-detect (BD) output is asserted logic-high when a voltage greater than VTH-BUS is presented on VBUS. This is typically the case when the MAX3349EA is connected to a powered USB. BD is logic-low when VBUS is unconnected. ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. Additional ESD-protection structures guard D+ and D- against damage from ESD events up to ±15kV. The ESD structures arrest ESD events in all operating modes: normal operation, suspend mode, and when the device is unpowered. Several ESD testing standards exist for gauging the robustness of ESD structures. The ESD protection of the MAX3349EA is characterized to the following standards: ±15kV Human Body Model (HBM) ±8kV Air-Gap Discharge per IEC 61000-4-2 ±8kV Contact Discharge per IEC 61000-4-2 Human Body Model Figure 9 shows the model used to simulate an ESD event resulting from contact with the human body. The model consists of a 100pF storage capacitor that is charged to a high voltage, then discharged through a 1.5kΩ resistor. Figure 10 shows the current waveform when the storage capacitor is discharged into a low impedance. 12 IEC 61000-4-2 Contact Discharge The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. It does not specifically refer to integrated circuits. The major difference between tests done using the Human Body Model and IEC 61000-4-2 is a higher peak current in IEC 61000-4-2 due to lower series resistance. Hence, the ESD withstand voltage measured to IEC 61000-4-2 is typically lower than that measured using the Human Body Model. Figure 11 shows the IEC 61000-4-2 model. The Contact Discharge method connects the probe to the device before the probe is charged. Figure 12 shows the current waveform for the IEC 61000-4-2 Contact Discharge Model. ESD Test Conditions ESD performance depends on a variety of conditions. Please contact Maxim for a reliability report documenting test setup, methodology, and results. Applications Information Data Transfer in USB Mode Transmitting Data to the USB To transmit data to the USB, operate the MAX3349EA in USB mode (see the Operating Modes section), and drive OE low. The MAX3349EA transmits data to the USB differentially on D+ and D-. VP and VM serve as differential input signals to the driver. When VP and VM are both driven low, a single-ended zero (SE0) is output on D+/D-. Receiving Data from the USB To receive data from the USB, operate the MAX3349EA in USB mode (see the Operating Modes section.) Drive OE high and SUS low. Differential data received at D+/D- appears as a logic signal at RCV. VP and VM are the outputs of single-ended receivers on D+ and D-. Data Transfer in UART Mode In UART mode, D+ is an input and D- is an output. UART signals on Tx are presented on D-, and signals on D+ are presented on Rx. The UART signaling levels for D+/D- are determined by V UART . The voltage thresholds for Rx and Tx are determined by VL. The voltage thresholds for D+ and D- are determined by VUART. Power-Supply Decoupling Bypass V BUS , V L, and V UART to ground with 0.1µF ceramic capacitors. Additionally, bypass V TRM to ground with a 1µF ceramic capacitor. Place all bypass capacitors as close as possible to the device . ______________________________________________________________________________________ USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode TX 50% D+ 50% 50% 50% tPLH_RUART tPLH_TUART tPHL_RUART tPHL_TUART D- 90% 90% 90% 50% 50% 10% 10% tFR_TUART tFF_TUART RX 90% 50% 50% 10% 10% tFR_RUART tFF_RUART Figure 14. UART Receiver Timing Figure 13. UART Transmitter Timing Power Sequencing There are no power-sequencing requirements for V L, VUART, and VBUS. UCSP Application Information For the latest application details on UCSP construction, dimensions, tape carrier information, printed circuitboard techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the Application Note UCSP- A Wafer-Level ChipScale Package available on Maxim’s website at www.maxim-ic.com/ucsp. ______________________________________________________________________________________ 13 MAX3349EA Timing Diagrams USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode MAX3349EA Typical Operating Circuit VL VUART 0.1µF 0.1µF VP USB SERIALINTERFACE ENGINE (SIE) VM OE RCV VTRM 1µF ASIC RX UART TX VBUS MAX3349EA 0.1µF ENUM SUS D+ / RX D- / TX USB/UART CONNECTOR MICROCONTROLLER BD Chip Information PROCESS: BiCMOS 14 ______________________________________________________________________________________ USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode VL VTRM VUART LEVEL SHIFTING VBUS 3.3V LINEAR REGULATOR ENUM BD VTH_VBUS RX UART Rx 1.5kΩ TX UART Tx 38Ω VP USB DIFFERENTIAL TRANSMITTER 38Ω D+ D- VM D+ RECEIVER OE SUS RCV DRECEIVER USB RECEIVER GND ______________________________________________________________________________________ 15 MAX3349EA Functional Diagram Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 16L,UCSP.EPS MAX3349EA USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode PACKAGE OUTLINE, 4x4 UCSP 21-0101 16 ______________________________________________________________________________________ H 1 1 USB 2.0 Full-Speed Transceiver with UART Multiplexing Mode 24L QFN THIN.EPS PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 1 2 PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX3349EA Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)