MAXIM MAX3341EEBE

19-2321; Rev 0; 4/02
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
Features
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
±15kV ESD Protection On D+ and DComplies with USB Standard 1.1 (Full Speed 2.0)
USB Skew Independent of Input Skew
Separate VP and VM Inputs/Outputs
VL Down to 1.8V Allows Connection with LowVoltage ASICs
Reenumerate with Power Applied
USB Detect Function
Allows Single-Ended or Differential Logic I/O
Internal Linear Regulator Allows Direct Powering
from the USB
Internal Termination Resistor for Full-Speed
Operation
Three-State Outputs
No Power-Supply Sequencing Required
Driver Active in Suspend Mode
Available in Miniature Chip-Scale Package
Applications
Ordering Information
Cell Phones
PC Peripherals
PART
TEMP RANGE
PIN-PACKAGE
Information Appliances
MAX3341EEUD
-40°C to +85°C
16 TSSOP
Data Cradles
MAX3341EEBE*
-40°C to +85°C
4 ✕ 4 UCSP**
PDAs
*Future product—contact factory for availability.
MP3 Players
**UCSP reliability is integrally linked to the user’s assembly
methods, circuit board material, and environment. See the
UCSP Reliability Notice in the UCSP Reliability section of this
data sheet for more information.
Digital Cameras
Pin Configurations appear at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
Typical Operating Circuit
1µF
SYSTEM
SUPPLY
VOLTAGE
0.1µF
SYSTEM INTERFACE
VL
RCV
MAX3341E
VPI
VMI
SUSPEND
OE
USB_DET
MODE
ENUMERATE
VPO
VMO
GND
VCC
VBUS
23.7Ω
D+
23.7Ω
D-
D+
DGND
VTRM
1µF
USB
INTERFACE
CONNECTOR
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX3341E
General Description
The MAX3341E USB level translator converts logic-level
signals to USB signals, and USB signals to logic-level
signals. An internal 1.5kΩ USB termination resistor supports full-speed (12Mbps) USB operation. The
MAX3341E provides built-in ±15kV ESD-protection circuitry on the USB I/O pins, D+ and D-, and VCC.
The MAX3341E operates with logic supply voltages as
low as 1.8V, ensuring compatibility with low-voltage
ASICs. The suspend mode lowers supply current to
less than 50µA. A unique enumerate feature allows
changes in USB communication protocol while power is
applied. The MAX3341E is fully compliant with USB
specification 1.1, and full-speed operation under USB
specification 2.0.
The MAX3341E has a USB detect that monitors the
USB bus for insertion and signals this event.
The MAX3341E is available in the miniature 4 ✕ 4
UCSP™, as well as the small 16-pin TSSOP, and is
specified over the extended temperature range, -40°C
to +85°C.
MAX3341E
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
ABSOLUTE MAXIMUM RATINGS
Maximum Continuous Current (all other pins) ..................±15mA
Continuous Power Dissipation (TA = +70°C)
16-Pin TSSOP (derate 7.1mW/°C above +70°C) .........571mW
4 ✕ 4 UCSP (derate 8.2 mW/°C above +70°C) ............659mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
(All Voltages Refer to GND Unless Otherwise Noted.)
Supply Voltage (VCC) ...............................................-0.3V to +6V
Output of Internal Regulator (VTRM) (Note 1) ..........-0.3V to +6V
Input Voltage (D+, D-) (Notes 1, 2) ..........................-0.3V to +6V
System Supply Voltage (VL) .....................................-0.3V to +6V
RCV, SUSP, VMO, MODE, VPO, OE, VMI,
VPI, USB_DET, ENUM...................................-0.3V to (VL + 0.3V)
Short-Circuit Current (D+, D-) to VCC or
Ground (Note 3) .........................................................Continuous
Note 1: Guaranteed for VCC < +3.7V only.
Note 2: Absolute Maximum Rating for input voltage (D+, D-) with VCC > +3.7V is -0.3V to (VCC +0.3V).
Note 3: External 23.7Ω resistors connected to D+ and D-.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 4V to 5.5V bypassed with 1µF to GND, GND = 0, VL = 1.8V to 3.6V, D+ to GND = 15kΩ, D- to GND = 15kΩ, ENUM = VL,
TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5V, VL = 2.5V, TA = +25°C.)
PARAMETER
SYMBOL
USB Supply Voltage
VCC
USB Supply Current
ICC
CONDITIONS
MIN
TYP
4
Data rate = 12Mbps, CL = 50pF (Figure 6b)
10
MAX
UNITS
5.5
V
20
mA
SUSP = high, ENUM = low, OE = high
50
SUSP = high, OE = low
85
µA
USB SUSP Supply Current
ICC(SUSP)
SUSP = high, ENUM = high, OE = high
85
VCC Supply Current
ICC(< 3V)
VCC < 3V
80
µA
D+/D- Leakage Current
ID+/D-(3V)
VCC = 3V; D+, D- < 3.6V
10
µA
SUSP = high, 0 < VCC < 5.5V
20
µA
3.6
V
VL Suspend Supply Current
IL(SUSP)
LOGIC-SIDE I/O
VL Input Range
VL
1.8
Input High Voltage
VIH
SUSP, MODE, ENUM, OE, VMO, VPO
Input Low Voltage
VIL
SUSP, MODE, ENUM, OE, VMO, VPO
Output Voltage High
VOH
VPI, VMI, RCV, USB_DET; ISOURCE = 1mA
Output Voltage Low
VOL
2/3 ✕ VL
0.4
VL - 0.2
V
V
VPI, VMI, RCV, USB_DET; ISINK = -1mA
SUSP, MODE, ENUM, OE, VMO, VPO = 0 or VL
Input Leakage Current
V
±1
0.4
V
±10
µA
0.3
V
3.6
V
USB-SIDE I/O
2
Output Voltage Low
VOL
D+ or D-
Output Voltage High
VOH
D+ or D-
Input Impedance
ZIN
Three-state driver
Single-Ended Input Voltage High
VIH
Single-Ended Input Voltage Low
VIL
Receiver Single-Ended
Hysteresis
VHYS
Differential Input Sensitivity
VDIFF
2.8
1
MΩ
2.0
V
0.8
200
200
_______________________________________________________________________________________
V
mV
mV
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
(VCC = 4V to 5.5V bypassed with 1µF to GND, GND = 0, VL = 1.8V to 3.6V, D+ to GND = 15kΩ, D- to GND = 15kΩ, ENUM = VL,
TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5V, VL = 2.5V, TA = +25°C.)
PARAMETER
SYMBOL
Input Common-Mode Voltage
Range
VCM
Driver Output Impedance
ZOUT
Internal Resistor
Termination Voltage
USB_DET Threshold
USB_DET Hysteresis
CONDITIONS
Including 23.7Ω (±1%) external resistors
MIN
TYP
MAX
UNITS
0.8
2.5
V
28.5
43.5
Ω
RPU
1.425
1.500
1.575
kΩ
VTRM
3.0
3.3
3.6
V
VUSBLH
4.0
VUSBHL
3.7
VUSBHYS
V
25
mV
30
dB
LINEAR REGULATOR
Power-Supply Rejection Ratio
PSRR
f = 10kHz, COUT = 1µF, D+/D- load
External Capacitor
COUT
Compensation of linear regulator
1
µF
ESD PROTECTION (VCC, D+, D-)
Human Body Model
±15
kV
IEC1000-4-2 Air-Gap Discharge
±15
kV
IEC1000-4-2 Contact Discharge
±8
kV
TIMING CHARACTERISTICS
(VCC = 4V to 5.5V, GND = 0, VL = 1.8V to 3.6V, D+ to GND = 15kΩ, D- to GND = 15kΩ, ENUM = VL, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at VCC = 5V, VL = 2.5V, TA = +25°C.) (Figures 2–6)
PARAMETER
SYMBOL
CONDITIONS
OE to Transmit Delay Enable
Time
tPZD
Figure 6c
OE to Driver Three-State Delay
Driver Disable Time
tPDZ
Figure 6c
tDUSB
Figure 6b
USB Detect Signal Delay
MIN
TYP
15
MAX
UNITS
80
ns
25
ns
7.5
µs
TRANSMITTER
VPO/VMO to D+/D- Propagation
Delay
tPLH1(drv)
MODE = high , Figure 6c
30
tPHL1(drv)
MODE = high, Figure 6c
30
VPO to D+/D- Propagation
Delay
tPLH0(drv)
MODE = low, Figure 6c
35
tPHL0(drv)
MODE = low, Figure 6c
35
ns
ns
Rise Time D+/D-
tR
4
20
ns
Fall Time D+/D-
tF
4
20
ns
90
110
%
1.3
2
V
Rise- and Fall-Time Matching
tR/tF
Output Signal Crossover
VCRS
(Note 4)
DIFFERENTIAL RECEIVER (Figure 6a)
tPLH(RCV)
30
tPHL(RCV)
30
Rise Time RCV
tR
15
ns
Fall Time RCV
tF
15
ns
D+/D- to RCV Propagation
Delay
ns
_______________________________________________________________________________________
3
MAX3341E
ELECTRICAL CHARACTERISTICS (continued)
TIMING CHARACTERISTICS (continued)
(VCC = 4V to 5.5V, GND = 0, VL = 1.8V to 3.6V, D+ to GND = 15kΩ, D- to GND = 15kΩ, ENUM = VL, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at VCC = 5V, VL = 2.5V, TA = +25°C.) (Figures 2–6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINGLE-ENDED RECEIVERS
D+/D- to VPI or VMI Propagation
Delay
tPLH(SE)
Figure 6a
15
tPHL(SE)
Figure 6a
15
ns
Rise Time VPI and VMI
tR(SE)
Measured from 10% to 90%,Figure 6a
15
ns
Fall Time VPI and VMI
tF(SE)
Measured from 90% to 10%, Figure 6a
15
ns
140
ns
Time to Detect Single-Ended
Zero
14
tSE0
Note 4: Production tested at +25°C and +85°C only. Limit at -40°C guaranteed by correlation.
Typical Operating Characteristics
(VCC = 5V, VL = 3.3V, TA = +25°C, unless otherwise noted.)
DIFFERENTIAL RECEIVER PROPAGATION
DELAY vs. VCC
TA = +25°C
14
11
MAX3341 toc02
10
16
TA = +25°C
14
12
10
TA = -40°C
TA = +85°C
9
PROPAGATION DELAY (ns)
17
TA = +85°C
18
PROPAGATION DELAY (ns)
TA = +85°C
PROPAGATION DELAY (ns)
20
MAX3341 toc01
20
SINGLE-ENDED RECEIVER PROPAGATION
DELAY vs. VL
MAX3341 toc03
DIFFERENTIAL RECEIVER PROPAGATION
DELAY vs. VL
8
TA = +25°C
7
6
TA = -40°C
5
TA = -40°C
8
4
4.00
3.3
2.8
4.25
4.50
SINGLE-ENDED RECEIVER PROPAGATION
DELAY vs. VCC
5.25
5.50
TA = +85°C
50
TA = +85°C
45
8
TIME (ns)
TA = +25°C
7
35
TA = +25°C
30
25
TA = -40°C
5
TA = -40°C
20
4
4.75
VCC (V)
5.00
5.25
5.50
2.8
2.7
2.6
2.5
TA = -40°C
2.4
TA = +25°C
2.3
2.2
2.1
2.0
1.9
1.8
TA = +85°C
1.7
1.6
15
4.50
3.3
2.8
TRANSMITTER SKEW vs. VCC
6
4.25
2.3
VL (V)
40
4.00
1.8
TIME TO ENTER SUSPEND MODE
vs. VCC
MAX3341 toc04
10
4
5.00
VCC (V)
VL (V)
9
4.75
TRANSMITTER SKEW (ns)
2.3
MAX3341 toc05
1.8
MAX3341 toc06
8
PROPAGATION DELAY (ns)
MAX3341E
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
4.00
4.25
4.50
4.75
VCC (V)
5.00
5.25
5.50
4.00
4.25
4.50
4.75
VCC (V)
_______________________________________________________________________________________
5.00
5.25
5.50
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
CURRENT CONSUMPTION IN
SUSPEND MODE
25.0
IVTRM = 15mA
3.4
IVCC (µA)
6
5
VTRM (V)
24.5
7
IVL (µA)
3.5
MAX3341 toc08
8
VTRM vs. VCC
25.5
MAX3341 toc07
9
MAX3341 toc09
LOGIC CURRENT CONSUMPTION IN
SUSPEND MODE
24.0
23.5
3.3
3.2
23.0
3.1
4
22.5
3
22.0
1.8
2.3
2.8
3.0
4.00
3.3
VL (V)
4.25
4.50
4.75
5.00
5.25
5.50
4.00
VCC (V)
4.50
4.75
5.25
5.50
TRANSMISSION IN SUSPEND MODE
(SUSP = 1)
MAX3341 toc12
MAX3341 toc11
MAX3341 toc10
5.00
VCC (V)
SUSPEND RESPONSE
RISE-AND-FALL TIME MATCHING
4.25
f = 6MHz
VPO
D+
SUSP
VMO
0
1V/div
2V/div
D-
2V/div
D+
RCV
0
D-
20ns/div
2µs/div
100ns/div
USB_DET RESPONSE
MAX3341 toc13
VCC
2V/div
0
USB_DET
0
10µs/div
_______________________________________________________________________________________
5
MAX3341E
Typical Operating Characteristics (continued)
(VCC = 5V, VL = 3.3V, TA = +25°C, unless otherwise noted.)
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
MAX3341E
Pin Description
PIN
NAME
TSSOP
UCSP
1
D2
RCV
2
D1
VPO
3
C2
MODE
4
C1
VMO
5
B1
OE
6
B2
SUSP
7
A1
VPI
8
A2
VMI
FUNCTION
Receiver Output. Single-ended CMOS output. RCV responds to the differential input on D+
and D-.
ASIC Voltage Positive Output. Logic-level data into the MAX3341E.
Mode-Control Input. Selects differential (mode 1) or single-ended (mode 0) input for the
system side when converting logic-level signals to USB level signals. Force MODE high to
select mode 1. Force MODE low to select mode 0.
ASIC Voltage Minus Output. Logic-level data into the MAX3341E.
Output Enable. Drive OE low to enable data transmission on D+ and D-. Drive OE high to
disable data transmission or to receive data.
Suspend Input. Drive SUSP low for normal operation. Drive SUSP high for low-power state. In
low-power state, RCV is low, and VPI/VMI are active.
ASIC Voltage Positive Input. Logic-level data output from the MAX3341E.
ASIC Voltage Minus Input. Logic-level data output from the MAX3341E.
Enumerate. Drive ENUM high to connect the internal 1.5kΩ resistor from D+ to 3.3V. Drive
ENUM low to disconnect the internal 1.5kΩ resistor.
9
B3
ENUM
10
A3
VCC
USB-Side Power-Supply Input. Connect VCC to the incoming USB power supply. Bypass VCC
to GND with a 1µF ceramic capacitor.
11
A4
GND
Ground
12
B4
D-
Negative USB Differential Data Input/Output. Connect to the USB’s D- signal through a 23.7Ω
±1% resistor.
13
C4
D+
Positive USB Differential Data Input/Output. Connect to the USB’s D+ signal through a 23.7Ω
±1% resistor.
14
D4
VTRM
15
D3
VL
System-Side Power-Supply Input. Connect to the system’s logic-level power supply, 1.8V to
3.6V.
16
C3
USB_DET
USB Detector Output. A high at USB_DET signals to the ASIC that VCC is present. A low at
USB_DET indicates that VCC is not present.
Regulated Output Voltage. 3.3V output derived from the VCC input. Bypass VTRM to GND
with a 1µF (min) low-ESR capacitor such as ceramic or plastic film types.
Detailed Description
The MAX3341E is a bidirectional level translator that
converts single-ended or differential logic-level signals
to differential USB signals, and converts differential
USB signals to single-ended or differential logic-level
signals. The MAX3341E includes an internal 1.5kΩ
pullup resistor that connects and disconnects D+ to
VTRM (Functional Diagram). The MAX3341E is tolerant
to power sequencing with either VCC > VL or VL > VCC.
Additionally, the USB I/O, D+ and D-, and VCC are ESD
protected to ±15kV. The MAX3341E can receive USB
power (VCC) directly from the USB connection, and
6
operates with logic supplies (VL) down to 1.8V while still
meeting the USB physical layer specifications. The
MAX3341E supports full-speed (12Mbps) USB specification 2.0 operation.
The MAX3341E has a unique enumerate feature that
functions when power is applied. Driving ENUM low
disconnects the internal 1.5kΩ termination resistor from
D+ enumerating the USB. This is useful if changes in
communication protocol are required while power is
applied, and while the USB cable is connected.
_______________________________________________________________________________________
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
D+ and DD+ and D- are the USB side transmitter I/O connections, and are ESD protected to ±15kV using the
Human Body Model, ±15kV using IEC 1000-4-2 AirGap Discharge, and ±8kV using IEC 1000-4-2 Contact
Discharge, making the MAX3341E ideal for applications
where a robust transmitter is required. A 23.7Ω resistor
is required on D+ and D- for normal operation (see
External Resistors).
The MAX3341E contains unique circuitry to ensure the
USB skew is independent of the input skew on VPO
and VMO. Input skews of up to 10ns are ignored and
do not show up on the output.
ENUM
USB specification 2.0 requires a 1.5kΩ pullup resistor
on D+ for full-speed (12Mbps) operation. Controlled by
enumerate (ENUM), the MAX3341E provides this internal 1.5kΩ resistor. Drive ENUM high to connect the
pullup resistor from D+ to VTRM. Drive ENUM low to
disconnect the pullup resistor from D+ to VTRM.
VPO/VMO, VPI/VMI, and OE
The MAX3341E system-side inputs are VPO and VMO.
Data from an ASIC comes into the MAX3341E through
VPO and VMO. VPO and VMO operate either differentially with VPO as the positive terminal and VMO as the
negative terminal, or single ended with VPO as the data
input (see MODE section).
The MAX3341E system-side outputs are VPI, VMI, and
RCV. The MAX3341E sends data to an ASIC through
VPI, VMI, and RCV. VPI and VMI are outputs to the
single-ended receivers and RCV is the output of the differential receiver.
Output enable (OE) controls data transmission. Drive
OE low to enable data transmission on D+ and D-.
Drive OE high to disable data transmission or receive
data.
MODE
MODE is a control input that selects whether differential
or single-ended logic signals are recognized by the
system side of the MAX3341E. Drive MODE high to
select differential mode with VPO as the positive terminal and VMO as the negative terminal. Drive MODE low
to select single-ended mode with VPO as the data input
(Table 1).
VTRM
VTRM is the 3.3V output of the internal linear voltage
regulator. VTRM powers the internal circuitry of the USB
side of the MAX3341E. Connect a 1µF (min) low-ESR
ceramic or plastic capacitor from VTRM to GND, as
close to VTRM as possible.
VCC
In most applications, VCC is derived from the USB 5V output. If supplying VCC with an alternative power supply
such as a lithium-ion battery, the VCC input range is 4.0V
to 5.5V. If VCC drops below 4.0V, supply current drops
to 10µA avoiding excessive battery drain, and D+/Denter a high-impedance state allowing other devices to
drive the lines. Bypass VCC to GND with a 1µF ceramic
capacitor as close to the device as possible.
USB Detect
USB detect output (USB_DET) signals to the ASIC that
VCC is present. A high at USB_DET indicates that VCC
is present, while a low at USB_DET indicates that VCC
is not present.
SUSP
Suspend (SUSP) is a control input. Force SUSP high to
place the MAX3341E in a low-power state. In this state,
the quiescent supply current into VCC is less than 50µA
and RCV goes low.
In suspend mode, VPI and VMI remain active as
receive outputs and VTRM stays on. The MAX3341E
continues to receive data from the USB, allowing the µP
to sense activity on the D+/D- lines and wake up the
MAX3341E.
The MAX3341E can also transmit data to D+ and Dwhile in suspend mode. This function is used to signal a
remote wakeup by driving a signal on D+ and D- for a
period of 1ms to 15ms. Slew rate control is not active
during suspend mode, and data can only be sent at
data rates up to 200kps.
Data Transfer
Receiving Data from the USB
Data received from the USB are output to VPI/VMI in
either of two ways, differentially or single ended. To
receive data from the USB, force OE high and SUSP
low. Differential data arriving at D+/D- appear as differential logic signals at VPI/VMI, and as a single-ended
logic signal at RCV. If both D+ and D- are low, then VPI
and VMI are low, signaling a single-ended zero condition on the bus; RCV is undefined (Table 1).
Transmitting Data to the USB
The MAX3341E outputs data to the USB differentially on
D+ and D-. The logic driving signals may be either differential or single ended. For sending differential logic,
force MODE high, force OE and SUSP low, and apply
data to VPO and VMO. D+ then follows VPO, and Dfollows VMO. To send single-ended logic signals, force
_______________________________________________________________________________________
7
MAX3341E
Device Control
MAX3341E
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
Table 1a. Truth Table Transmit (SUSP = 0, OE = 0, ENUM = X)
INPUT
OUTPUT
MODE
VPO
VMO
D+
D-
RCV
VPI
VMI
RESULT
0
0
0
0
1
0
0
1
LOGIC 0
0
0
1
0
0
X
0
0
SE0
0
1
0
1
0
1
1
0
LOGIC 1
0
1
1
0
0
X
0
0
SE0
1
0
0
0
0
X
0
0
SE0
1
0
1
0
1
0
0
1
LOGIC 0
1
1
0
1
0
1
1
0
LOGIC 1
1
1
1
1
1
X
1
1
UNDEFINED
Table 1b. Truth Table Receive (SUSP = 0, OE = 1, ENUM = X)
INPUT
OUTPUT
D+
D-
RCV
VPI
VMI
0
0
X
0
0
SE0
0
1
0
0
1
LOGIC 0
1
0
1
1
0
LOGIC 1
1
1
X
1
1
UNDEFINED
RESULT
Table 1c. Truth Table Transmit in Suspend* (SUSP = 1, OE = 0, ENUM = X)
INPUT
OUTPUT
MODE
VPO
VMO
D+
0
0
0
0
0
0
1
0
0
1
0
1
0
1
1
1
0
0
1
0
1
1
D-
RCV
VPI
VMI
RESULT
1
0
0
0
0
1
LOGIC 0
0
0
0
SE0
0
1
0
LOGIC 1
0
0
0
0
0
0
SE0
0
0
0
0
1
SE0
0
1
0
0
1
LOGIC 0
1
1
0
1
0
0
1
0
LOGIC 1
1
1
1
0
1
1
UNDEFINED
*Timing specifications are not guaranteed for D+ and D-.
Table 1d. Truth Table Receive in Suspend* (SUSP = 1, OE = 1, MODE = X, VPO/VMO = X,
ENUM = X)
INPUT
OUTPUT
D+
D-
RCV
VPI
VMI
RESULT
0
0
0
0
0
VPI/VMI ACTIVE
0
1
0
0
1
VPI/VMI ACTIVE
1
0
0
1
0
VPI/VMI ACTIVE
1
1
0
1
1
VPI/VMI ACTIVE
*Timing specifications are not guaranteed for D+ and D-.
8
_______________________________________________________________________________________
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
RC
1MΩ
CHARGE-CURRENTLIMIT RESISTOR
ESD Protection
To protect the MAX3341E against ESD, D+ and Dhave extra protection against static electricity to protect
the device up to ±15kV. The ESD structures withstand
high ESD in all states—normal operation, suspend, and
powered down. In order for the 15kV ESD structures to
work correctly, a 1µF or greater capacitor must be connected from VTRM to GND.
ESD protection can be tested in various ways; the D+
and D- input/output pins are characterized for protection
to the following limits:
1) ±15kV using the Human Body Model
2) ±8kV using the IEC 1000-4-2 Contact Discharge
method
3) ±15kV using the IEC 1000-4-2 Air-Gap method
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 1a shows the Human Body Model, and Figure 1b
shows the current waveform it generates when discharged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩ resistor.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically
refer to integrated circuits. The MAX3341E helps the user
design equipment that meets level 4 of IEC 1000-4-2, without the need for additional ESD-protection components.
The major difference between tests done using the
Human Body Model and IEC 1000-4-2 is a higher peak
current in IEC 1000-4-2, because series resistance is
lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally
lower than that measured using the Human Body Model.
Figure 1c shows the IEC 1000-4-2 model.
The Air-Gap Discharge test involves approaching the
device with a charged probe. The Contact Discharge
method connects the probe to the device before the
probe is energized.
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
MAX3341E
MODE, SUSP, and OE low, and apply data to
VPO/VMO. When VMO is high, a single-ended zero condition is sent on the bus and RCV is undefined (Table 1).
RD
1500Ω
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
Figure 1a. Human Body ESD Test Models
IP 100%
90%
Ir
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
AMPERES
36.8%
10%
0
0
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 1b. Human Body Model Current Waveform
RC
50MΩ TO 100MΩ
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
RD
330Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
Figure 1c. IEC 1000-4-2 ESD Test Model
Machine Model
The Machine Model for ESD tests all pins using a 200pF
storage capacitor and zero discharge resistance. Its
objective is to emulate the stress caused by contact that
_______________________________________________________________________________________
9
MAX3341E
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
occurs with handling and assembly during manufacturing. All pins require this protection during manufacturing. Therefore, after PC board assembly, the Machine
Model is less relevant to I/O ports.
VL
OE
VL/2
Applications Information
0
tPDZ
tPZD
External Components
VOHD - 0.3V
D+/DVOLD + 0.3V
Figure 2. Enable and Disable Timing, Transmitter
External Capacitors
Use three external capacitors for proper operation. Use
a 0.1µF ceramic for decoupling VL, a 1µF ceramic for
decoupling VCC, and a 1.0µF (min) ceramic or plastic
filter capacitor on VTRM. Return all capacitors to GND.
VL
VPO
UCSP Reliability
VL/2
The UCSP represents a unique packaging form factor
that may not perform equally to a packaged product
through traditional mechanical reliability tests. CSP reliability is integrally linked to the user’s assembly methods, circuit board material, and usage environment.
The user should closely review these areas when considering use of a CSP package. Performance through
Operating Life Test and Moisture Resistance remains
uncompromised as it is primarily determined by the
wafer-fabrication process.
0
tPHLO
2V
D+/D0.8V
Figure 3. Mode 0 Timing
VL
VPO/VMO
VL/2
0
tPLH1
2V
D+/D-
External Resistors
Two external 23.7Ω ±1%, 1/2W resistors are required
for USB connection. Place the resistors in between the
MAX3341E and the USB connector on the D+ and Dlines. See Typical Operating Circuit.
tPHL1
Mechanical stress performance is a greater consideration for a CSP package. CSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be considered. Table 2 shows the testing done to characterize
the CSP reliability performance. In conclusion, the
UCSP is capable of performing reliably through environmental stresses as indicated by the results in Table
2. Additional usage data and recommendations are
detailed in the UCSP application note, which can be
found on Maxim’s website at www.maxim-ic.com.
0.8V
Figure 4. Mode 1 Timing
10
______________________________________________________________________________________
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
3V
D-
0V
tPHL(RCV)
MAX3341E
D+
tPLH(RCV)
VL
RCV
VL/2
0V
tPHL(SE)
tPLH(SE)
VL
VPI
VL/2
0V
tPLH(SE)
VMI
tPHL(SE)
VL
VL/2
0V
D+/D- RISE/FALL TIMES ≤ 8ns, VL = 1.8V, 2.5V, 3.3V
Figure 5. D+/D- to RCV, VPI, VMI Propagation Delays
______________________________________________________________________________________
11
MAX3341E
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
TEST POINT
3.3V
D+
MAX3341E
23.7Ω
TEST POINT
VMI OR VPI OR RCV
1.5kΩ
CL
15kΩ
25pF
MAX3341E
TEST POINT
(a) LOAD FOR VPI, VMI, AND RCV
23.7Ω
DCL
15kΩ
MAX3341E
24Ω
USB_DET
TEST POINT
200Ω
D+ OR D25pF
50pF
+
-
(b) LOAD FOR D+, D-, AND USB_DET
GND
OR VCC
(c) LOAD FOR ENABLE AND DISABLE TIME, D+/D-
Figure 6. Test Circuits
Table 2. Reliability Test Data
TEST
Temperature Cycle
Operating Life
Moisture Resistance
Low-Temperature Storage
Low-Temperature
Operational
Solderability
ESD
High-Temperature Operating
Life
CONDITIONS
DURATION
NO. OF FAILURES PER
SAMPLE SIZE
-35°C to +85°C,
-40°C to +100°C
150 cycles,
900 cycles
0/10,
0/200
TA = +70°C
240hr
0/10
+20°C to +60°C, 90% RH
240hr
0/10
-20°C
240hr
0/10
-10°C
24hr
0/10
8hr steam age
—
0/15
±2000V, Human Body Model
—
0/5
TJ = +150°C
168hr
0/45
Chip Information
TRANSISTOR COUNT: 2162
PROCESS: BiCMOS
12
______________________________________________________________________________________
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
USB SUPPLY
VCC
LINEAR
REGULATOR
VL
Vbg
OE
BANDGAP
USB_DET
ENUM
VTRM
TO INTERNAL CIRCUITS
MAX3341E
RCV
RECEIVER
GND
1.5kΩ
SUSP
TRANSMITTER
D-
23.7Ω
VMO
MODE
D+
VPO
OE
23.7Ω
EXTERNAL RESISTORS
TO INTERNAL CIRCUITS
VMI
USB_DET
VPI
Vbg
SINGLE-ENDED RECEIVERS
Pin Configurations
1
TOP VIEW
RCV 1
16 USB_DET
VPO
2
15 VL
MODE
3
14 VTRM
VMO 4
OE 5
MAX3341E
13 D+
12 D-
SUSP 6
11 GND
VPI 7
10 VCC
VMI 8
9
TSSOP
ENUM
2
3
4
BOTTOM VIEW
MAX3341E
D
VPO
RCV
VL
VTRM
C
VMO
MODE USB_DET
D+
OE
SUSP
ENUM
D-
VPI
VMI
VCC
GND
B
A
UCSP
______________________________________________________________________________________
13
MAX3341E
Functional Diagram
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
4x4 UCSP.EPS
MAX3341E
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
14
______________________________________________________________________________________
±15kV ESD-Protected USB Level Translator in
UCSP with USB Detect
TSSOP,NO PADS.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX3341E
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)