19-3587; Rev 1; 1/12 Pin-Selectable, Hex Power-Supply Supervisory Circuit Features The MAX6886 pin-selectable, multivoltage supply supervisor monitors six voltage-detector inputs and one watchdog input, asserting a RESET when inputs drop below the selected voltage thresholds or the watchdog timer expires. Manual reset and margin disable inputs offer additional flexibility. Five logic inputs select the MAX6886 thresholds. Logic inputs select a supply tolerance (5% or 10%) and 1 of 32 factory-set threshold settings. Connect external capacitors or use the factory default setting to set the watchdog timeout periods and reset time delay. The MAX6886 is available in a 20-pin TQFN (5mm x 5mm x 0.8mm) package and operates over the extended -40°C to +85°C temperature range. o 32 Pin-Selectable Undervoltage Detector Thresholds o Capacitor-Adjustable Reset and Watchdog Timeout Periods o Factory Default Reset and Watchdog Timeout Periods o Margining Disable and Manual Reset Controls o -40°C to +85°C Operating Temperature Range o Small 5mm x 5mm 20-Pin Thin QFN Package o Few External Components o ±1% Threshold Accuracy Applications Ordering Information Multivoltage Systems Telecom PART TEMP RANGE PIN-PACKAGE MAX6886ETP+ -40°C to +85°C 20 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. Networking Servers/Workstations/Storage Systems Pin Configuration appears at end of data sheet. Typical Operating Circuit 12V 12V DC-DC 1 5V DC-DC 2 3.3V DC-DC 3 2.5V DC-DC 4 1.8V 1.5V 1.2V IN1 IN2 IN3 IN4 IN5 IN6 3.3V ALWAYS ON RESET VCC WDI MARGIN DBP TH0 TH1 TH2 TH3 TH4 RESET LOGIC OUTPUT µP MAX6886 MR SRT SWT GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6886 General Description MAX6886 Pin-Selectable, Hex Power-Supply Supervisory Circuit ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) IN1–IN6, VCC, RESET, SRT, SWT .............................-0.3V to +6V TH0–TH4, WDI, MR, MARGIN ..................................-0.3V to +6V DBP ..........................................................................-0.3V to +3V Input/Output Current (all pins)..........................................±20mA Continuous Power Dissipation (TA = +70°C) 20-Pin 5mm x 5mm Thin QFN (derate 21.3mW/°C above +70°C) .............................1702mW Maximum Junction Temperature .....................................+150°C Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN1–VIN4 or VCC = 2.7V to 5.8V, WDI = GND, TH0–TH4 = MARGIN = MR = DBP, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL Operating Voltage Range (Note 3) Supply Current Digital Bypass Voltage Threshold Accuracy (Table 2) CONDITIONS Voltage on either one of IN1–IN4 or VCC to guarantee the part is fully operational ICC 2.48 IN1–IN6, VIN _ falling TYP MAX UNITS 5.8 V 0.9 1.2 mA 2.55 2.67 V 2.7 VIN1 = 5.8V, IN2–IN6 = GND, no load VDBP VTH MIN TA = +25oC to +85oC -1 +1 TA = -40oC to +85oC -1.5 +1.5 % VTH Threshold Hysteresis VTH-HYS 0.3 % VTH Threshold Tempco ∆VTH/°C 10 ppm/°C IN_ Input Impedance RIN IN_ Input Leakage Current IIN Power-Up Delay tD-PO For VIN_ < highest VIN1–IN4 and VIN_ < VCC (not ADJ), thresholds are not set as adjustable IN5, IN6 IN1–IN4 set as adjustable thresholds VCC ≥ 2.5V 130 200 -150 300 kΩ +150 nA 2.5 ms IN_ to RESET Delay tD-R IN_ falling/rising, 100mV overdrive Reset Default Timeout Period tRP VSRT = VCC 180 200 220 ms Reset Adjustable Timeout Period tRP-ADJ CSRT = 47nF 135 207 280 ms SRT Adjustable Timeout Current ISRT VSRT = VGND 180 230 280 nA 1.1 1.25 1.5 V 0.95 1.00 1.05 V SRT Default Timeout Threshold VSRT-DEF VSRT ≥ VSRT-DEF, selects reset default SRT Adjustable Timeout Threshold VSRT-ADJ (Note 4) SRT Adjustable Timeout Discharge Threshold VSRT-DIS (Note 5) SRT Adjustable Timeout OutputLow Discharge Current ISRT-DIS VSRT = 0.3V RESET Output Low RESET Output Open-Drain Leakage Current 2 VOLRESET ILKG 20 100 mV 0.7 ISINK = 4mA, output asserted Output tri-stated µs -1 _______________________________________________________________________________________ mA 0.4 V +1 µA Pin-Selectable, Hex Power-Supply Supervisory Circuit (VIN1–VIN4 or VCC = 2.7V to 5.8V, WDI = GND, TH0–TH4 = MARGIN = MR = DBP, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS MIN MR, MARGIN, TH0–TH4, WDI Input Voltage VIH 1.4 MR Input Pulse Width tMR 1 VIL tD-MR MR to Internal DBP Pullup Current MARGIN to Internal DBP Pullup Current IMR IMARGIN WDI Input Pulse Width tWDI Watchdog Default Timeout Period tWD Watchdog Adjustable Timeout Period tWD-ADJ V µs 100 ns 200 ns 5 10 15 µA VMARGIN = 1.4V 5 10 15 µA +100 nA 15 µA -100 IWDI UNITS VMR = 1.4V TH0–TH4 Input Current WDI Pulldown Current MAX 0.6 MR Glitch Rejection MR to RESET Delay TYP VWDI = 0.6V 5 10 50 ns Initial mode 92.16 102.4 112.64 Normal mode 1.44 1.6 1.76 Initial mode 53.7 82.5 111.9 Normal mode 0.93 1.43 1.94 SWT = GND 180 230 280 nA VSWT = VCC CSWT = 0.33µF s s SWT Adjustable Timeout Current ISWT SWT Default Timeout Threshold VSWT-DEF VSWT ≥ VSWT-DEF, selects watchdog default timeout 1.1 1.25 1.5 V SWT Adjustable Timeout Threshold VSWT-ADJ (Note 4) 0.95 1.00 1.05 V SWT Adjustable Timeout Discharge Threshold VSWT-DIS (Note 5) SWT Adjustable Timeout OutputLow Discharge Current ISWT-DIS VSWT = 0.3V Note 1: Note 2: Note 3: Note 4: Note 5: 100 0.7 mV mA Device may be supplied from IN1–IN4 or VCC. 100% production tested at TA = +25°C and TA = +85°C. Specifications at TA = -40°C are guaranteed by design. The internal supply voltage, measured at VCC, equals the maximum of IN1–IN4. External capacitor is charged by IS_T when VS_T-DIS < VS_T < VS_T-ADJ. External capacitor is discharged by IS_T-DIS down to VS_T-DIS after VS_T reaches VS_T-ADJ. _______________________________________________________________________________________ 3 MAX6886 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VIN1–VIN4 or VCC = 5V, WDI = GND, TH0–TH4 = MARGIN = MR = DBP, TA = +25°C, unless otherwise noted.) 0.85 0.80 0.95 TA = +25°C TA = +85°C 0.90 0.85 0.80 215 TIMEOUT PERIOD (ms) 0.90 220 MAX6886 toc02 TA = +85°C SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 0.95 1.00 MAX6886 toc01 1.00 RESET TIMEOUT PERIOD vs. TEMPERATURE (DEFAULT tRP = 200ms) VCC SUPPLY CURRENT vs. VCC SUPPLY VOLTAGE TA = +25°C MAX6886 toc03 IN1–IN4 SUPPLY CURRENT vs. IN1–IN4 SUPPLY VOLTAGE 210 205 200 195 190 TA = -40°C 0.75 3.6 4.6 5.6 180 2.6 3.6 4.6 -15 10 35 60 SUPPLY VOLTAGE (V) TEMPERATURE (°C) IN_ TO RESET PROPAGATION DELAY vs. TEMPERATURE WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE (DEFAULT tWD = 1.6s) NORMALIZED IN_ THRESHOLD vs. TEMPERATURE TIMEOUT PERIOD (s) 27 26 25 24 23 1.650 1.625 1.600 1.575 1.550 21 1.525 20 1.500 -15 10 35 60 85 1.002 1.001 1.000 0.999 0.998 0.997 0.995 -40 -15 10 35 60 -40 85 -15 150 125 100 RESET ASSERTS ABOVE THIS LINE 50 25 400 350 OUTPUT-VOLTAGE LOW (mV) 175 35 300 250 200 150 100 50 0 0 1 10 100 IN_ THRESHOLD OVERDRIVE (mV) 60 OUTPUT-VOLTAGE LOW vs. SINK CURRENT MAX6886 toc07 200 10 TEMPERATURE (°C) TEMPERATURE (°C) MAXIMUM IN_ TRANSIENT vs. IN_ THRESHOLD OVERDRIVE MAXIMUM TRANSIENT DURATION (µs) 1.003 0.996 TEMPERATURE (°C) 75 1.004 MAX8666 toc08 -40 85 MAX6886 toc06 28 1.675 1.005 NORMALIZED IN_ THRESHOLD 1.700 MAX6886 toc05 100mV OVERDRIVE 22 4 -40 5.6 SUPPLY VOLTAGE (V) MAX6886 toc04 29 185 0.70 2.6 30 TA = -40°C 0.75 0.70 PROPAGATION DELAY (µs) MAX6886 Pin-Selectable, Hex Power-Supply Supervisory Circuit 1000 0 2 4 6 8 10 12 SINK CURRENT (mA) _______________________________________________________________________________________ 14 85 Pin-Selectable, Hex Power-Supply Supervisory Circuit MR TO RESET OUTPUT PROPAGATION DELAY vs. TEMPERATURE 2.25 2.00 1.75 1.50 1.25 1.00 170 160 150 140 130 10 35 60 1.6 1.5 1.4 1.3 1.2 110 1.1 85 1.0 -40 TEMPERATURE (°C) -15 10 35 60 -40 85 -15 10 60 85 WATCHDOG TIMEOUT PERIOD vs. CSWT RESET TIMEOUT PERIOD vs. CSRT MAX6886 toc12 10,000 1000 TIMEOUT PERIOD (ms) 1000 35 TEMPERATURE (°C) TEMPERATURE (°C) 10,000 TIMEOUT PERIOD (ms) 1.7 100 10 MAX6886 toc13 -15 1.8 120 100 -40 1.9 TIMEOUT PERIOD (s) 180 MAX6886 toc11 190 TIMEOUT PERIOD (ms) 2.50 2.0 MAX6886 toc10 2.75 PROPAGATION DELAY (µs) 200 MAX6886 toc09 3.00 WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE (CSWT = 0.33µF) RESET TIMEOUT PERIOD vs. TEMPERATURE (CRST = 0.047µF) 100 10 1 1 0.1 0.1 0.1 1 10 100 1000 0.1 1 10 100 1000 CSWT (nF) CSRT (nF) Pin Description PIN NAME FUNCTION 1 RESET Open-Drain, Active-Low Reset Output. RESET asserts when any input voltage falls below the selected threshold, the watchdog timer expires, or when MR is pulled low. RESET remains asserted for default (200ms) or adjustable reset timeout period after all assertion-causing conditions are cleared. An external pullup resister is required. 2 SRT Reset Timeout Adjust Input. Connect an external capacitor between SRT and GND to set the reset timeout period. The timeout period is calculated by tRP = 4.348E6 x CSRT (tRP in seconds and CSRT in Farads). To use the factory default period of 200ms connect SRT to VCC. SWT Watchdog Timeout Adjust Input. Connect an external capacitor between SWT and GND to set the watchdog timeout period. The adjustable timeout period is calculated by tWD = 4.348E6 x CSWT (tWD in seconds and CSWT in Farads). Disable the watchdog timer by connecting SWT to GND. Connect SWT to VCC to use the factory-default normal and initial periods of 1.6s and 102.4s, respectively. 3 _______________________________________________________________________________________ 5 MAX6886 Typical Operating Characteristics (continued) (VIN1–VIN4 or VCC = 5V, WDI = GND, TH0–TH4 = MARGIN = MR = DBP, TA = +25°C, unless otherwise noted.) Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886 Pin Description (continued) 6 PIN NAME 4 GND Ground 5 WDI Watchdog Timer Input. Logic input for the watchdog timer function. If WDI is not strobed with a valid low-to-high or high-to-low transition within the selected timeout period, RESET asserts. WDI is internally pulled down to GND through a 10µA current sink. 6 MR Active-Low Manual Reset Input. Pull MR low to assert RESET. RESET will remain asserted for its preset/adjustable reset timeout period when MR is driven high. Leave MR unconnected or connect to DBP if unused. MR is internally pulled up to DBP through a 10µA current source. 7 MARGIN Margin Input. When MARGIN is pulled low, RESET is held in its existing state independent of subsequent changes in monitored input voltages or the watchdog timer expiration. MARGIN is internally pulled up to DBP through a 10µA current source. MARGIN overrides MR if both are asserted at the same time. 8 TH4 Threshold Selection Input 4. Logic input to select desired threshold. Connect TH4 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. 9 TH3 Threshold Selection Input 3. Logic input to select desired threshold. Connect TH3 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. 10 TH2 Threshold Selection Input 2. Logic input to select desired threshold. Connect TH2 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. 11 TH1 Threshold Selection Input 1. Logic input to select desired threshold. Connect TH1 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. 12 TH0 Threshold Selection Input 0. Logic input to select desired threshold. Connect TH0 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. 13 VCC 14 DBP 15 IN6 16 IN5 17 IN4 18 IN3 19 IN2 20 IN1 — EP FUNCTION Internal Power-Supply Voltage. Bypass VCC to GND with a 1µF ceramic capacitor as close to the device as possible. VCC supplies power to the internal circuitry. VCC is internally powered from the highest of the monitored IN1–IN4 voltages. Do not use VCC to supply power to external circuitry. To externally supply VCC, see the Powering the MAX6886 section. Digital Bypass Voltage. The internally generated voltage at DBP supplies power to internal logic and output RESET. Connect a 1µF capacitor from DBP to GND as close to the device as possible. Do not use DBP to supply power to external circuitry. Input Voltage Detector 6. Select the undervoltage threshold using TH0–TH4. See Table 2. IN6 cannot supply power to the device. For improved noise immunity, bypass IN6 to GND with a 0.1µF capacitor installed as close to the device as possible. Input Voltage Detector 5. Select the undervoltage threshold using TH0–TH4. See Table 2. IN5 cannot supply power to the device. For improved noise immunity, bypass IN5 to GND with a 0.1µF capacitor installed as close to the device as possible. Input Voltage Detector 4. Select the undervoltage threshold using TH0–TH4. See Table 2. For improved noise immunity, bypass IN4 to GND with a 0.1µF capacitor installed as close to the device as possible. Power the device through IN1–IN4 or VCC (see the Powering the MAX6886 section). Input Voltage Detector 3. Select the undervoltage threshold using TH0–TH4. See Table 2. For improved noise immunity, bypass IN3 to GND with a 0.1µF capacitor installed as close to the device as possible. Power the device through IN1–IN4 or VCC (see the Powering the MAX6886 section). Input Voltage Detector 2. Select the undervoltage threshold using TH0–TH4. See Table 2. For improved noise immunity, bypass IN2 to GND with a 0.1µF capacitor installed as close to the device as possible. Power the device through IN1–IN4 or VCC (see the Powering the MAX6886 section). Input Voltage Detector 1. Select the undervoltage threshold using TH0–TH4. See Table 2. For improved noise immunity, bypass IN1 to GND with a 0.1µF capacitor installed as close to the device as possible. Power the device through IN1–IN4 or VCC (see the Powering the MAX6886 section). Exposed Paddle. Internally connected to GND. Connect EP to GND or leave unconnected. _______________________________________________________________________________________ Pin-Selectable, Hex Power-Supply Supervisory Circuit WDI MARGIN SWT *IN_ DETECTOR IN1 IN2 IN2 DETECTOR IN3 IN3 DETECTOR IN4 IN4 DETECTOR IN5 IN5 DETECTOR IN6 IN6 DETECTOR LOGIC ARRAY DBP SRT DBP RESET MR TH0 TH1 VIRTUAL DIODES VCC 1µF TH2 REFERENCE 2.55V LDO TH3 TH4 DBP 1µF MAX6886 *SEE THE VOLTAGE-DETECTOR INPUTS (IN_) SECTION FOR ADJUSTABLE INPUTS. GND _______________________________________________________________________________________ 7 MAX6886 Functional Diagram MAX6886 Pin-Selectable, Hex Power-Supply Supervisory Circuit Detailed Description The MAX6886 pin-selectable, multivoltage supply supervisor monitors six voltage-detector inputs and one watchdog input. RESET asserts when any of the configured input thresholds have been reached, MR is asserted, or the watchdog timer expires. MARGIN allows a system to be tested without RESET being asserted. Logic inputs TH0–TH4 select 1 of 32 threshold sets for inputs IN1–IN6 (see Table 2, Threshold Options). Inputs in Table 2 that contain ADJ for inputs allow external resistor voltage-dividers to be connected to create additional thresholds. RESET is an open-drain acitve-low output and asserts when MR is low, the watchdog timer expires, or any voltage at IN1–IN6 falls below its respective threshold. The default RESET time delay is 200ms and custom timeout periods are set by connecting an external capacitor from SRT to GND. The default watchdog normal and initial timeout periods are 1.6s and 102.4s, respectively. The normal and initial watchdog timeout periods can be adjusted by connecting an external capacitor from SWT to GND. Powering the MAX6886 The MAX6886 derives power from the voltage-detector inputs IN1–IN4 or through an externally supplied VCC. A virtual diode-ORing scheme selects the positive input that supplies power to the device (see the Functional Diagram). The highest input voltage on IN1–IN4 supplies power to the device. One of IN1–IN4 must be at least 2.7V to ensure proper operation. Internal hysteresis ensures that the supply input that initially powered the device continues to power the device when multiple input voltages are within 50mV of each other. VCC powers the analog circuitry and is the bypass connection for the MAX6886 internal supply. Bypass VCC to GND with a 1µF ceramic capacitor installed as close to the device as possible. The internal supply voltage, measured at VCC, equals the maximum of IN1–IN4. If VCC is externally supplied, VCC must be at least 200mV higher than any voltage applied to IN1–IN4 and VCC must be brought up first. V CC always powers the device when all IN_ are factory set as “ADJ.” Do not use the internally generated VCC to provide power to external circuitry. The MAX6886 generates a digital supply voltage at DBP for the internal logic circuitry and RESET. Bypass DBP to GND with a 1µF ceramic capacitor installed as close to the device as possible. The nominal DBP output voltage is 2.55V. Do not use DBP to provide power to external circuitry. 8 Inputs The MAX6886 contains multiple logic and voltagedetector inputs. Each voltage-detector input is monitored for undervoltage thresholds. Voltage-Detector Inputs (IN_) The MAX6886 offers several monitor options with both pin-selectable and adjustable reset thresholds. The threshold voltage at each adjustable IN_ input is typically 0.6V. To monitor a voltage >0.6V, connect a resistor-divider network to the circuit as shown in Figure 1. VIN_TH = VTH (R1 + R2) / R2 (Equation 1) where VIN_TH is the desired reset threshold voltage for the respective IN_ and VTH is the input threshold (0.6V). Resistors R1 and R2 can have very high values to minimize current consumption due to low-leakage currents. Set R 2 to some conveniently high value (10kΩ, for example) and calculate R1 based on the desired reset threshold voltage, using the following formula: R1 = R2 x (VIN_TH/VTH - 1) Threshold Logic Inputs (TH0–TH4) The TH0–TH4 logic inputs select the undervoltage thresholds and tolerance of the IN1–IN6 voltage-detector inputs. TH0–TH4 define 32 unique options for the supervisor functionality. Connect the respective TH_ to GND for a logic 0 or to DBP for a logic 1. Tables 1 and 2 show the 32 unique threshold options available. TH4 sets the threshold tolerance of the undervoltage threshold. A logic 1 selects a 5% supply tolerance and a logic 0 selects a 10% supply tolerance. The MAX6886 logic determines which thresholds should be used for VIN MAX6886 R1 IN_ R2 0.6V Figure 1. Adjusting the Monitored Threshold _______________________________________________________________________________________ Pin-Selectable, Hex Power-Supply Supervisory Circuit Manual Reset (MR) Many microprocessor-based (µP) products require manual reset capability to allow an operator or external logic circuitry to initiate a reset. The manual reset input (MR) can be connected directly to a switch without an external pullup resistor or debouncing network. MR is internally pulled up to DBP. Leave unconnected if not used. MR is internally pulled up to DBP through a 10µA current source. MR is designed to reject fast, falling transients (typically 100ns pulses) and must be held low for a minimum of 1µs to assert RESET. After MR transitions from low to high, RESET remains asserted for the duration of its timeout period. Table 1. Nominal Monitored Supply Voltages SELECTION TH4–TH0* 1 11111 NOMINAL SUPPLY VOLTAGES (V) IN1 IN2 IN3 IN4 IN5 IN6 SUPPLY TOLERANCE (%) 5.0 3.3 2.5 1.8 ADJ ADJ 5 2 11110 5.0 3.0 2.5 1.8 ADJ ADJ 5 3 11101 5.0 3.3 2.5 ADJ ADJ ADJ 5 4 11100 5.0 3.0 2.5 ADJ ADJ ADJ 5 5 11011 5.0 3.3 1.8 ADJ ADJ ADJ 5 6 11010 5.0 3.0 1.8 ADJ ADJ ADJ 5 7 11001 5.0 3.3 ADJ ADJ ADJ ADJ 5 8 11000 5.0 3.0 ADJ ADJ ADJ ADJ 5 9 10111 3.3 2.5 1.8 ADJ ADJ ADJ 5 10 10110 3.0 2.5 1.8 ADJ ADJ ADJ 5 11 10101 3.3 2.5 ADJ ADJ ADJ ADJ 5 12 10100 3.0 2.5 ADJ ADJ ADJ ADJ 5 13 10011 3.3 1.8 ADJ ADJ ADJ ADJ 5 14 10010 3.0 1.8 ADJ ADJ ADJ ADJ 5 15 10001 3.3 2.5 1.8 1.5 ADJ ADJ 5 16 10000 3.0 2.5 1.8 1.5 ADJ ADJ 5 17 01111 5.0 3.3 2.5 1.8 ADJ ADJ 10 18 01110 5.0 3.0 2.5 1.8 ADJ ADJ 10 19 01101 5.0 3.3 2.5 ADJ ADJ ADJ 10 20 01100 5.0 3.0 2.5 ADJ ADJ ADJ 10 21 01011 5.0 3.3 1.8 ADJ ADJ ADJ 10 22 01010 5.0 3.0 1.8 ADJ ADJ ADJ 10 23 01001 5.0 3.3 ADJ ADJ ADJ ADJ 10 24 01000 5.0 3.0 ADJ ADJ ADJ ADJ 10 25 00111 3.3 2.5 1.8 ADJ ADJ ADJ 10 26 00110 3.0 2.5 1.8 ADJ ADJ ADJ 10 27 00101 3.3 2.5 ADJ ADJ ADJ ADJ 10 28 00100 3.0 2.5 ADJ ADJ ADJ ADJ 10 29 00011 3.3 1.8 ADJ ADJ ADJ ADJ 10 30 00010 3.0 1.8 ADJ ADJ ADJ ADJ 10 31 00001 3.3 2.5 1.8 1.5 ADJ ADJ 10 32 00000 ADJ ADJ ADJ ADJ ADJ ADJ — _______________________________________________________________________________________ 9 MAX6886 the IN inputs only at power-up. Use the voltage-divider circuit of Figure 1 and Equation 1 to set the threshold for the user-adjustable inputs as described in the Voltage-Detector Inputs (IN_) section. MAX6886 Pin-Selectable, Hex Power-Supply Supervisory Circuit Table 2. Threshold Options SELECTION TH4–TH0* 1 2 THRESHOLD VOLTAGES (V) IN1 IN2 IN3 IN4 IN5 IN6 11111 4.62 3.06 2.31 1.67 0.60 0.60 11110 4.62 2.78 2.31 1.67 0.60 0.60 3 11101 4.62 3.06 2.31 0.60 0.60 0.60 4 11100 4.62 2.78 2.31 0.60 0.60 0.60 5 11011 4.62 3.06 1.67 0.60 0.60 0.60 6 11010 4.62 2.78 1.67 0.60 0.60 0.60 7 11001 4.62 3.06 0.60 0.60 0.60 0.60 8 11000 4.62 2.78 0.60 0.60 0.60 0.60 9 10111 3.06 2.31 1.67 0.60 0.60 0.60 10 10110 2.78 2.31 1.67 0.60 0.60 0.60 11 10101 3.06 2.31 0.60 0.60 0.60 0.60 12 10100 2.78 2.31 0.60 0.60 0.60 0.60 13 10011 3.06 1.67 0.60 0.60 0.60 0.60 14 10010 2.78 1.67 0.60 0.60 0.60 0.60 15 10001 3.06 2.31 1.67 1.39 0.60 0.60 16 10000 2.78 2.31 1.67 1.39 0.60 0.60 17 01111 4.38 2.88 2.19 1.58 0.60 0.60 18 01110 4.38 2.62 2.19 1.58 0.60 0.60 19 01101 4.38 2.88 2.19 0.60 0.60 0.60 20 01100 4.38 2.62 2.19 0.60 0.60 0.60 21 01011 4.38 2.88 1.58 0.60 0.60 0.60 22 01010 4.38 2.62 1.58 0.60 0.60 0.60 23 01001 4.38 2.88 0.60 0.60 0.60 0.60 24 01000 4.38 2.62 0.60 0.60 0.60 0.60 25 00111 2.88 2.19 1.58 0.60 0.60 0.60 26 00110 2.62 2.19 1.58 0.60 0.60 0.60 27 00101 2.88 2.19 0.60 0.60 0.60 0.60 28 00100 2.62 2.19 0.60 0.60 0.60 0.60 29 00011 2.88 1.58 0.60 0.60 0.60 0.60 30 00010 2.62 1.58 0.60 0.60 0.60 0.60 31 00001 2.88 2.19 1.58 1.31 0.60 0.60 32 00000 0.60 0.60 0.60 0.60 0.60 0.60 *TH4 = ‘1’ selects 7.5% threshold tolerance, TH4 = ‘0’ selects 12.5% threshold tolerance. Contact factory for alternative thresholds. 10 ______________________________________________________________________________________ Pin-Selectable, Hex Power-Supply Supervisory Circuit Watchdog Timer The MAX6886’s watchdog circuit monitors the µP’s activity. If the µP does not toggle the watchdog input (WDI) within the watchdog timeout period, RESET asserts. The internal watchdog timer is cleared by a reset, or by a transition at WDI (which can detect pulses as short as 50ns.) The watchdog timer remains cleared while RESET is asserted. The timer starts counting as soon as RESET goes high (see Figure 2). The MAX6886 features two modes of watchdog timer operation: normal and initial modes. At power-up, after a reset event, or after the watchdog timer expires, the initial watchdog timeout is active (tWDI). After the first transition on WDI, the normal watchdog timeout is active (tWD). The initial and normal watchdog timeouts are determined by the value of the capacitor connected between SWT and ground. The initial watchdog timeout is approximately 64 times the normal watchdog timeout. Connect a capacitor from SWT to GND to determine the normal watchdog timeout period according to the following equation: CSWT = t WD 4.348 x 106 where tWD is in seconds and CSWT is in Farads. As an example, a 1µF capacitor gives a normal timeout period of 4.68s and an initial watchdog timeout period of approximately 4.5 minutes. Connect SWT to VCC to use the factory-default watchdog normal and initial timeouts of 1.6s and 102.4s, respectively. Choose a low-leakage capacitor for C SWT. Disable the watchdog timer by connecting SWT to GND. WDI is internally pulled down to GND through a 10µA current sink. RESET Output The reset output is typically connected to the reset input of a µP. A µP’s reset input starts or restarts the µP in a known state. RESET goes low whenever one or more input voltage (IN1–IN6) monitors drop below their respective thresholds, when MR is pulled low for a minimum of 1µs, or when the watchdog timer expires. RESET remains low for its reset timeout period (tRP) after all assertion-causing conditions have been cleared (see Figure 2). 2.5V VCC OR IN1–IN4 RESET WDI tD-PO tRP *tWDI tWD tRP *tWDI *tWDI IS THE INITIAL WATCHDOG TIMER PERIOD. Figure 2. Watchdog, Reset, and Power-Up Timing Diagram ______________________________________________________________________________________ 11 MAX6886 Margin Output Disable (MARGIN) MARGIN allows system-level testing while power supplies exceed the normal operating ranges. Drive MARGIN low to hold RESET in its existing state while system-level testing occurs. Leave MARGIN unconnected or connect to DBP if unused. An internal 10µA current source pulls MARGIN to DBP. MARGIN overrides MR if both are asserted at the same time. Set the RESET time delay by connecting a capacitor from SRT to GND using the following equation: t WD CSRT = 4.348 x 106 where tRP is in seconds and CSRT is in Farads. Connect SRT to VCC for a factory-default reset timeout of 200ms. RESET is open-drain and requires an external pullup resistor. RESET remains low for 1V ≤ VCC ≤ 2.5V. Applications Information Layout and Bypassing For better noise immunity, bypass each of the voltagedetector inputs to GND with 0.1µF capacitors installed as close to the device as possible. Bypass VCC and DBP to GND with 1µF capacitors installed as close to the device as possible. Pin Configuration Chip Information PROCESS: BiCMOS IN2 IN3 IN4 IN5 + IN1 TOP VIEW 20 19 18 17 16 RESET 1 15 IN6 SRT 2 14 DBP SWT 3 13 VCC GND 4 12 TH0 WDI 5 11 TH1 MAX6886 6 7 8 9 10 PACKAGE TYPE MARGIN TH4 TH3 TH2 *EXPOSED PAD Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. MR MAX6886 Pin-Selectable, Hex Power-Supply Supervisory Circuit 20 TQFN-EP PACKAGE CODE OUTLINE NO. LAND PATTERN NO. T2055+5 21-0140 90-0010 TQFN *EXPOSED PAD CONNECTED TO GND. 12 ______________________________________________________________________________________ Pin-Selectable, Hex Power-Supply Supervisory Circuit REVISION NUMBER REVISION DATE 0 2/05 Initial release — 1 1/12 Updated Table 2. 10 DESCRIPTION PAGES CHANGED Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 13 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. MAX6886 Revision History