RF2705G RF2705GLow Noise, MultiMode, QuadBand, Quadrature Modulator and PA Driver LOW NOISE, MULTI-MODE, QUAD-BAND, QUADRATURE MODULATOR AND PA DRIVER Features W-CDMA High/Mid/Low Power Modes Quad-Band Direct Quadrature Modulator Variable Gain PA Drivers GMSK Bypass Amplifiers LO Frequency Doubler and Divider Baseband Filtering EDGE/GSM (GSM850/900) Handsets EDGE/GSM (DCS/PCS) Handsets W-CDMA Handsets/Data Cards W-CDMA/GSM/EDGE Multimode Handsets and Data Cards 18 RF OUT WB P 17 RF OUT WB N 16 RF OUT HB P 15 RF OUT HB N 14 RF OUT LB P 13 RF OUT LB N I SIG N I SIG P VCC1 MODE A GND Note: The die flag is the chip's main ground. LO HB P 2 LO HB N 3 DIV 2 +45° Flo x2 +45° -45° -45° Σ LO LB P 4 LO LB N 5 Mode Control and Biasing Power Control MODE C 6 Applications 19 7 8 9 10 11 12 GC 20 GC DEC 21 VREF 22 Q SIG P 23 Q SIG N 24 VCC2 1 MODE D MODE B RoHS Compliant & Pb-Free Product Package Style: QFN, 24-Pin, 4x4 Functional Block Diagram Product Description The RF2705 is a low noise, multi-mode, quad-band direct I/Q to RF modulator and PA driver designed for handset applications where multiple modes of operation are required. Frequency doublers, dividers and LO buffers are included to support a variety of LO generation options. Dynamic power control is supported through a single analog input giving 90dB of power control range for the W-CDMA mode and 40dB of power control in the other two modes. Three sets of RF outputs are provided: high band and low band low noise EDGE/GMSK outputs, as well as one wideband W-CDMA output. The device is designed for 2.7V to 3.3V operation, and is assembled in a plastic, 24-pin, 4mmx4mm QFN. Ordering Information RF2705G Low Noise, Multi-Mode, Quad-Band, Quadrature Modulator and PA Driver RF2705GPCBA-41X Fully Assembled Evaluation Board Optimum Technology Matching® Applied GaAs HBT GaAs MESFET InGaP HBT 9SiGe BiCMOS Si BiCMOS SiGe HBT GaAs pHEMT Si CMOS Si BJT GaN HEMT RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc. Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 1 of 26 RF2705G Absolute Maximum Ratings Parameter Rating Supply Voltage Unit -0.5 to 3.6 V Storage Temperature -40 to +150 °C Operating Ambient Temperature -40 to +85 °C Input Voltage, any pin -0.5 to +3.6 V +5 dBm Input Power, any pin Caution! ESD sensitive device. Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice. Specification Unit Min. Typ. Max. Output Performance with Modulated Baseband Inputs Low Band EDGE 8PSK Mode (GSM850/GSM900) Mode=Low Band FLOx1 (see Control Logic Truth Table for Mode Control Settings) Parameter Output Power Condition VCC =2.7V, T=+25°C Maximum Output Power with 8PSK Modulated Signal* Maximum VGC 0 +2.5 Minimum VGC -39 Gain Range 42 -37 dBm While meeting spectral mask dBm While meeting spectral mask dB Difference between output power at GC=2.0V and GC=0.2V. Out-of-Band Emission Spectrum Emission Mask* Frequency Spacing 200kHz -36 TBD dBc 30kHz BW 250kHz -43 TBD dBc 30kHz BW 400kHz -67 TBD dBc 30kHz BW 600kHz to 1800kHz -73 dBc 30kHz BW 1800kHz to 3000kHz -73 dBc 100kHz BW 3000kHz to 6000kHz -73 dBc 100kHz BW >6000kHz -75 dBc 100kHz BW Error Vector Magnitude 8PSK Modulation RMS* Origin Offset* Peak* 2 3 % -40 -34 dB 4 9 % Output Noise At FC ±20MHz* Relative Noise at: Maximum Gain -156 dBc/Hz GC=2.0V, IQ=1.2VP-P 8PSK -152 dBc/Hz GC=2.0V to 1.4V Maximum Gain -156 dBm GC=2.0V, IQ=0VP-P All Gain Settings -154 dBm IQ=1.2VP-P 8PSK Absolute Noise at: 2 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Parameter Min. Specification Typ. Max. Unit Condition General Conditions Local Oscillator LO LB Input Frequency 824 915 RF LB Output Frequency 824 915 MHz Input Power -6.0 +3.0 dBm 0.0 MHz IQ Baseband Inputs 8PSK IQ Level 1.2 IQ Common Mode Input Bandwidth 0.7 Baseband Filter Attenuation 20 VP-P 1.2 V 1.0 MHz dB Input IQ signal driven differentially and in quadrature. At 20MHz offset Output Performance with Modulated Baseband Inputs High Band EDGE 8PSK Mode (DCS1800/PCS1900) Mode=High Band FLOx1 (see Control Logic Truth Table for Mode Control Settings) Output Power VCC =2.7V, T=+25°C Maximum Output Power with 8PSK Modulated Signal* Maximum VGC -1 +1.5 Minimum VGC -40 Gain Range 42 -38 dBm While meeting spectral mask dBm While meeting spectral mask dB Difference between output power at GC=2.0V and GC=0.2V. Out-of-Band Emission Spectrum Emission Mask* Frequency Spacing 200kHz -36 TBD dBc 30kHz BW 250kHz -43 TBD dBc 30kHz BW TBD 400kHz -67 dBc 30kHz BW 600kHz to 1800kHz -73 dBc 30kHz BW 1800kHz to 3000kHz -73 dBc 100kHz BW 3000kHz to 6000kHz -73 dBc 100kHz BW >6000kHz -75 dBc 100kHz BW Error Vector Magnitude 8PSK Modulation RMS* 1.3 3 % Origin Offset* -37 -30 dB 3 11 % Peak* Output Noise At FC ±20MHz* Relative Noise at: Maximum Gain -154 dBc/Hz GC=2.0V, IQ=1.2VP-P 8PSK -150 dBc/Hz GC=2.0V to 1.4V Maximum Gain -153 dBm GC=2.0V, IQ=0VP-P All Gain Settings -151 dBm IQ=1.2VP-P 8PSK Absolute Noise at: * Not tested in Production Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 3 of 26 RF2705G Parameter Min. Specification Typ. Max. Unit Condition General Conditions Local Oscillator LO HB Input Frequency 1710 1910 RF HB Output Frequency 1710 1910 MHz Input Power -6.0 +3.0 dBm 0.0 MHz IQ Baseband Inputs 8PSK IQ Level 1.2 IQ Common Mode Input Bandwidth 0.7 Baseband Filter Attenuation 20 VP-P 1.2 V 1.0 MHz dB Input IQ signal driven differentially and in quadrature. At 20MHz offset Output Performance with Modulated Baseband Inputs W-CDMA Mode Mode=Wideband FLOx2 (see Control Logic Truth Table for Mode Control Settings) VCC =2.7V, T=+25°C, while meeting 48dBc ALCR Output Power Maximum Output Power with W-CDMA Modulated Signal* High Power Mode 3 6 dBm GC=2.0V Medium Power Mode -4 -1 dBm GC=1.5V Difference between output power at GC=2.0V and GC=0.2V. Gain Range High Power Mode 90 dB Gain step when switching between power modes in either direction. Gain Step High Power to Medium Power ±0.5 dB GC=1.4V Medium Power to Low Power TBD dB GC=TBD ±5MHz 50 dBc 3.84MHz relative to channel power ±10MHz 65 dBc 3.84MHz relative to channel power 1.4 %rms Out-of-Band Emission Adjacent Channel Leakage Power Ratio (ALCR)* Channel Spacing Error Vector Magnitude RMS* 3GPP W-CDMA Output Noise At FC ±40MHz* -152 -146 dBc/Hz GC=2.0V -146 dBc/Hz GC=2.0V to 1.5V * Not tested in Production 4 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Parameter Min. Specification Typ. Max. Unit Condition General Conditions Local Oscillator LO LB Input Frequency 960 990 RF WB Output Frequency 1920 1980 MHz Input Power -10.0 +3.0 dBm 0.0 MHz IQ Baseband Inputs 3GPP W-CDMA HQPSK, 1DPCCH+1DPDCH IQ Level 0.8 IQ Common Mode Input Bandwidth 8 Baseband Filter Attenuation 10 VP-P 1.2 V 11 MHz dB Input IQ signal driven differentially and in quadrature. At 40MHz offset Output Performance with CW Baseband Inputs Wideband Mode Mode=Wideband FLOx2 (see Control Logic Truth Table for Mode Control Settings) VCC =2.7V, T=+25°C, LO=975MHz to 990MHz at -10dBm, IQ=540mVP-P** at 100kHz, unless otherwise noted VGA and PA Driver Output Power W-CDMA Modulated* Output Power CW Gain Control Voltage Range 5 2 5 0.2 dBm GC=2.0V, IQ=0.8VP-P at HQPSK 8 dBm GC=2.0V 2.0 V Gain Control Range 92 dB Gain Control Slope 73 dB/V Calculated between GC=1.0V and 0.5V Sideband Suppression -48 -30 dBc GC=2.0V, No I/Q adjustment * -50 -30 dBc GC=1.5V, No I/Q adjustment * -50 -30 dBc GC=1.0V, No I/Q adjustment * -50 -30 dBc GC=0.5V, No I/Q adjustment Carrier Suppression -42 -30 dBc GC=2.0V, No I/Q adjustment -41 -30 dBc GC=1.5V, No I/Q adjustment -38 -30 dBc GC=1.0V, No I/Q adjustment -23 -10 dBc GC=0.5V, No I/Q adjustment -55 -50 dBc GC=2.0V Difference between output power at GC=2.0V and GC=0.2V Modulator 3rd Harmonic of Modulation Suppression at FC-3x300kHz Spurious Outputs Spurious Output at Integer Multiples of FLO LB* GC=2.0V, I/Q=540mVP-P at 100kHz FLO LB -60.0 4xFLO LB -14.0 0 dBm Second harmonic of carrier 6xFLO LB -47.0 0 dBm Third harmonic of carrier dBm FLO LB leakage * Not tested in Production Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 5 of 26 RF2705G Parameter Min. Specification Typ. Max. Unit Condition Output Compression Output P1dB* +11.5 dBm I/Q=100kHz Output IP3* +20 dBm GC=2.0V. Extrapolated from IM3 with two baseband tones at 90kHz and 110kHz applied differentially, in quadrature, at both I and Q inputs, each tone 400mVP-P. Intermodulation IM3 tone at FC +70kHz and FC +130kHz relative to tones at FC +90kHz and FC +110kHz -37 dBc GC=2.0V -40 dBc GC=1.5V Intermodulation Output Performance with CW Baseband Inputs Low Band Mode (GSM850/GSM900) Mode=Low Band FLOx1 (see Control Logic Truth Table for Mode Control Settings) VCC =2.7V, T=+25°C, LO=824MHz to 915MHz at 0dBm, IQ=800mVP-P** at 100kHz, unless otherwise noted VGA and PA Driver Output Power 8PSK Modulated* Output Power CW +2.5 0 * dBm GC=2.0V, IQ=1.2VP-P 8PSK dBm GC=2.0V, IQ=800mVP-P at 100kHz -1.2 dBm GC=1.5V, IQ=800mVP-P at 100kHz -13.5 dBm GC=1.0V, IQ=800mVP-P at 100kHz 2.2 +5 -30 -44 Gain Control Voltage Range -40 0.2 -37 2.0 dBm GC=0.5V, IQ=800mVP-P at 100kHz dBm GC=0.2V, IQ=800mVP-P at 100kHz V Gain Control Range 42 dB Gain Control Slope 28 dB/V Calculated between GC=0.5V and 1.5V Sideband Suppression -36 -30 dBc GC=2.0V, No I/Q adjustment * -36 -30 dBc GC=1.5V, No I/Q adjustment * -36 -30 dBc GC=1.0V, No I/Q adjustment * -36 -30 dBc GC=0.5V, No I/Q adjustment * -36 -30 dBc GC=0.2V, No I/Q adjustment Carrier Suppression -44 -34 dBc GC=2.0V, No I/Q adjustment -44 -34 dBc GC=1.5V, No I/Q adjustment -44 -34 dBc GC=1.0V, No I/Q adjustment -44 -34 dBc GC=0.5V, No I/Q adjustment -40 -34 dBc GC=0.2V, No I/Q adjustment -49 -40 dBc GC=2.0V Difference between output power at GC=2.0V and GC=0.2V Modulator * 3rd Harmonic of Modulation Suppression at FC-3x300kHz * Not tested in Production ** Provides the same output power as modulated signal with associated crest factor. 6 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Parameter Min. Specification Typ. Max. Unit Condition Spurious Outputs FLO/2 Mode Spurious Outputs at Integer Harmonics of 1/2xFLOHB* GC=2.0V, I/Q=800mVP-P at 100kHz FLO HB -62.0 dBm Second harmonic of carrier and LO leakage (3/2)xFLO LB -19.0 dBm Third harmonic of carrier +7.0 dBm I/Q=100kHz Output Compression Output P1dB* Output Performance with CW Baseband Inputs Low Band Mode (GSM850/GSM900), cont’d Mode=Low Band FLOx1 (see Control Logic Truth Table for Mode Control Settings) Intermodulation Output IP3* Intermodulation IM3 tone at FC +70kHz and FC +130kHz relative to tones at FC +90kHz and FC +110kHz +20.0 dBm GC=2.0V. Extrapolated from IM3 with two baseband tones at 90kHz and 110kHz applied differentially, in quadrature, at both I and Q inputs, each tone 400mVP-P. -48 dBc GC=2.0V Low Band Bypass Mode (GSM850/GSM900) Mode=Low Band Bypass (see Control Logic Truth Table for Mode Control Settings) PA Driver VCC =2.7V GMSK Input Power* -3 0 +3 dBm At LO LB input from a 50Ω source. GMSK Output Power 5.0 7.5 10.0 dBm At RF LB output Output Impedance* Ω 50 Output Noise At FC ±20MHz* -161 -159 dBc/Hz AM+PM noise, LO=0dBm * Not tested in Production ** Provides the same output power as modulated signal with associated crest factor. Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 7 of 26 RF2705G Specification Unit Min. Typ. Max. Output Performance with CW Baseband Inputs High Band Mode (DCS1800/PCS1900) Mode=High Band FLOx1 (see Control Logic Truth Table for Mode Control Settings) Parameter Condition VCC =2.7V, T=+25°C, LO=1710MHz to 1910MHz at 0dBm, IQ=800mVP-P** at 100kHz, unless otherwise noted VGA and PA Driver Output Power 8PSK Modulated* 0 2.2 Output Power CW 0 2 * dBm GC=2.0V, IQ=1.2VP-P 8PSK dBm GC=2.0V, IQ=800mVP-P at 100kHz -1.6 dBm GC=1.5V, IQ=800mVP-P at 100kHz -17.6 dBm GC=1.0V, IQ=800mVP-P at 100kHz +6.0 -30 -44 Gain Control Voltage Range -40 0.2 -37 2.0 dBm GC=0.5V, IQ=800mVP-P at 100kHz dBm GC=0.2V, IQ=800mVP-P at 100kHz V Gain Control Range 42 dB Gain Control Slope 28 dB/V Calculated between GC=0.5V and 1.5V Sideband Suppression -45 -30 dBc GC=2.0V, No I/Q adjustment * -45 -30 dBc GC=1.5V, No I/Q adjustment * -45 -30 dBc GC=1.0V, No I/Q adjustment * -45 -30 dBc GC=0.5V, No I/Q adjustment * -45 -30 dBc GC=0.2V, No I/Q adjustment Carrier Suppression -40 -34 dBc GC=2.0V, No I/Q adjustment -40 -34 dBc GC=1.5V, No I/Q adjustment -40 -33 dBc GC=1.0V, No I/Q adjustment -39 -30 dBc GC=0.5V, No I/Q adjustment -37 -30 dBc GC=0.2V, No I/Q adjustment -50 -40 dBc GC=2.0V Difference between output power at GC=2.0V and GC=0.2V Modulator * 3rd Harmonic of Modulation Suppression at FC-3x300kHz Spurious Outputs FLOx2 Mode Spurious Outputs at Integer Harmonics of 1/2xFLOHB GC=2.0V, I/Q=800mVP-P at 100kHz FLO LB -70.0 dBm FLO LB leakage 4xFLO LB -25.0 dBm Second harmonic of carrier 6xFLO LB -40.0 dBm Third harmonic of carrier +8.0 dBm I/Q=100kHz Output Compression Output P1dB* * Not tested in Production ** Provides the same output power as modulated signal with associated crest factor. 8 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Specification Unit Min. Typ. Max. Output Performance with CW Baseband Inputs High Band Mode (DCS1800/PCS1900), cont’d Mode=High Band FLOx1 (see Control Logic Truth Table for Mode Control Settings) Parameter Condition Intermodulation Output IP3* +20 Intermodulation IM3 tone at FC +70kHz and FC +130kHz relative to tones at FC +90kHz and FC +110kHz -53 -42 dBm GC=2.0V. Extrapolated from IM3 with two baseband tones at 90kHz and 110kHz applied differentially, in quadrature, at both I and Q inputs, each tone 400mVP-P. dBc GC=2.0V Output Performance with CW Baseband Inputs Wideband Mode Mode=Wideband FLOx2 (see Control Logic Truth Table for Mode Control Settings) VCC =2.7V, T=+25°C, LO=975MHz to 990MHz at -10dBm, IQ=540mVP-P** at 100kHz, unless otherwise noted VGA and PA Driver Output Power W-CDMA Modulated* Output Power CW Gain Control Voltage Range 5 2 5 0.2 dBm GC=2.0V, IQ=0.8VP-P at HQPSK 8 dBm GC=2.0V 2.0 V Gain Control Range 92 dB Gain Control Slope 73 dB/V Calculated between GC=1.0V and 0.5V Sideband Suppression -48 -30 dBc GC=2.0V, No I/Q adjustment * -50 -30 dBc GC=1.5V, No I/Q adjustment * -50 -30 dBc GC=1.0V, No I/Q adjustment * -50 -30 dBc GC=0.5V, No I/Q adjustment Carrier Suppression -42 -30 dBc GC=2.0V, No I/Q adjustment -41 -30 dBc GC=1.5V, No I/Q adjustment -38 -30 dBc GC=1.0V, No I/Q adjustment Difference between output power at GC=2.0V and GC=0.2V Modulator 3rd Harmonic of Modulation Suppression at FC-3x300kHz -23 -10 dBc GC=0.5V, No I/Q adjustment -55 -50 dBc GC=2.0V Spurious Outputs Spurious Output at Integer Multiples of FLO LB* GC=2.0V, I/Q=540mVP-P at 100kHz FLO LB -60.0 dBm FLO LB leakage 4xFLO LB -14.0 0 dBm Second harmonic of carrier 6xFLO LB -47.0 0 dBm Third harmonic of carrier dBm I/Q=100kHz Output Compression Output P1dB* Rev A0 DS060206 +11.5 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 9 of 26 RF2705G Parameter Min. Specification Typ. Max. Unit Condition Intermodulation Output IP3* +20 dBm GC=2.0V. Extrapolated from IM3 with two baseband tones at 90kHz and 110kHz applied differentially, in quadrature, at both I and Q inputs, each tone 400mVP-P. Intermodulation IM3 tone at FC +70kHz and FC +130kHz relative to tones at FC +90kHz and FC +110kHz -37 dBc GC=2.0V -40 dBc GC=1.5V High Band Bypass Mode (DCS1800/PCS1900) Mode=High Band Bypass (see Control Logic Truth Table for Mode Control Settings) PA Driver VCC =2.7V GMSK Input Power* -3 0 +3 dBm At LO LB input from a 50Ω source. GMSK Output Power 4.0 6.8 9.0 dBm At RF LB output Output Impedance* Ω 50 Output Noise At FC ±20MHz* -161 -159 dBc/Hz AM+PM noise, LO=0dBm * Not tested in Production ** Provides the same output power as modulated signal with associated crest factor. 10 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Parameter Min. Specification Typ. Max. Unit Condition General Specifications Operating Range Supply Voltage 2.7 3.3 V Temperature -40 +85 °C Refer to Logic Control Truth Table for Mode Control Pin Voltages. Current Consumption μA Sleep <1 Wideband FLOx1 (high power) 114 mA GC=2.0V 10 * 85 mA GC=0.2V (medium power) 89 mA GC=2.0V * 54 mA GC=0.2V (low power) 63 mA GC=2.0V. See Note 1. * 42 mA GC=0.2V. See Note 1. Wideband FLOx2 (high power) 110 mA GC=2.0V 84 mA GC=0.2V 80 mA GC=2.0V 53 mA GC=0.2V 54 mA GC=2.0V. See Note 1. 41 mA GC=0.2V. See Note 1. High Band FLOx2 72 mA GC=2.0V GC=2.0V (medium power) (low power) Low Band FLO/2 82 mA High Band Bypass 23 mA Low Band Bypass 22 mA High Band FLOx1 76 mA GC=2.0V Low Band FLOx1 74 mA GC=2.0V Logic Levels Input Logic 0 0 0.4 V Input Logic 1 1.4 VCC V Logic Pins Input Current μA <1.0 CMOS inputs LO Input Ports LO LB Input Frequency Range 800 1000 MHz LO HB Input Frequency Range 1600 2000 MHz Input Impedance Rev A0 DS060206 50 Ω Externally matched 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 11 of 26 RF2705G Parameter Min. Specification Typ. Max. Unit Condition I/Q Baseband Inputs Baseband Input Voltage 1.15 1.25 V Common mode voltage Baseband Input Level EDGE 1.2 VP-P Differential W-CDMA 0.8 VP-P 1DPCCH+1DPDCH. See Note 1. GMSK 1.0 Baseband Input Impedance VP-P 100k||1pF Ω Differential Measured at 100kHz Input Bandwidth EDGE 0.7 1.0 MHz W-CDMA 8.0 11.0 MHz Baseband Filter Attenuation EDGE 20 dB At 20MHz W-CDMA 10 dB At 40MHz Baseband Input DC Current -10 0 10 μA 2.2 V Gain Control Gain Control Voltage Gain Control Impedance 0.2 10 kΩ Note 1: In low power mode it is recommended that the IQ level be reduced to 0.4VP-P. If IQ level is >0.4VP-P, this mode should be used for WCDMA TX power levels below -20dBm (measured at antenna). 12 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Pin 1 Function VCC2 Description Interface Schematic Supply for LO buffers, frequency doubler and dividers. VCC2 Modulator and VGA 2 3 LO HB P LO HB N Rev A0 DS060206 High band local oscillator input (1800MHz). In “low band FLO/2” modes the signal (LOHBP-LOHBN) undergoes a frequency division of 2 to provide the low band LO signal for the modulator. In “high band FLOx1” modes the signal (LOHBP-LOHBN) is used as the high band LO signal for the modulator. In “high band bypass” a modulated DCS1800/PCS1900 signal (LOHBPLOHBN) is switched into the RF signal path. The modulator is disabled and the signal is routed to the RFOutHb outputs through a differential PA driver amplifier. The LOHBP input is AC-coupled internally. The noise performance, carrier suppression at low output powers and sideband suppression all vary with LO power. The optimum LO power is between -3dBm and +3dBm. The device will work with LO powers as low as -20dBm however this is at the expense of higher phase noise in the LO circuitry and poorer sideband suppression. The input impedance should be externally matched to 50Ω. The port can be driven either differentially or single ended. The port impedance does not vary significantly between active and power down modes. The RF2705 is intended for use with the RF6002. This performs the GSM GMSK modulation within a Frac-N synthesizer loop. The 8PSK EDGE and W-CDMA signal modulations are performed in the RF2705 and uses the RF6002’s synthesizers to generate the LO signals. The LO signal for EDGE900 mode is derived by frequency division by 2 of the RF6002’s DCS1800 VCO. This helps protect the system against PA pulling. The complementary LO input for both LOHBP LO signals. In any of the modes the LOHB input may be driven either single ended or differentially. If the LO is driven single ended then the PCB board designer can ground this pin. It is recommended that if this pin is grounded that it is kept isolated from the GND1 pin and the die flag ground. All connections to any other ground should be made through a ground plane. Poor routing of this ground signal can significantly degrade the LO leakage performance. VCC LO HB P LO HB N See pin 2. 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 13 of 26 RF2705G Pin 4 Function LO LB P 5 LO LB N 6 MODE C 7 MODE D 14 of 26 Description Low band local oscillator input (900MHz). In “wideband FLOx2” and “high band FLOx2” modes the signal (LOLBPLOLBN) is doubled in frequency to provide the LO signal for the modulator. In “Low band FLOx1” modes the signal (LOLBP-LOLBN) is used as the LO signal for the modulator. In “Low band Bypass” a modulated GSM900 signal (LOLBP-LOLBN) is switched into the RF signal path. The modulator is disabled and the signal is routed to the RFOutLb outputs through a differential PA driver amplifier. This LOLBP input is AC-coupled internally. The noise performance, carrier suppression at low output powers and sideband suppression performance are functions of LO power. The optimum LO power is between -3dBm and +3dBm. The device will work with LO powers as low as -20dBm however this is at the expense of higher noise performance at high output powers and poorer sideband suppression. The input impedance should be externally matched to 50Ω. The port impedance does not vary significantly between active and powered modes. The RF2705 is intended for use with the RF6002 which performs the GSM GMSK modulation within a Frac-N synthesizer loop. The 8PSK EDGE and W-CDMA signal modulations are performed in the RF2705 and uses the RF6002’s synthesizers to generate the LO signals. The LO signal for DCS1800 mode is derived by frequency doubling RF6002’s GSM900 VCO. This helps protect the system against PA pulling. Interface Schematic VCC LO LB P LO LB N The complementary LO input for both LOLBP LO signals. In any of the modes the LOLB input may be driven either single ended or differentially. If the LO is driven single ended then the PCB board designer can ground this pin. It is recommended that if this pin is grounded that it is kept isolated from the GND1 pin and the die flag ground. All connections to any other ground should be made through a ground plane. Poor routing of this GndLO signal can significantly degrade the LO leakage performance. Chip enable control pin. See the Logic Truth table. CMOS Logic inputs: Logic 0=0V to 0.4V; Logic 1=1.4V to VCC. See pin 4. Mode control pin. See the Logic Truth table. CMOS Logic inputs: Logic 0=0V to 0.4V; Logic 1=1.4V to VCC. See pin 6. VCC2 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Pin 8 9 10 11 12 Function Q SIG N Q SIG P VREF GC DEC GC Description Quadrature Q channel negative baseband input port. Best performance is achieved when the QSIGP and QSIGN are driven differentially with a 1.2V common mode DC voltage. The recommended differential drive level (VQSIGP -VQSIGN) is 1.2VP-P for EDGE, 0.8VP-P for WCDMA modulation and 1.0VP-P for GMSK modulation. This input should be DC-biased at 1.2V. In sleep mode an internal FET switch is opened, the input goes high impedance and the modulator is debiased. Phase or amplitude errors between the QSIGP and QSIGN signals will result in a common-mode signal which may result in an increase in the even order distortion of the modulation in the output spectrum. DC offsets between the QSIGP and QSIGN signals will result in increased carrier leakage. Small DC offsets may be deliberately applied between the ISIGP/ISIGN and QSIGP/QSIGN inputs to cancel out the LO leakage. The optimum corrective DC offsets will change with mode, frequency and gain control. Common-mode noise on the QSIGP and QSIGN should be kept low as it may degrade the noise performance of the modulator. Phase offsets from quadrature between the I and Q baseband signals results in degraded sideband suppression. Quadrature Q channel negative baseband input port. See pin 8. Interface Schematic VCC2 x1 See pin 8. Voltage reference decouple. External 10nF decoupling capacitor to ground. The voltage on this pin is typically 1.67V when the chip is enabled. The voltage is 0V when the chip is powered down. The purpose of this decoupling capacitor is to filter out low frequency noise (20MHz) on the gain control lines. Poor positioning of the VREF decoupling capacitor can cause a degradation in LO leakage. A voltage of around 2.5V on this pin indicates that the die flag under the chip is not grounded and the chip is not biased correctly. Gain control voltage decouple with an external 1nF decoupling capacitor to ground. The voltage on this pin is a function of gain control (GC) voltage when the chip is enabled. The voltage is 0V when the chip is powered down. The purpose of this decoupling capacitor is to filter out low frequency noise (20MHz) on the gain control lines. The size capacitor on the GC DEC line will effect the settling time response to a step in gain control voltage. A 1nF capacitor equates to around 200ns settling time and a 0.5nF capacitor equates to a 100ns settling time. There is a trade-off between settling time and noise contributions by the gain control circuitry as gain control is applied. Poor positioning of the VREF decoupling capacitor can cause a degradation in LO leakage. Gain control voltage. Maximum output power at 2.0V. Minimum output power at 0V. When the chip is enabled the input impedance is 10kΩ to 1.67VDC. When the chip is powered down a FET switch is opened and the input goes high impedance. VCC2 4 kΩ + VCC2 4 kΩ + VCC2 4 kΩ 10 kΩ 1.7 V Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. + 15 of 26 RF2705G Pin 13 Function RF OUT LB N Description Interface Schematic Differential low band PA driver amplifier output. This output is intended for low band (GSM850/900) operation and drives a differential SAW. A bypass mode allows the low band PA driver amplifier’s input to be switched between the signal from the modulator and the signal applied at LOLB. This enables a GMSK-modulated signal on the LOLB input to be switched into the RF signal path. The output is an open collector. The outputs are matched off-chip. VCC VCC VCC RF OUT LB P RF OUT LB N 14 15 RF OUT LB P RF OUT HB N Complementary differential low band PA driver amplifier output. See pin 13. See pin 13. Differential high band PA Driver amplifier output. This output is intended for DCS1800/PCS1900 band operation. A bypass mode allows the high band PA driver amplifier’s input to be switched between the signal from the modulator and the signal applied at LOHB. This enables a GMSK-modulated DCS1800/PCS1900 signal on the LOHB input to be switched into the RF signal path. The output is an open collector. The outputs are matched off-chip. VCC VCC VCC RF OUT HB P RF OUT HB N 16 17 RF OUT HB P RF OUT WB N Complementary differential high band PA driver amplifier output. See pin 15. See pin 15. Differential high band PA driver amplifier output. This output is intended for wide band (W-CDMA) applications. The output is an open collector. The output are matched off-chip. VCC VCC VCC RF OUT WB P RF OUT WB N 18 19 20 RF OUT WB P GND MODE A 21 VCC1 Complementary differential wideband PA driver amplifier output. See pin 17. See pin 17. Ground. Mode control pin. See the Logic Truth table. CMOS Logic inputs: Logic 0=0V to 0.4V; Logic 1=1.4V to VCC. See pin 6. Supply for modulator, VGA and PA driver amplifiers. VCC1 LO Quadrature Generator and Buffers GND1 16 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Pin 22 Function I SIG P 23 24 I SIG N MODE B Pkg Base DIE FLAG Rev A0 DS060206 Description Interface Schematic In-phase I channel positive baseband input port. Best performance is achieved when the ISIGP and ISIGN are driven differentially with a 1.2V common mode DC voltage. The recommended differential drive level (VISIGP -VISIGN) is 1.2VP-P for EDGE, 0.8VP-P W-CDMA modulation and 1.0VP-P for GMSK modulation. This input should be DC-biased at 1.2V. In sleep mode an internal FET VCC2 switch is opened, the input goes high impedance and the modulator is debiased. Phase or amplitude errors between the ISIGP and ISIGN signals will result x1 in a common-mode signal which may result in an increase in the even order distortion of the modulation in the output spectrum. DC offsets between the ISIGP and ISIGN signals will result in increased carrier leakage. Small DC offsets may be deliberately applied between the ISIGP/ISIGN and QSIGP/QSIGN inputs to cancel out the LO leakage. The optimum corrective DC offsets will change with mode, frequency and gain control. Common-mode noise on the ISIGP and ISIGN should be kept low as it may degrade the noise performance of the modulator. Phase offsets from quadrature between the I and Q baseband signals results in degrades sideband suppression. In-phase I channel negative baseband input port. See pin 22. See pin 22. Mode control pin. See the Logic Truth table. CMOS Logic inputs: Logic 0=0V to 0.4V; Logic 1=1.4V to VCC. See pin 6. Ground for LO section, modular, biasing, variable gain amplifier, and substrate. 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 17 of 26 RF2705G LO Frequency Planning Options for European 3GPP W-CDMA/EDGE Recommended Frequency Plan: Frequency Doubler/Divide by 2/GMSK Modulator Bypass Modes Modulation Output Frequency Band LO Port LO Frequency Range Comments Format Band Lower Limit Upper Limit Lower Limit Upper Limit GSM850 824MHz 849MHz EDGE 8PSK LOHB 1648MHz 1698MHz FLO/2 Divide by 2 GSM850 824MHz 849MHz GSM GMSK LOLB 824MHz 849MHz FLO_bypass Bypass, GMSK-modulated LO GSM900 880MHz 915MHz EDGE 8PSK LOHB 1760MHz 1830MHz FLO/2 Divide by 2 GSM900 880MHz 915MHz GSM GMSK LOLB 880MHz 915MHz DCS1800 1710MHz 1785MHz EDGE 8PSK LOLB 855MHz 892.5MHz FLOx2 Frequency Doubler DCS1800 1710MHz 1785MHz GSM GMSK LOHB 1710MHz 1785MHz FLO_bypass Bypass, GMSK-modulated LO PCS1900 1850MHz 1910MHz EDGE 8PSK LOLB 925MHz 955MHz FLOx2 Frequency Doubler PCS1900 1850MHz 1910MHz GSM GMSK LOHB 1850MHz 1910MHz FLO_bypass Bypass, GMSK-modulated LO W-CDMA1950 1920MHz 1980MHz 3GPP W-CDMA LOLB 960MHz 990MHz FLOx2 Frequency Doubler LO Frequency Range Comments On Frequency LO with GMSK Modulator Bypass Modes Modulation Output Frequency Band LO Port Format Band Lower Limit Upper Limit FLO_bypass Bypass, GMSK-modulated LO Lower Limit Upper Limit GSM850 824MHz 849MHz EDGE 8PSK LOLB 824MHz 849MHz FLOx1 On Frequency GSM850 824MHz 849MHz GSM GMSK LOLB 824MHz 849MHz FLO_bypass Bypass, GMSK-modulated LO GSM900 880MHz 915MHz EDGE 8PSK LOLB 880MHz 915MHz FLOx1 On Frequency GSM900 880MHz 915MHz GSM GMSK LOLB 880MHz 915MHz FLO_bypass Bypass, GMSK-modulated LO DCS1800 1710MHz 1785MHz EDGE 8PSK LOHB 1710MHz 1785MHz FLOx1 On Frequency DCS1800 1710MHz 1785MHz GSM GMSK LOHB 1710MHz 1785MHz FLO_bypass Bypass, GMSK-modulated LO PCS1900 1850MHz 1910MHz EDGE 8PSK LOHB 1850MHz 1910MHz FLOx1 On Frequency PCS1900 1850MHz 1910MHz GSM GMSK LOHB 1850MHz 1910MHz FLO_bypass Bypass, GMSK-modulated LO W-CDMA1950 1920MHz 1980MHz 3GPP W-CDMA LOHB 1920MHz 1980MHz FLOx1 On Frequency 18 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Control Logic Truth Table Active RF I/Os Input Logic Mode Description Mode A Mode B Mode C Mode D Comment Expected Mode of Operation Sleep Mode Sleep X 0 0 0 Sleep Frequency Doubler/Divide by 2 Options Wideband FLOx2 (High Power) Modulator and frequency doubler enabled 1 0 1 0 LoLbP LoLbN RFOutWb P RFOutWb N Bands: 1920MHz to 1980MHz Modulation: 3GPP W-CDMA Wideband FLOx2 (Medium Power) Modulator and frequency doubler enabled 1 0 1 1 LoLbP LoLbN RFOutWb P RFOutWb N Bands: 1920MHz to 1980MHz Modulation: 3GPP W-CDMA Wideband FLOx2 (Low Power) Modulator and frequency doubler enabled 1 0 0 1 LoLbP LoLbN RFOutWb P RFOutWb N Bands: 1920MHz to 1980MHz Modulation: 3GPP W-CDMA High Band FLOx2 Modulator and frequency doubler enabled 1 1 1 1 LoLbP LoLbN RFOutHb P RFOutHb N Bands: DCS1800 or PCS1900 Modulation: GMSK, TDMA and 8PSK EDGE Low Band FLO/2 Modulator and divide by 2 enabled 1 1 0 1 LoHbP LoHbN Bands: GSM900 or GSM850 RFOutLb P Modulation: GMSK, TDMA and RFOutLb N 8PSK EDGE Low Band Bypass Modulator bypass enabled X 1 0 0 LoLbP LoLbN RFOutLb P RFOutLb N High Band Bypass Modulator bypass enabled X 1 1 0 LoHbP LoHbN Bands: DCS1800 or PCS1900 RFOutHb P Modulation: GMSK RFOutHb N Wideband FLOx1 (High Power) Modulator and on-frequency LO enabled 0 0 1 0 LoHbP LoHbN Bands: 1920MHz to 1980MHz RFOutWb P Modulation: 3GPP W-CDMA RFOutWb N Wideband FLOx1 (Medium Power) Modulator and on-frequency LO enabled 0 0 1 1 LoHbP LoHbN Bands: 1920MHz to 1980MHz RFOutWb P Modulation: 3GPP W-CDMA RFOutWb N Wideband FLOx1 (Low Power) Modulator and on-frequency LO enabled 0 0 0 1 LoHbP LoHbN Bands: 1920MHz to 1980MHz RFOutWb P Modulation: 3GPP W-CDMA RFOutWb N High Band FLOx1 Modulator and on-frequency LO enabled 0 1 1 1 LoHbP LoHbN Bands: DCS1800 or PCS1900 RFOutHb P Modulation: GMSK, TDMA and RFOutHb N 8PSK EDGE Low Band FLOx1 Modulator and on-frequency LO enabled 0 1 0 1 LoLbP LoLbN RFOutLb P RFOutLb N GMSK Modulator Bypass Options Bands: GSM850 or GSM900 Modulation: GMSK On-Frequency LO Options Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Bands: GSM900 to GSM850 Modulation: GMSK, TDMA and 8PSK EDGE 19 of 26 RF2705G Package Drawing -A- 4.0 -B- 0.10 C 1.00 0.80 4.0 0.10 C B 2 PL 0.2 C 0.10 C A 2 PL Shaded area indicates pin 1. Dimensions in mm. -C- 0.55 TYP 0.35 0.50 TYP SEATING PLANE Scale: None 0.10 C A B 0.10 C 2.60 2 PL 2.40 0.203 TYP 0.05 TYP 0.00 0.08 C 0.30 TYP 0.18 0.10 M C A B 20 of 26 TYP 0.08 0.03 0.50 TYP 0.30 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Application Information The baseband inputs of the RF2705 must be driven with balanced signals. Amplitude and phase matching <0.5dB and <0.5 degrees are recommended. Phase or gain imbalances between the complementary input signals will cause additional distortion including some second order baseband distortion. The RF2705 is designed to be driven with either single-ended or differential LO signals. Driving the chip differentially is beneficial in improving the LO leakage performance. Decreasing the LO drive level will also improve LO leakage, but the output noise performance will be degraded. Driving the LO level too high will degrade linearity. The ground lines for the LO sections are brought out of the chip independently from the ground to the RF and modulator sections. This is intended to give the board design the independence of isolating the LO signals from the RF output sections. The RF2705 includes frequency doubler and divider modes that allow the LO to operate at half or twice the frequency depending on the application. This provides some flexibility in improving VCO isolation and LO leakage through frequency translation. The RF outputs use open collector architecture and may be biased at voltages higher than VCC. In practice, biasing at a higher voltage may improve the intermodulation performance. The load resistors are selected to provide sufficient output power while maintaining good linearity. The GC DEC and VREF output pins should be decoupled to ground. A 10nF capacitor on VREF and a 1nF capacitor on GC CEC are recommended. The purpose of these capacitors is to filter out low frequency noise (20MHz) in the gain control lines that may cause noise on the RF signal. The capacitor on the GC DEC line will effect the settling time of the step response in power control voltage. A 1nF capacitor equates to around a 200ns settling time; a 0.5nF capacitor equates to a 100ns settling time. There is a trade-off between setting time and phase noise as gain control is applied. As with any RF circuit, the RF2705 is sensitive to PC board layout. The suggested schematic and board layout is included as a guideline. Proper grounding of the die flag under the chip is essential in achieving acceptable RF performance. A symmetric output structure will maintain signal balance while keeping the RF lines short will reduce losses. Proper routing and bypassing of the supply lines will improve stability and performance, especially under low gain control settings where carrier suppression becomes crucial. The location and value of the bypass capacitor on pin 1 is critical in promoting good carrier suppression and is designated to resonate out the series wire bond and PC board inductance. Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 21 of 26 RF2705G Application Schematic VCC MODE A VCC 2.2 nH I SIG P 1 kΩ I SIG N 4.3 pF 4.3 pF T1 1 nF MODE B 2:1 2.2 nH 5.6 pF VCC 24 23 22 21 20 2 430 Ω 17 DIV 2 3 4.3 nH T2 +45° 16 -45° 1.6 pF Σ 2:1 LO LB Flo x2 4 RF OUT HB 1.6 pF 22.0 nH 3 pF VCC 18 Note: The die flag is the chip's main ground. LO HB 1.8 pF VCC 19 1 3.9 nH RF OUT WB 1 pF 430 Ω 15 +45° 4.3 nH VCC -45° VCC Mode Control and Biasing 5 14 Power Control 12 nH MODE C 6 13 7 8 9 10 11 12 1 kΩ MODE D Q SIG N Q SIG P 10 nF 1 nF 3.3 pF 3.3 pF T3 RF OUT LB 0.5 pF 2:1 12 nH VCC GC 22 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G Evaluation Board Schematic C7 12 pF 24 23 22 21 20 4 Flo x2 +45° 1 R3 430 Ω C10 1.6 pF 1 2 C5 DNI OUT L5 4.3 nH GND L4 4.3 nH C9 1.6 pF Σ L6 22 nH T2 Murata LDB211G8020C-001 15 -45° VCC 14 8 9 10 11 12 L8 12 nH C18 0.5 pF C14 10 nF C15 1 nF C17 3.3 pF R4 1 kΩ C16 3.3 pF 4 IN L7 12 nH OUT IN 7 1 50 Ω μstrip GND C8 100 pF 13 J7 LB RF OUT T3 Murata LDB21906M20C-001 6 Power Control 2 Mode Control and Biasing MODE D J9 Q SIG P 2 3 IN R2 430 Ω 16 -45° GND +45° GND DIV 2 J5 HB RF OUT 6 3 IN C4 1.8 pF 6 J8 Q SIG N OUT 50 Ω μstrip 17 5 2 5 50 Ω μstrip GND C11 22 pF Note: The die flag is the chip's main ground. C13 3 pF MODE C 6 VCC 3 50 Ω μstrip Murata LDB211G9020C-001 18 GND 50 Ω μstrip J4 WB RF OUT T1 4 L1 3.9 nH R1 1 kΩ C3 4.3 pF 19 1 J6 LB LO 3 IN C2 4.3 pF C6 5.6 pF C12 1.3 pF IN C1 1 nF L3 2.2 nH GND L2 2.2 nH 4 50 Ω μstrip MODE B J3 HB LO 50 Ω μstrip GND 50 Ω μstrip GND J1 I SIG N VCC 5 J2 I SIG P MODE A 5 VCC 50 Ω μstrip P1-1 P1-3 1 VCC 2 GND 3 GC CON3 Rev A0 DS060206 P2-1 P1 1 MODE D P2-2 2 MODE C P2-3 3 MODE B P2 GC 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. P2-4 MODE A 4 CON4 23 of 26 RF2705G Evaluation Board Layout Board Size 2.250” x 2.250” Board Thickness 0.032”, Board Material FR-4, Multi-Layer 24 of 26 Assembly Top Mid Back 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206 RF2705G PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD’s qualification process is Electroless Nickel, immersion Gold. Typical thickness is 3μinch to 8μinch Gold over 180μinch Nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern A = 0.69 x 0.28 (mm) Typ. B = 0.28 x 0.69 (mm) Typ. C = 2.50 (mm) Sq. 2.50 (mm) Typ. 0.50 (mm) Typ. Pin 24 B Pin 1 0.50 (mm) Typ. B B B B A A A A A A C A 0.57 (mm) Typ. B A A A A A B B B B B Pin 18 1.25 (mm) Typ. 2.50 (mm) Typ. B Pin 12 0.57 (mm) Typ. 1.25 (mm) Typ. Figure 1. PCB Metal Land Pattern (Top View) Rev A0 DS060206 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 25 of 26 RF2705G PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB Metal Land Pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier. A = 0.79 x 0.38 (mm) Typ. B = 0.38 x 0.79 (mm) Typ. C = 2.60 (mm) Sq. 2.50 (mm) Typ. 0.50 (mm) Typ. Pin 24 B Pin 1 0.50 (mm) Typ. B B B B A A A A A A C A 0.57 (mm) Typ. B A A A A A B B B B B Pin 18 1.25 (mm) Typ. 2.50 (mm) Typ. B Pin 12 0.57 (mm) Typ. 1.25 (mm) Typ. Figure 2. PCB Solder Mask Pattern (Top View) Thermal Pad and Via Design The PCB land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of the device. Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern shown has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. 26 of 26 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A0 DS060206