NCP9002 1.3 Watt Audio Power Amplifier with Fast Turn On Time The NCP9002 is an audio power amplifier designed for portable communication device applications such as mobile phone applications. The NCP9002 is capable of delivering 1.3 W of continuous average power to an 8.0 BTL load from a 5.0 V power supply, and 1.0 W to a 4.0 BTL load from a 3.6 V power supply. The NCP9002 provides high quality audio while requiring few external components and minimal power consumption. It features a low−power consumption shutdown mode, which is achieved by driving the SHUTDOWN pin with logic low. The NCP9002 contains circuitry to prevent from “pop and click” noise that would otherwise occur during turn−on and turn−off transitions. For maximum flexibility, the NCP9002 provides an externally controlled gain (with resistors), as well as an externally controlled turn−on time (with the bypass capacitor). When using a 1 F bypass capacitor, it offers 100 ms wake up time. Due to its excellent PSRR, it can be directly connected to the battery, saving the use of an LDO. This device is available in a 9−Pin Flip−Chip CSP (Lead−Free). http://onsemi.com MARKING DIAGRAMS A1 9−Pin Flip−Chip CSP FC SUFFIX CASE 499AL A3 MAZG AYWW C1 A1 MAZ A Y WW G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package PIN CONNECTIONS Features • • • • • • • • • • 9−Pin Flip−Chip CSP 1.3 W to an 8.0 BTL Load from a 5.0 V Power Supply Excellent PSRR: Direct Connection to the Battery “Pop and Click” Noise Protection Circuit Ultra Low Current Shutdown Mode: 10 nA 2.2 V−5.5 V Operation External Gain Configuration Capability External Turn−on Time Configuration Capability: 100 ms (1 F Bypass Capacitor) Up to 1.0 nF Capacitive Load Driving Capability Thermal Overload Protection Circuitry This is a Pb−Free Device A3 INM OUTA INP B1 B2 B3 VM_P VM Vp C1 C2 C3 BYPASS OUTB SHUTDOWN (Top View) See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. • Portable Electronic Devices • PDAs • Wireless Phones December, 2006 − Rev. 4 A2 ORDERING INFORMATION Typical Applications © Semiconductor Components Industries, LLC, 2006 A1 1 Publication Order Number: NCP9002/D NCP9002 Rf 20 k Vp 1 F Cs AUDIO INPUT Ci Ri INM 47 nF 20 k INP − + Vp OUTA R1 20 k Vp − + BYPASS Cbypass 8 R2 20 k OUTB 1 F SHUTDOWN VIH SHUTDOWN CONTROL VM_P VM VIL Figure 1. Typical Audio Amplifier Application Circuit with Single Ended Input Rf 20 k Vp 1 F Cs Ci Ri 47 nF 20 k + AUDIO INPUT INM − + INP Ci Ri Vp Vp − 47 nF 20 k 20 k − + Rf BYPASS Cbypass R1 20 k 8 R2 20 k OUTB 1 F SHUTDOWN VIH OUTA SHUTDOWN CONTROL VM_P VM VIL Figure 2. Typical Audio Amplifier Application Circuit with a Differential Input This device contains 671 active transistors and 1899 MOS gates. http://onsemi.com 2 NCP9002 PIN DESCRIPTION Pin Type Symbol Description A1 I INM A2 O OUTA A3 I INP B1 I VM_P B2 I VM Core Analog Ground. B3 I Vp Positive analog supply of the cell. Range: 2.2 V−5.5 V. C1 I BYPASS C2 O OUTB C3 I SHUTDOWN Negative input of the first amplifier, receives the audio input signal. Connected to the feedback resistor Rf and to the input resistor Rin. Negative output of the NCP9002. Connected to the load and to the feedback resistor Rf. Positive input of the first amplifier, receives the common mode voltage. Power Analog Ground. Bypass capacitor pin which provides the common mode voltage (Vp/2). Positive output of the NCP9002. Connected to the load. The device enters in shutdown mode when a low level is applied on this pin. MAXIMUM RATINGS (Note 1) Rating Symbol Value Unit Vp 6.0 V Op Vp 2.2 to 5.5 V 2.0 V = Functional Only − Input Voltage Vin −0.3 to Vcc +0.3 V Max Output Current Iout 500 mA Power Dissipation (Note 2) Pd Internally Limited − Operating Ambient Temperature TA −40 to +85 °C Max Junction Temperature TJ 150 °C Storage Temperature Range Tstg −65 to +150 °C Thermal Resistance Junction−to−Air RJA (Note 3) °C/W − 6000 >250 V − ±100 mA Supply Voltage Operating Supply Voltage ESD Protection Human Body Model (HBM) (Note 4) Machine Model (MM) (Note 5) Latchup Current at TA = 85°C (Note 6) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = +25°C. 2. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation. For further information see page 9. 3. The RJA is highly dependent of the PCB Heatsink area. For example, RJA can equal 195°C/W with 50 mm2 total area and also 135°C/W with 500 mm2. For further information see page 10. The bumps have the same thermal resistance and all need to be connected to optimize the power dissipation. 4. Human Body Model, 100 pF discharge through a 1.5 k resistor following specification JESD22/A114. 5. Machine Model, 200 pF discharged through all pins following specification JESD22/A115. 6. Maximum ratings per JEDEC standard JESD78. http://onsemi.com 3 NCP9002 ELECTRICAL CHARACTERISTICS Limits apply for TA between −40°C to +85°C (Unless otherwise noted). Characteristic Supply Quiescent Current Symbol Conditions Min (Note 7) Typ Max (Note 7) Idd Unit Vp = 2.6 V, No Load Vp = 5.0 V, No Load − − 1.5 1.7 4 mA Vp = 2.6 V, 8 Vp = 5.0 V, 8 − − 1.7 1.9 5.5 Common Mode Voltage Vcm − − Vp/2 − V Shutdown Current ISD TA = +25°C TA = −40°C to +85°C − 0.01 0.5 1.0 A Shutdown Voltage High VSDIH − 1.2 − − V Shutdown Voltage Low VSDIL − − − 0.4 V Turning On Time (Note 9) TWU Cby = 1 F − 90 − ms Turning Off Time TOFF − − 1.0 − s Output Impedance in Shutdown Mode ZSD − − 10 − k Vloadpeak Vp = 2.6 V, RL = 8.0 Vp = 5.0 V, RL = 8.0 (Note 8) TA = +25°C TA = −40°C to +85°C 1.6 2.20 − − V 4.0 3.85 4.50 Vp = 2.6 V, RL = 4.0 THD + N < 0.1% Vp = 2.6 V, RL = 8.0 THD + N < 0.1% Vp = 5.0 V, RL = 8.0 THD + N < 0.1% − 0.40 − W PDmax Vp = 5.0 V, RL = 8.0 − Output Offset Voltage VOS Vp = 2.6 V Vp = 5.0 V −30 Signal−to−Noise Ratio SNR Vp = 2.6 V, G = 2.0 10 Hz < F < 20 kHz Vp = 5.0 V, G = 10 10 Hz < F < 20 kHz − − Output Swing Rms Output Power Maximum Power Dissipation (Note 9) Positive Supply Rejection Ratio Efficiency Thermal Shutdown Temperature (Note 10) Total Harmonic Distortion PO PSRR V+ − 1.20 − 0.65 W 30 mV 84 − dB 77 − G = 2.0, RL = 8.0 Vpripple_pp = 200 mV Cby = 1.0 F Input Terminated with 10 F = 217 Hz Vp = 5.0 V Vp = 3.0 V Vp = 2.6 V − − − −64 −72 −73 − − − F = 1.0 kHz Vp = 5.0 V Vp = 3.0 V Vp = 2.6 V − − − −64 −74 −75 − − − Vp = 2.6 V, Porms = 320 mW Vp = 5.0 V, Porms = 1.0 W − − 48 63 − − % dB 140 160 180 °C Vp = 2.6, F = 1.0 kHz RL = 4.0 AV = 2.0 PO = 0.32 W − − − − 0.04 − − − − % Vp = 5.0 V, F = 1.0 kHz RL = 8.0 AV = 2.0 PO = 1.0 W − − − − 0.02 − − − − Tsd THD 0.30 − 7. Min/Max limits are guaranteed by design, test or statistical analysis. 8. This parameter is guaranteed but not tested in production in case of a 5.0 V power supply. 9. See page 11 for a theoretical approach of this parameter. 10. For this parameter, the Min/Max values are given for information. http://onsemi.com 4 NCP9002 TYPICAL PERFORMANCE CHARACTERISTICS 10 10 Vp = 2.5 V RL = 8 f = 1 kHz AV = 2 1 THD + N (%) THD + N (%) 1 Vp = 3.2 V RL = 8 f = 1 kHz AV = 2 0.1 0.1 0.01 0.01 0.001 0.001 0 50 100 150 200 250 300 350 0 400 100 Figure 3. THD + N versus Power Out 400 500 600 700 10 Vp = 3.6 V RL = 8 f = 1 kHz AV = 2 Vp = 4.2 V RL = 8 f = 1 kHz AV = 2 1 THD + N (%) 1 THD + N (%) 300 Figure 4. THD + N versus Power Out 10 0.1 0.01 0.1 0.01 0.001 0.001 0 100 200 300 400 500 600 700 800 0 200 Pout, POWER OUT (mW) 400 600 800 1000 1200 Pout, POWER OUT (mW) Figure 5. THD + N versus Power Out Figure 6. THD + N versus Power Out 10 10 Vp = 5 V RL = 8 f = 1 kHz AV = 2 Vp = 3.6 V RL = 4 f = 1 kHz AV = 2 1 THD + N (%) 1 THD + N (%) 200 Pout, POWER OUT (mW) Pout, POWER OUT (mW) 0.1 0.01 0.1 0.01 0.001 0 200 400 600 800 1000 1200 1400 0.001 1600 0 200 400 600 800 1000 Pout, POWER OUT (mW) Pout, POWER OUT (mW) Figure 7. THD + N versus Power Out Figure 8. THD + N versus Power Out http://onsemi.com 5 1200 NCP9002 TYPICAL PERFORMANCE CHARACTERISTICS 1700 10 RL = 8 f = 1 kHz AV = 2 1300 THD+N < 10% 1100 THD+N < 1% 900 Vp = 2.5 V RL = 8 Pout = 100 mW AV = 2 1 THD + N (%) OUTPUT POWER (mW) 1500 700 500 0.1 0.01 300 100 2.5 3.0 3.5 4.0 4.5 0.001 5.0 10 100 POWER SUPPLY (V) Figure 9. Output Power versus Power Supply 100,000 10 Vp = 3 V RL = 8 Pout = 150 mW AV = 2 1 THD + N (%) 1 THD + N (%) 10,000 Figure 10. THD + N versus Frequency 10 0.1 0.01 Vp = 3.3 V RL = 8 Pout = 250 mW AV = 2 0.1 0.01 0.001 10 100 1000 10,000 0.001 10 100,000 100 FREQUENCY (Hz) 1000 10,000 100,000 FREQUENCY (Hz) Figure 11. THD + N versus Frequency Figure 12. THD + N versus Frequency 10 10 Vp = 5 V RL = 8 Pout = 250 mW AV = 2 1 THD + N (%) 1 THD + N (%) 1000 FREQUENCY (Hz) 0.1 0.01 Vp = 2.5 V RL = 4 Pout = 100 mW AV = 2 0.1 0.01 0.001 10 100 1000 10,000 0.001 10 100,000 FREQUENCY (Hz) 100 1000 10,000 FREQUENCY (Hz) Figure 13. THD + N versus Frequency Figure 14. THD + N versus Frequency http://onsemi.com 6 100,000 NCP9002 TYPICAL PERFORMANCE CHARACTERISTICS −10 −10 Vp = 3.6 V RL = 8 Vripple = 200 mVpk−pk Input to Gnd Cbypass = 1 F PSRR (dB) −30 −30 −40 AV = 8 −50 −60 −40 AV = 8 −50 −60 AV = 2 −70 −80 Vp = 5 V RL = 8 Vripple = 200 mVpk−pk Input to Gnd Cbypass = 1 F −20 PSRR (dB) −20 10 100 AV = 2 −70 −80 10,000 1000 10 100 FREQUENCY (Hz) FREQUENCY (Hz) Figure 15. PSRR @ Vp = 3.6 V Single Ended Audio Input to Ground Figure 16. PSRR @ Vp = 5 V Single Ended Audio Input to Ground −10 −10 Vp = 3.6 V RL = 8 Vripple = 200 mVpk−pk Input to Gnd Cbypass = 1 F PSRR (dB) −30 Vp = 5 V RL = 8 Vripple = 200 mVpk−pk Input to Gnd Cbypass = 1 F −20 −30 PSRR (dB) −20 −40 AV = 4 −50 −60 −40 AV = 4 −50 −60 AV = 1 AV = 1 −70 −80 10 100 1000 −70 −80 10,000 10 100 FREQUENCY (Hz) 10,000 Figure 18. PSRR @ Vp = 5 V Differential Audio Input to Ground 0 −10 RL = 8 AV = 2 Vripple = 200 mVpk−pk Inputs Floating Cbypass = 1 F −30 −20 −40 −50 VP = 5 V & VP = 3.6 V −60 Vp = 5 V RL = 8 F = 217 Hz AV = 2 Vripple = 200 mVpk−pk Cbypass = 1 F −10 PSRR (dB) −20 PSRR (dB) 1000 FREQUENCY (Hz) Figure 17. PSRR @ Vp = 3.6 V Differential Audio Input to Ground −30 −40 −50 −60 −70 −80 10,000 1000 −70 10 100 1000 10,000 −80 −5 −4 −3 −2 −1 0 1 2 3 DC OUTPUT VOLTAGE (V) FREQUENCY (Hz) Figure 20. PSRR @ DC Output Voltage Figure 19. PSRR @ Vp = 3.6 V Single Ended Audio Input Floating http://onsemi.com 7 4 5 NCP9002 TYPICAL PERFORMANCE CHARACTERISTICS 180 120 160 Vbat = 5.5 V 110 100 120 Turn ON (ms) Turn ON (ms) 140 100 80 60 Vbat = 3.6 V 90 80 Vbat = 2.5 V 70 40 60 20 0 0 400 1200 800 50 −50 2000 1600 25 50 75 100 125 Cbypass (nF) TEMPERATURE (°C) Figure 22. TON versus Temperature @ Vbat = 3.6 V, Cbypass = 1 mF 0.7 PD, POWER DISSIPATION (W) 94 92 Turn ON (ms) 0 Figure 21. TON versus Cbypass @ Vbat = 3.6 V, TA = +255C 96 90 88 86 84 82 80 78 76 2.5 3.0 3.5 4.0 4.5 5.0 0.6 0.5 0.4 Vp = 5 V RL = 8 F = 1 kHz THD + N < 0.1% 0.3 0.2 0.1 0 5.5 0 0.2 0.4 0.6 0.8 1 Vbat, (V) Pout, OUTPUT POWER (W) Figure 23. TON vs. Vbat @ Cbypass = 1 mF, TA = +255C Figure 24. Power Dissipation versus Output Power 0.3 1.2 0.25 PD, POWER DISSIPATION (W) PD, POWER DISSIPATION (W) −25 0.25 0.2 0.15 Vp = 3.3 V RL = 8 F = 1 kHz THD + N < 0.1% 0.1 0.05 0 0.2 0.15 Vp = 3 V RL = 8 F = 1 kHz THD + N < 0.1% 0.1 0.05 0 0 0.1 0.2 0.3 0.4 0.5 0 Pout, OUTPUT POWER (W) 0.1 0.2 0.3 Pout, OUTPUT POWER (W) Figure 25. Power Dissipation versus Output Power Figure 26. Power Dissipation versus Output Power http://onsemi.com 8 0.4 NCP9002 TYPICAL PERFORMANCE CHARACTERISTICS 700 PD, POWER DISSIPATION (mW) 0.35 RL = 4 0.3 0.25 0.2 RL = 8 0.15 0.1 Vp = 2.6 V F = 1 kHz THD + N < 0.1% 0.05 PCB Heatsink Area 600 200 mm2 500 50 mm2 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 500 mm2 400 300 200 PDmax = 633 mW for Vp = 5 V, RL = 8 100 0 0 0 0.4 20 40 60 Pout, OUTPUT POWER (W) Maximum Die Temperature 150°C RL = 8 160 Vp = 5 V 120 Vp = 4.2 V 100 80 Vp = 3.3 V 60 40 Vp = 2.6 V 50 100 100 120 140 160 Figure 28. Power Derating − 9−Pin Flip−Chip CSP 180 140 80 TA, AMBIENT TEMPERATURE (°C) Figure 27. Power Dissipation versus Output Power DIE TEMPERATURE (°C) @ AMBIENT TEMPERATURE 25°C PD, POWER DISSIPATION (W) 0.4 150 200 PCB HEATSINK AREA 250 (mm2) Figure 29. Maximum Die Temperature versus PCB Heatsink Area http://onsemi.com 9 300 NCP9002 TYPICAL PERFORMANCE CHARACTERISTICS Ch1 = OUTA Ch2 = OUTB Ch3 = Shutdown Math1 = Ch1−Ch2: Differential Signal seen by the Load Ch1 = OUTA Ch2 = OUTB Ch3 = Shutdown Math1 = Ch1−Ch2: Differential Signal seen by the Load Figure 30. Zero Pop Noise Turn On Sequence with Differential Input to Ground; Cin = 100 nF, Rin = 24 W, Rf = 100 kW, Cbyp = 1 mF, RL = 8 W Figure 31. Zero Pop Noise Turn On Sequence with Differential Audio Source; Cin = 100 nF, Rin = 24 W, Rf = 100 kW, Cbyp = 1 mF, RL = 8 W Ch1 = OUTA Ch2 = OUTB Ch3 = Shutdown Math1 = Ch1−Ch2: Differential Signal seen by the Load Ch1 = OUTA Ch2 = OUTB Ch3 = Shutdown Math1 = Ch1−Ch2: Differential Signal seen by the Load Figure 32. Zero Pop Noise Turn Off Sequence with Differential Input to Ground; Cin = 100 nF, Rin = 24 W, Rf = 100 kW, Cbyp = 1 mF, RL = 8 W Figure 33. Zero Pop Noise Turn Off Sequence with Differential Audio Source; Cin = 100 nF, Rin = 24 W, Rf = 100 kW, Cbyp = 1 mF, RL = 8 W http://onsemi.com 10 NCP9002 APPLICATION INFORMATION Detailed Description is no audible pop click noise, especially when the input cut off frequency is higher than 100 Hz. The NCP9002 audio amplifier can operate under 2.6 V until 5.5 V power supply. With less than 1% THD+N, B version can deliver up to 1.2 W rms output power to an 8.0 load (Vp = 5.0 V). If application allows to reach 10% THD+N, then 1.6 W can be provided using a 5.0 V power supply. The structure of the NCP9002 is basically composed of two identical internal power amplifiers; the first one is externally configurable with gain−setting resistors Rin and Rf (the closed−loop gain is fixed by the ratios of these resistors) and the second is internally fixed in an inverting unity−gain configuration by two resistors of 20 k. So the load is driven differentially through OUTA and OUTB outputs. This configuration eliminates the need for an output coupling capacitor. The NCP9002 has around 10 k output impedance in the shutdown mode. Shutdown Function The device enters shutdown mode when shutdown signal is low. During the shutdown mode, the DC quiescent current of the circuit does not exceed 100 nA. In this configuration, the output impedance is 10 k on each output. Current Limit Circuit The maximum output power of the circuit (Porms = 1.0 W, Vp = 5.0 V, RL = 8.0 ) requires a peak current in the load of 500 mA. In order to limit the excessive power dissipation in the load when a short−circuit occurs, the current limit in the load is fixed to 800 mA. The current in the four output MOS transistors are real−time controlled, and when one current exceeds 800 mA, the gate voltage of the MOS transistor is clipped and no more current can be delivered. Internal Power Amplifier The output PMOS and NMOS transistors of the amplifier were designed to deliver the output power of the specifications without clipping. The channel resistance (Ron) of the NMOS and PMOS transistors does not exceed 0.6 when they drive current. The structure of the internal power amplifier is composed of three symmetrical gain stages, first and medium gain stages are transconductance gain stages to obtain maximum bandwidth and DC gain. Thermal Overload Protection Internal amplifiers are switched off when the temperature exceeds 160°C, and will be switched on again only when the temperature decreases fewer than 140°C. The NCP9002 is unity−gain stable and requires no external components besides gain−setting resistors, an input coupling capacitor and a proper bypassing capacitor in the typical application. The first amplifier is externally configurable (Rf and Rin), while the second is fixed in an inverting unity gain configuration. The differential−ended amplifier presents two major advantages: − The possible output power is four times larger (the output swing is doubled) as compared to a single−ended amplifier under the same conditions. − Output pins (OUTA and OUTB) are biased at the same potential Vp/2, this eliminates the need for an output coupling capacitor required with a single−ended amplifier configuration. The differential closed loop−gain of the amplifier is Turn−On and Turn−Off Transitions A cycle with a turn−on and turn−off transition is illustrated with plots that show both single ended signals on the previous page. In order to eliminate “pop and click” noises during transitions, output power in the load must be slowly established or cut. When logic high is applied to the shutdown pin, the bypass voltage begins to rise exponentially and once the output DC level is around the common mode voltage, the gain is established instantaneously. This way to turn−on the device is optimized in terms of rejection of “pop and click” noises. The device has the same behavior when it is turned−off by a logic low on the shutdown pin. During the shutdown mode, amplifier outputs are connected to the ground. When a shutdown low level is applied, with 1 F bypass capacitor, it takes 65 ms before the DC output level is tied to Ground on each output. However, no audio signal will be provided to the BTL load only 1 s after the falling edge on the shutdown pin. With 1 F bypass capacitor, turn on time is set to 90 ms. This fast turn on time added to a very low shutdown current saves battery life and brings flexibility when designing the audio section of the final application. NCP9002 is a zero pop noise device when using a differential audio input. In case of a single ended one, there R V given by Avd + 2 * f + orms . Rin Vinrms Output power delivered to the load is given by Porms + (Vopeak)2 (Vopeak is the peak differential 2 * RL output voltage). When choosing gain configuration to obtain the desired output power, check that the amplifier is not current limited or clipped. The maximum current which can be delivered to the load is 500 mA Iopeak + http://onsemi.com 11 Vopeak . RL NCP9002 Gain−Setting Resistor Selection (Rin and Rf) large input coupling capacitor requires more time to reach its quiescent DC voltage (Vp/2) and can increase the turn−on pops when a single ended audio input is used. An input capacitor value between 33 nF and 220 nF performs well in many applications (With Rin = 22 K). Rin and Rf set the closed−loop gain of the amplifier. In order to optimize device and system performance, the NCP9002 should be used in low gain configurations. The low gain configuration minimizes THD + noise values and maximizes the signal to noise ratio, and the amplifier can still be used without running into the bandwidth limitations. A closed loop gain in the range from 2 to 5 is recommended to optimize overall system performance. An input resistor (Rin) value of 22 k is realistic in most of applications, and doesn’t require the use of a too large capacitor Cin. Bypass Capacitor Selection (Cby) The bypass capacitor Cby provides half−supply filtering and determines how fast the NCP9002 turns on (see Figure 21). With a differential audio input, the amplifier will be a zero pop noise device no matter the bypass capacitor. With a single ended audio input, this capacitor is a critical component to minimize the turn−on pop. A 1.0 F bypass capacitor value (Cin = < 0.39 F) should produce clickless and popless shutdown transitions. The amplifier is still functional with a 0.1 F capacitor value but is more susceptible to “pop and click” noises. Thus, a 1.0 F bypassing capacitor is recommended. Input Capacitor Selection (Cin) The input coupling capacitor blocks the DC voltage at the amplifier input terminal. This capacitor creates a high−pass filter with Rin, the cut−off frequency is given by fc + 1 . 2 * * Rin * Cin The size of the capacitor must be large enough to couple in low frequencies without severe attenuation. However a ORDERING INFORMATION Device NCP9002FCT2G Marking Package Shipping† MAZ 9−Pin Flip−Chip CSP (Pb−Free) 3000/Tape and Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 12 NCP9002 PACKAGE DIMENSIONS 9−PIN FLIP−CHIP CSP FC SUFFIX CASE 499AL−01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. −A− 4X D 0.10 C −B− E DIM A A1 A2 D E b e D1 E1 TOP VIEW A 0.10 C 0.05 C −C− MILLIMETERS MIN MAX 0.540 0.660 0.210 0.270 0.330 0.390 1.450 BSC 1.450 BSC 0.290 0.340 0.500 BSC 1.000 BSC 1.000 BSC A2 A1 SIDE VIEW SEATING PLANE D1 e C B e E1 A 9X b 1 2 3 0.05 C A B 0.03 C BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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