CY62158CV25/30/33 MoBL™ 1024K x 8 MoBL Static RAM Features in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can be put into standby mode reducing power consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW). • High Speed — 55 ns and 70 ns availability • Voltage range: — CY62158CV25: 2.2V–2.7V Writing to the device is accomplished by taking Chip Enable 1 (CE1) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A19). — CY62158CV30: 2.7V–3.3V — CY62158CV33: 3.0V–3.6V • Ultra low active power — Typical active current: 1.5 mA @ f = 1 MHz • • • • — Typical active current: 5.5 mA @ f = fmax(70 ns speed) Low standby power Easy memory expansion with CE1, CE2 and OE features Automatic power-down when deselected CMOS for optimum speed/power Functional Description The CY62158CV25/30/33 are high-performance CMOS static RAMs organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL™) Reading from the device is accomplished by taking Chip Enable 1 (CE1) and Output Enable (OE) LOW and Chip Enable 2 (CE2) HIGH while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 LOW and CE2 HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW and CE2 HIGH and WE LOW). The CY62158CV25/30/33 are available in a 48-ball FBGA package. Logic Block Diagram I/O0 Data in Drivers I/O1 1024K x 8 ARRAY I/O2 SENSE AMPS ROW DECODER A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 I/O3 I/O4 I/O5 COLUMN DECODER CE1 CE2 I/O6 POWER DOWN I/O7 A13 A14 A15 A16 A17 A18 A19 WE OE Cypress Semiconductor Corporation Document #: 38-05019 Rev. *C • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised April 24, 2002 CY62158CV25/30/33 MoBL™ Pin Configurations [1, 2] FBGA Top View 4 3 1 2 NC OE A0 NC NC I/O0 5 6 A1 A2 CE2 A A3 A4 CE1 NC B DNU A5 A6 NC I/O4 C VSS I/O1 A17 A7 I/O5 VCC D VCC I/O2 NC A16 I/O6 VSS E I/O3 NC A14 A15 NC I/O7 F NC NC A12 A13 WE NC G A18 A8 A9 A10 A11 A19 H Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature . ................................–65°C to +150°C Ambient Temperature with Power Applied. ..............................................55°C to +125°C Supply Voltage to Ground Potential ...–0.5V to Vccmax + 0.5V DC Voltage Applied to Outputs in High Z State[3].................................... –0.5V to VCC + 0.5V DC Input Voltage[3] .................................–0.5V to VCC + 0.5V Output Current into Outputs (LOW)..............................20 mA Static Discharge Voltage ............................................>2001V (per MIL-STD-883, Method 3015) Latch-Up Current .....................................................>200 mA Operating Range Product CY62158CV25 CY62158CV30 CY62158CV33 Range Industrial Ambient Temperature –40°C to +85°C VCC 2.2V to 2.7V 2.7V to 3.3V 3.0V to 3.6V Product Portfolio Power Dissipation (Industrial) Operating (ICC) VCC Range Product CY62158CV25 Min. Typ. 2.2V [4] 2.5V f = 1 MHz Max. Typ. Typ.[4] Max. 7 mA 15 mA 6 µA 25 µA 3 mA 5.5 mA 12 mA 1.5 mA 3 mA 7 mA 15 mA 8 µA 25 µA 70 ns 1.5 mA 3 mA 5.5 mA 12 mA 55 ns 1.5 mA 3 mA 7 mA 15 mA 10 µA 30 µA 70 ns 1.5 mA 3 mA 5.5 mA 12 mA Speed Typ. 2.7V 55 ns 1.5 mA 3 mA 70 ns 1.5 mA 55 ns 2.7V 3.0V 3.3V CY62158CV33 3.0V 3.3V 3.6V [4] Standby (ISB2) Max. Max. CY62158CV30 f = fmax [4] Notes: 1. NC pins are not connected to the die. 2. C2 (DNU) can be left as NC or VSS to ensure proper application. 3. VIL(min.) = –2.0V for pulse durations less than 20 ns. 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C. Document #: 38-05019 Rev. *C Page 2 of 12 CY62158CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range CY62158CV25-55 Parameter Description Test Conditions Min. Typ. [4] Max. VOH Output HIGH Voltage IOH = –0.1 mA VCC = 2.2V VOL Output LOW Voltage IOL = 0.1 mA VCC = 2.2V VIH Input HIGH Voltage 1.8 VCC+ 0.3V VIL Input LOW Voltage –0.3 IIX Input Leakage Current GND < VI < VCC IOZ Output Leakage Current GND < VO < VCC, Output Disabled ICC VCC Operating Supply Current f = fMAX = 1/tRC ISB1 Automatic CE Power-Down Current — CMOS Inputs CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE,WE) Automatic CE Power-Down Current — CMOS Inputs CE1 > VCC − 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0, VCC = 2.7V ISB2 f = 1 MHz 2.0 Description V 1.8 VCC + 0.3V V 0.6 –0.3 0.6 V –1 +1 –1 +1 µA –1 +1 –1 +1 µA mA 7 15 5.5 12 1.5 3 1.5 3 6 25 6 25 Min. Typ.[4] Max. IOH = –1.0 mA VCC = 2.7V VOL Output LOW Voltage IOL = 2.1 mA VCC = 2.7V VIH Input HIGH Voltage 2.2 VCC + 0.3V VIL Input LOW Voltage –0.3 IIX Input Leakage Current GND < VI < VCC IOZ Output Leakage Current GND < VO < VCC, Output Disabled ICC VCC Operating Supply Current f = fMAX = 1/tRC ISB1 Automatic CE Power-Down Current — CMOS Inputs CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f = 0 (OE, WE) ISB2 Automatic CE Power-Down Current — CMOS Inputs CE1 > VCC − 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0,VCC = 3.3V Document #: 38-05019 Rev. *C Unit V Output HIGH Voltage VCC = 3.3V IOUT = 0 mA CMOS Levels Max. 0.4 VOH f = 1 MHz Typ.[4] 0.4 VCC = 2.7V IOUT = 0 mA CMOS Levels Test Conditions Min. 2.0 CY62158CV30-55 Parameter CY62158CV25-70 2.4 µA CY62158CV30-70 Min. Typ.[4] Max. 2.4 Unit V 0.4 0.4 V 2.2 VCC + 0.3V V 0.8 –0.3 0.8 V –1 +1 –1 +1 µA –1 +1 –1 +1 µA mA 7 15 5.5 12 1.5 3 1.5 3 8 25 8 25 µA Page 3 of 12 CY62158CV25/30/33 MoBL™ Electrical Characteristics Over the Operating Range (continued) CY62158CV33-55 Parameter Description Test Conditions Min. [4] Typ. Max. VOH Output HIGH Voltage IOH = –1.0 mA VCC = 3.0V VOL Output LOW Voltage IOL = 2.1 mA VCC = 3.0V VIH Input HIGH Voltage 2.2 VCC+ 0.3V VIL Input LOW Voltage –0.3 IIX Input Leakage Current GND < VI < VCC IOZ Output Leakage Current GND < VO < VCC, Output Disabled ICC VCC Operating Supply Current f = fMAX = 1/tRC ISB1 Automatic CE Power-Down Current — CMOS Inputs CE1 > VCC – 0.2V or CE2 < 0.2V VIN > VCC – 0.2V or VIN < 0.2V, f = fmax (Address and Data Only), f=0 (OE, WE) ISB2 Automatic CE Power-Down Current — CMOS Inputs CE1 > VCC − 0.2V or CE2 < 0.2V VIN > VCC − 0.2V or VIN < 0.2V, f = 0, VCC = 3.6V f = 1 MHz 2.4 CY62158CV33-70 Min. Typ.[4] Max. 2.4 Unit V 0.4 0.4 V 2.2 VCC + 0.3V V 0.8 –0.3 0.8 V –1 +1 –1 +1 µA –1 +1 –1 +1 µA mA VCC = 3.6V IOUT = 0 mA CMOS Levels 7 15 5.5 12 1.5 2 1.5 2 10 30 10 30 µA Capacitance[5] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = VCC(typ.) Max. Unit 6 pF 8 pF Thermal Resistance Description Thermal Resistance[5] (Junction to Ambient) Test Conditions Symbol BGA Unit Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board ΘJA 55 °C/W ΘJC 16 °C/W Thermal Resistance[5] (Junction to Case) Note: 5. Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05019 Rev. *C Page 4 of 12 CY62158CV25/30/33 MoBL™ AC Test Loads and Waveforms R1 VCC ALL INPUT PULSES OUTPUT VCC Typ R2 30 pF GND Fall time: 1 V/ns Rise Time: 1 V/ns INCLUDING JIG AND SCOPE Equivalent to: 90% 10% 90% 10% THÉVENIN EQUIVALENT RTH OUTPUT VTH Parameters 2.5V 3.0V 3.3V Unit R1 16.6 1.105 1.216 K Ohms R2 15.4 1.550 1.374 K Ohms RTH 8.0 0.645 0.645 K Ohms VTH 1.20 1.75 1.75 Volts Data Retention Characteristics (Over the Operating Range) Parameter Description Conditions VDR VCC for Data Retention ICCDR Data Retention Current tCDR[5] Chip Deselect to Data Retention Time tR[6] Operation Recovery Time Min. Typ.[4] 1.5 VCC = 1.5V CE1 > VCC − 0.2V or CE2 <0.2V VIN > VCC − 0.2V or VIN < 0.2V 4 Max. Unit Vccmax V 20 µA 0 ns tRC ns Data Retention Waveform DATA RETENTION MODE VCC VCC(min) VDR > 1.5 V tCDR VCC(min) tR CE1 or CE2 Note: 6. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs. Document #: 38-05019 Rev. *C Page 5 of 12 CY62158CV25/30/33 MoBL™ Switching Characteristics Over the Operating Range[7] 55 ns Parameter Description Min. 70 ns Max. Min. Max. Unit READ CYCLE tRC Read Cycle Time tAA Address to Data Valid 55 tOHA Data Hold from Address Change tACE CE1 LOW and CE2 HIGH to Data Valid tDOE OE LOW to Data Valid tLZOE OE LOW to Low Z[8] 10 tLZCE 25 [8] 10 [8, 9] tHZCE CE1 HIGH or CE2 LOW to High Z tPU CE1 LOW and CE2 HIGH to Power-Up ns 35 ns ns 25 20 CE1 HIGH or CE2 LOW to Power-Down 70 10 0 ns ns 25 0 55 ns ns 5 20 CE1 LOW and CE2 HIGH to Low Z tPD 10 5 OE HIGH to High Z ns 70 55 [8, 9] tHZOE 70 55 ns ns 70 ns [10] WRITE CYCLE tWC Write Cycle Time 55 70 ns tSCE CE1 LOW and CE2 HIGH to Write End 45 60 ns tAW Address Set-Up to Write End 45 60 ns tHA Address Hold from Write End 0 0 ns tSA Address Set-Up to Write Start 0 0 ns tPWE WE Pulse Width 45 50 ns tSD Data Set-Up to Write End 25 30 ns tHD Data Hold from Write End 0 0 ns [8, 9] tHZWE WE LOW to High Z tLZWE WE HIGH to Low Z[8] 20 5 25 5 ns ns Notes: 7. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30-pF load capacitance. 8. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 9. tHZOE, tHZCE, and tHZWE transitions are measured when the outputs enter a high impedance state. 10. The internal write time of the memory is defined by the overlap of WE, CE1 = VIL, and CE2 = VIH. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write. Document #: 38-05019 Rev. *C Page 6 of 12 CY62158CV25/30/33 MoBL™ Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) [11, 12] tRC ADDRESS tOHA DATA OUT tAA DATA VALID PREVIOUS DATA VALID Read Cycle No. 2 (OE Controlled) [12, 13] ADDRESS tRC CE1 CE2 tACE OE tHZOE tDOE DATA OUT tLZOE HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tHZCE HIGH IMPEDANCE DATA VALID tPD tPU 50% ICC 50% ISB Notes: 11. Device is continuously selected. OE, CE1 = VIL, CE2=VIH. 12. WE is HIGH for read cycle. 13. Address valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH. Document #: 38-05019 Rev. *C Page 7 of 12 CY62158CV25/30/33 MoBL™ Switching Waveforms Write Cycle No. 1(WE Controlled) [10, 14, 16] tWC ADDRESS tSCE CE1 CE2 tAW tHA tSA tPWE WE OE tSD DATA I/O tHD DATAIN VALID NOTE 15 tHZOE [10, 14, 16] Write Cycle No. 2(CE1 or CE2 Controlled) tWC ADDRESS tSCE CE1 tSA CE2 tHA tAW tPWE WE OE tSD DATA I/O tHD DATAIN VALID Notes: 14. Data I/O is high impedance if OE = VIH. 15. During this period, the I/Os are in output state and input signals should not be applied. 16. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE HIGH, the output remains in high-impedance state. Document #: 38-05019 Rev. *C Page 8 of 12 CY62158CV25/30/33 MoBL™ Switching Waveforms Write Cycle No. 3 (WE Controlled, OE LOW) [16] tWC ADDRESS tSCE CE1 CE2 tAW tSA tHA tPWE WE tSD DATAI/O NOTE 15 DATAIN VALID tHZWE Document #: 38-05019 Rev. *C tHD tLZWE Page 9 of 12 CY62158CV25/30/33 MoBL™ Typical DC and AC Characteristics (Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.) Operating Current vs. Supply Voltage MoBL MoBL 12.0 10.0 (f = fmax, 55 ns) 8.0 10.0 8.0 (f = fmax, 70 ns) 6.0 (f = fmax, 55 ns) (f = fmax, 70 ns) 6.0 ICC (mA) 12.0 ICC (mA) ICC (mA) 12.0 14.0 14.0 14.0 10.0 2.0 6.0 (f = fmax, 70 ns) (f = 1 MHz) 0.0 3.3 3.0 3.6 SUPPLY VOLTAGE (V) (f = 1 MHz) 0.0 3.0 2.7 3.3 SUPPLY VOLTAGE (V) 0.0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) (f = fmax, 55 ns) 2.0 2.0 (f = 1 MHz) 8.0 4.0 4.0 4.0 MoBL 12.0 12.0 12.0 10.0 10.0 10.0 MoBL 8.0 ISB (µA) 8.0 MoBL ISB (µA) ISB (µA) Standby Current vs. Supply Voltage MoBL 8.0 6.0 6.0 6.0 4.0 4.0 4.0 2.0 2.0 2.0 0 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) 0 3.3 3.0 3.3 3.0 2.7 3.6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 60 MoBL 60 MoBL 50 50 40 40 40 30 30 30 20 TAA (ns) 50 TAA (ns) TAA (ns) 60 20 10 10 2.5 2.2 2.7 0 2.7 SUPPLY VOLTAGE (V) 20 10 0 0 MoBL 3.0 3.3 3.0 3.3 3.6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Truth Table CE1 CE2 WE OE Inputs/Outputs Mode Power H X X X High Z Deselect/Power-Down Standby (ISB) X L X X High Z Deselect/Power-Down Standby (ISB) L H H L Data Out (I/O0-I/O7) Read Active (ICC) L H H H High Z Output Disabled Active (Icc) L H L X Data in (I/O0-I/O7) Write Active (Icc) Document #: 38-05019 Rev. *C Page 10 of 12 CY62158CV25/30/33 MoBL™ Ordering Information Speed (ns) Ordering Code Package Name Package Type Operating Range 70 CY62158CV25LL-70BAI BA48F 48-Ball Fine Pitch BGA Industrial CY62158CV30LL-70BAI CY62158CV33LL-70BAI 55 CY62158CV30LL-55BAI CY62158CV33LL-55BAI Package Diagrams 48-Ball (6 mm x 10 mm x 1.2 mm) FBGA BA48F 51-85128-*B MoBL, MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05019 Rev. *C Page 11 of 12 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY62158CV25/30/33 MoBL™ Document Title: CY62158CV25/30/33 MoBL™, 1024K x 8 MoBL Static RAM Document Number: 38-05019 REV. ECN NO. Issue Date Orig. of Change ** 106361 05/22/01 MGN New Data Sheet - Advance Information *A 107773 07/16/01 MGN Add 55 ns Bin to Advance Information *B 111945 01/31/02 GAV Advance to Final *C 114219 05/01/02 GUG/ MGN Improved Typical and Max Icc Values Document #: 38-05019 Rev. *C Description of Change Page 12 of 12