FAN7888 3 Half-Bridge Gate-Drive IC Features Description Floating Channel for Bootstrap Operation to +200V The FAN7888 is a monolithic three half-bridge gate-drive IC designed for high-voltage, high-speed driving MOSFETs and IGBTs operating up to +200V. Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for All Channels 3 Half-Bridge Gate Driver Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VBS=15V Matched Propagation Delay Time Maximum 50ns 3.3V and 5V Input Logic Compatible Built-in Shoot-Through Prevention Circuit for All Channels with Typically 270ns Dead Time Built-in Common Mode dv/dt Noise Canceling Circuit Built-in UVLO Functions for All Channels Fairchild’s high-voltage process and common-mode noise canceling technique provide stable operation of high-side drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS = -9.8V (typical) for VBS =15V. The UVLO circuits prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for three-phase half-bridge applications in motor drive systems. Applications 3-Phase Motor Inverter Driver 20-SOIC Ordering Information Part Number FAN7888M FAN7888MX Package Operating Temperature Range 20-SOIC -40°C to +125°C Packing Method Tube Tape & Reel All packages are lead free per JEDEC: J-STD-020B standard. © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev. 1.0.0 www.fairchildsemi.com FAN7888 — 3 Half-Bridge Gate-Drive IC May 2008 +15V Up to 200V 1 HIN1 VB1 20 UL 2 LIN1 HO1 19 VU 3-Phase BLDC Motor Controller VL 3 HIN2 VS1 18 VS1 4 LIN2 LO1 17 Q1 Q3 WU 5 HIN3 VB2 16 Q5 WL 6 LIN3 HO2 15 7 LO3 VS2 14 8 VS3 9 HO3 10 VB3 FAN7888 UU Q1 Q3 Q5 IU VS1 U 3-Phase Inverter VS2 IV VS2 V W Q4 LO2 13 Q6 Q2 VS3 IW VDD 12 Q4 GND 11 Q6 Q2 VS3 FAN7888 Rev.00 Figure 1. 3-Phase BLDC Motor Drive Application Internal Block Diagram VB1 UVLO HIN1 NOISE CANCELLER VDD_UVLO R R S Q VS1 VDD ULIN DELAY HIN3 VDD DRIVER SCHMITT TRIGGER INPUT LO1 GND U Phase Driver SHOOT-THOUGH PREVENTION VB2 VDD LIN2 V Phase Driver VHIN VLIN LIN3 HO1 UVLO HIN2 LIN1 DRIVER PULSE GENERATOR UHIN HO2 VS2 LO2 CONTROL LOGIC VB3 VDD W Phase Driver WHIN WLIN HO3 VS3 LO3 FAN7888 Rev.01 Figure 2. Functional Block Diagram © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 www.fairchildsemi.com 2 FAN7888 — 3 Half-Bridge Gate-Drive IC Typical Application Circuit FAN7888 — 3 Half-Bridge Gate-Drive IC Pin Configuration HIN1 1 20 VB1 LIN1 2 19 HO1 HIN2 3 18 VS1 HIN3 5 LIN3 6 LO3 7 VS3 FAN7888 LIN2 4 17 LO1 16 VB2 15 HO2 14 VS2 13 LO2 8 HO3 9 12 VDD 11 GND VB3 10 FAN7888 Rev.00 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name Description 1 HIN1 Logic input 1 for high-side gate 1 driver 2 LIN1 Logic input 1 for low-side gate 1 driver 3 HIN2 Logic input 2 for high-side gate 2 driver 4 LIN2 Logic input 2 for low-side gate 2 driver 5 HIN3 Logic input 3 for high-side gate 3 driver 6 LIN3 Logic input 3 for low-side gate 3 driver 7 LO3 Low-side gate driver 3 output 8 VS3 High-side driver 3 floating supply offset voltage 9 HO3 High-side driver 3 gate driver output 10 VB3 High-side driver 3 floating supply voltage 11 GND Ground 12 VDD Logic and all low-side gate drivers power supply voltage 13 LO2 Low-side gate driver 2 output 14 VS2 High-side driver 2 floating supply offset voltage 15 HO2 High-side driver 2 gate driver output 16 VB2 High-side driver 2 floating supply voltage 17 LO1 Low-side gate driver 1 output 18 VS1 High-side driver 1 floating supply offset voltage 19 HO1 High-side driver 1 gate driver output 20 VB1 High-side driver 1 floating supply voltage © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified. Symbol Parameter Min. Max. Unit -0.3 225.0 V VB High-side Floating Supply Voltage of VB1,2,3 VS High-side Floating Supply Offset Voltage of VS1,2,3 VB1,2,3-25 VB1,2,3+0.3 V High-side Floating Output Voltage VS1,2,3-0.3 VB1,2,3+0.3 V VHO1,2,3 VDD VLO1,2,3 VIN dVS/dt Low-side and Logic-fixed Supply Voltage -0.3 25.0 V Low-side Output Voltage -0.3 VDD+0.3 V Logic Input Voltage (HIN1,2,3 and LIN1,2,3) -0.3 VDD+0.3 V 50 V/ns Allowable Offset Voltage Slew Rate Dissipation(1)(2)(3) PD Power θJA Thermal Resistance, Junction-to-ambient TJ Junction Temperature TS Storage Temperature -55 1.8 W 80 °C/W +150 °C +150 °C Notes: 1. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 2. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages. 3. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter VB1,2,3 High-side Floating Supply Voltage VS1,2,3 High-side Floating Supply Offset Voltage VDD Supply Voltage Min. Max. Unit VS1,2,3+10 VS1,2,3+20 V 6-VDD 200 V 10 20 V VHO1,2,3 High-side Output Voltage VS1,2,3 VB1,2,3 V VLO1,2,3 Low-side Output Voltage GND VDD V VIN Logic Input Voltage (HIN1,2,3 and LIN1,2,3) GND VDD V TA Ambient Temperature -40 +125 °C © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 www.fairchildsemi.com 4 FAN7888 — 3 Half-Bridge Gate-Drive IC Absolute Maximum Ratings VBIAS (VDD, VBS1,2,3) = 15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to GND and VS1,2,3 and are applicable to the respective outputs LO1,2,3 and HO1,2,3. Symbol Characteristics Condition Min. Typ. Max. Unit LOW SIDE POWER SUPPLY SECTION Quiescent VDD Supply Current VLIN1,2,3=0V or 5V 160 350 µA IPDD1,2,3 Operating VDD Supply Current for each Channel fLIN1,2,3=20kHz, rms Value 500 900 µA VDDUV+ VDD Supply Under-Voltage Positive-going Threshold VDD=Sweep, VBS=15V 7.2 8.2 9.0 V VDDUV- VDD Supply Under-Voltage Negative-going Threshold VDD=Sweep, VBS=15V 6.8 7.8 8.5 V VDDHYS VDD Supply Under-Voltage Lockout Hysteresis VDD=Sweep, VBS=15V 0.4 IQDD V BOOTSTRAPPED POWER SUPPLY SECTION IQBS1,2,3 Quiescent VBS Supply Current for each Channel VHIN1,2,3=0V or 5V 50 120 µA IPBS1,2,3 Operating VBS Supply Current for each Channel fHIN1,2,3=20kHz, rms Value 400 800 µA VBSUV+ VBS Supply Under-Voltage Positive-going Threshold VDD=15V, VBS=Sweep 7.2 8.2 9.0 V VBSUV- VBS Supply Under-Voltage Negative-going Threshold VDD=15V, VBS=Sweep 6.8 7.8 8.5 V VBSHYS VBS Supply Under-Voltage Lockout Hysteresis VDD=15V, VBS=Sweep Offset Supply Leakage Current VB1,2,3=VS1.2.3=200V ILK 0.4 V 10 µA GATE DRIVER OUTPUT SECTION VOH High-level Output Voltage, VBIAS-VO IO=20mA 1.0 V VOL Low-level Output Voltage, VO IO=20mA 0.6 V IO+ Output HIGH Short-circuit Pulsed Current(4) Current(4) IO- Output LOW Short-circuit Pulsed VS Allowable Negative VS Pin Voltage for IN Signal Propagation to HO VO=0V, VIN=5V with PW<10µs 250 350 mA VO=15V, VIN=0V with PW<10µs 500 650 mA -9.8 -7.0 V LOGIC INPUT SECTION (HIN, LIN) VIH Logic "1" Input Voltage 2.5 VIL Logic "0" Input Voltage IIN+ Logic "1" Input Bias Current VIN=5V IIN- Logic "0" Input Bias Current(4) VIN=0V RIN Input Pull-down Resistance V 25 100 200 1.0 V 50 µA 2.0 µA 300 KΩ Note: 4. This parameter is guaranteed by design. © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 www.fairchildsemi.com 5 FAN7888 — 3 Half-Bridge Gate-Drive IC Electrical Characteristics TA=25°C, VBIAS (VDD, VBS1,2,3) = 15.0V, VS1,2,3 = GND, CLoad = 1000pF unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit tON Turn-on Propagation Delay VS1,2,3=0V 130 tOFF Turn-off Propagation Delay VS1,2,3=0V 220 ns 150 240 ns tR Turn-on Rise Time 50 120 ns tF Turn-off Fall Time 30 80 ns 50 ns MT1 Turn-on Delay Matching I tON(H) -tOFF(L) I MT2 Turn-off Delay Matching I tOFF(H) -tON(L) I DT MDT Dead Time 100 Dead-time Matching I tDT1 -tDT2 I © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 270 50 ns 440 ns 60 ns www.fairchildsemi.com 6 FAN7888 — 3 Half-Bridge Gate-Drive IC Dynamic Electrical Characteristics 300 250 250 tOFF [ns] tON [ns] 200 150 200 150 100 100 50 0 -40 50 -20 0 20 40 60 80 100 0 -40 120 -20 0 Figure 4. Turn-on Propagation Delay vs. Temp. 40 60 80 100 120 Figure 5. Turn-off Propagation Delay vs. Temp. 120 100 100 80 80 tF [ns] tR [ns] 20 Temperature [°C] Temperature [°C] 60 60 40 40 20 20 0 -40 -20 0 20 40 60 80 100 0 -40 120 -20 0 Temperature [°C] 50 50 40 40 30 20 10 10 0 20 40 60 80 100 0 -40 120 Temperature [°C] 80 100 120 -20 0 20 40 60 80 100 120 Temperature [°C] Figure 8. Turn-on Delay Matching vs. Temp. © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 60 30 20 -20 40 Figure 7. Turn-off Fall Time vs. Temp. MT2 [ns] MT1 [ns] Figure 6. Turn-on Rise Time vs. Temp. 0 -40 20 Temperature [°C] Figure 9. Turn-off Delay Matching vs. Temp. www.fairchildsemi.com 7 FAN7888 — 3 Half-Bridge Gate-Drive IC Typical Characteristics 500 60 50 MDT [ns] DT [ns] 400 300 40 30 20 200 10 100 -40 -20 0 20 40 60 80 100 0 -40 120 -20 0 Temperature [°C] 350 120 300 100 250 200 150 80 100 120 80 60 20 50 -20 0 20 40 60 80 100 0 -40 120 -20 0 Temperature [°C] 800 800 IPBS [μA] 1000 600 400 200 200 20 40 60 80 100 0 -40 120 Temperature [°C] 80 100 120 -20 0 20 40 60 80 100 120 Temperature [°C] Figure 14. Operating VDD Supply Current vs. Temp. © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev. 1.0.0 60 600 400 0 40 Figure 13. Quiescent VBS Supply Current vs. Temp. 1000 -20 20 Temperature [°C] Figure 12. Quiescent VDD Supply Current vs. Temp. IPDD [μA] 60 40 100 0 -40 40 Figure 11. Dead-Time Matching vs. Temp. IQBS [μA] IQDD [μA] Figure 10. Dead Time vs. Temp. 0 -40 20 Temperature [°C] Figure 15. Operating VBS Supply Current vs. Temp. www.fairchildsemi.com 8 FAN7888 — 3 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 9.0 8.5 8.5 VDDUV- [V] VDDUV+ [V] 9.0 8.0 7.5 7.0 -40 8.0 7.5 -20 0 20 40 60 80 100 7.0 -40 120 -20 0 Temperature [°C] 9.0 9.0 8.5 8.5 8.0 7.5 80 100 120 7.5 -20 0 20 40 60 80 100 7.0 -40 120 -20 0 20 40 60 80 100 120 Temperature [°C] Figure 18. VBS UVLO+ vs. Temp. Figure 19. VBS UVLO- vs. Temp. 0.60 1.0 0.8 0.45 0.6 VOL [V] VOH [V] 60 8.0 Temperature [°C] 0.4 0.30 0.15 0.2 0.0 -40 40 Figure 17. VDD UVLO- vs. Temp. VBSUV- [V] VBSUV+ [V] Figure 16. VDD UVLO+ vs. Temp. 7.0 -40 20 Temperature [°C] -20 0 20 40 60 80 100 0.00 -40 120 Temperature [°C] 0 20 40 60 80 100 120 Temperature [°C] Figure 20. High-Level Output Voltage vs. Temp. © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev. 1.0.0 -20 Figure 21. Low-Level Output Voltage vs. Temp. www.fairchildsemi.com 9 FAN7888 — 3 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 3.0 2.5 2.5 2.0 2.0 VIL [V] VIH [V] 3.0 1.5 1.5 1.0 1.0 0.5 0.5 0.0 -40 -20 0 20 40 60 80 100 0.0 -40 120 -20 0 Temperature [°C] 50 -7 40 -8 30 -9 20 -10 10 -11 -20 0 20 40 60 40 60 80 100 120 Figure 23. Logic Low Input Voltage vs. Temp. VS [V] IIN+ [μA] Figure 22. Logic High Input Voltage vs. Temp. 0 -40 20 Temperature [°C] 80 100 -12 -40 120 Temperature [°C] -20 0 20 40 60 80 100 120 Temperature [°C] Figure 24. Logic Input High Bias Current vs. Temp. Figure 25. Allowable Negative VS Voltage vs. Temp. 500 RIN [kΩ] 400 300 200 100 0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Figure 26. Input Pull-down Resistance vs. Temp. © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev. 1.0.0 www.fairchildsemi.com 10 FAN7888 — 3 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 1. Protection Function 2. Operational Notes 1.1 Under-Voltage Lockout (UVLO) The FAN7888 is a three half-bridge gate driver with internal typically 120ns dead-time for the three-phase Brushless DC (BLDC) motor drive system, as shown in Figure 1. The high- and low-side drivers include under-voltage lockout (UVLO) protection circuitry for each channel that monitors the supply voltage (VDD) and bootstrap capacitor voltage (VBS1,2,3) independently. It can be designed prevent malfunction when VDD and VBS1,2,3 are lower than the specified threshold voltage. The UVLO hysteresis prevent chattering during power supply transitions. Figure 29 shows a switching sequence of 120° electrical commutation for a three-phase BLDC motor drive system. The waveforms are idealized: they assumed that the generated back EMF waveforms are trapezoidal with flat tops of sufficient width to produce constant torque when the line currents are perfectly rectangular 120° electrical degrees with the switching sequence as shown in Figure 29. The operating waveforms of the wey-connection reveal that repeat every 60 electrical degrees, with each 60° segment being “commutated” to another phase, as shown in Figure 29. 1.2 Shoot-Through Prevention Function The FAN7888 has shoot-through prevention circuitry monitoring the high- and low-side control inputs. It can be designed to prevent outputs of high and low side from turning on at same time, as shown Figure 27 and 28. HIN1,2,3/LIN1,2,3 LIN1,2,3/HIN1,2,3 Shoot-Through Prevent HO1,2,3/LO1,2,3 After DT LO1,2,3/HO1,2,3 After DT FAN7888 Rev.00 Figure 27. Waveforms for Shoot-Through Prevention HIN1,2,3/LIN1,2,3 LIN1,2,3/HIN1,2,3 Shoot-Through Prevent HO1,2,3/LO1,2,3 After DT LO1,2,3/HO1,2,3 FAN7888 Rev.00 Figure 28. Waveforms for Shoot-Through Prevention © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 www.fairchildsemi.com 11 FAN7888 — 3 Half-Bridge Gate-Drive IC Application Information -30 0 30 60 90 120 150 180 210 240 270 300 330 Elec o Input / Output HIN / HO1,2,3 Q5 (HIN3) Q1 (HIN1) Q3 (HIN2) Q6 (LIN2) LIN / LO1,2,3 Q5 (HIN3) Q2 (LIN3) Q4 (LIN1) Phase Current IU IV IW Phase Voltage VS1 Phase Back EMF VS2 VS3 Current Flow Direction U V W U V W U V W U V W U V W U V W Figure 29. 120° Commutation Operation Waveforms for 3-Phase BLDC Motor Application Switching Time Definitions HIN1,2,3 /LIN1,2,3 50% 50% tON(H) tOFF(H) tF tR 90% 90% HO1,2,3 10% 10% MT1 90% LO1,2,3 MT2 90% tOFF(L) tON(L) 10% 10% Figure 30. Switching Time Definition © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev. 1.0.0 www.fairchildsemi.com 12 FAN7888 — 3 Half-Bridge Gate-Drive IC Application Information (Continued) . 13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 PIN ONE INDICATOR 10 0.51 0.35 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO pdip8_dim.pdf ASME Y14.5M-1994 1.27 0.40 SEATING PLANE E) LANDPATTERN STANDARD: SOIC127P1030X265-20L (1.40) DETAIL A F) DRAWING FILENAME: MKT-M20BREV3 SCALE: 2:1 MKT-M20BREV3 Figure 31. 20-Lead Small Outline Package (SOIC) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev.1.0.0 www.fairchildsemi.com 13 FAN7888 — 3 Half-Bridge Gate-Drive IC Mechanical Dimensions FAN7888 — 3 Half-Bridge Gate-Drive IC © 2008 Fairchild Semiconductor Corporation FAN7888 • Rev. 1.0.0 www.fairchildsemi.com 14