IP3337CX18 7-channel integrated LC-filter network with ESD input protection to IEC 61000-4-2 level 4 Rev. 01 — 12 November 2008 Product data sheet 1. Product profile 1.1 General description The IP3337CX18 is a 7-channel1 LC low-pass filter network designed to filter undesired RF signals in the 800 MHz to 3000 MHz frequency band. In addition, the IP3337CX18 incorporates diodes which protect downstream components from ElectroStatic Discharge (ESD) voltages as high as 15 kV. The IP3337CX18 is fabricated using monolithic silicon technology and integrates 7 inductors, 14 back-to-back diodes in a single Wafer-Level Chip-Scale Package (WLCSP) measuring 2.06 mm by 1.66 mm (typical). These features make the IP3337CX18 ideal for use in applications requiring the utmost in miniaturization such as mobile phone handsets, cordless telephones and personal digital devices. 1.2 Features n n n n Pb-free, RoHS compliant and halogen free package; Dark Green compliant Integrated 7-channel π-type LC-filter network with 60 nH channel inductance 125 Ω series resistance, 25 pF (typical) capacitance per line Integrated ESD protection withstanding ±15 kV contact discharge, far exceeding IEC 61000-4-2, level 4 n WLCSP with 0.4 mm pitch 1.3 Applications n Cellular and PCS mobile handsets n Cordless telephones n Wireless data (WAN/LAN) systems and PDAs 1. Also available as a 10-channel device (IP3338CX24). IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 2. Pinning information 2.1 Pinning ball A1 index IP3337CX18/LF 1 2 3 4 5 A B C D 001aai833 Transparent top view Fig 1. Pin configuration IP3337CX18 Table 1. Pinning Pin Description A2 and A5 filter channel 1 A1 and A4 filter channel 2 B1 and B5 filter channel 3 C2 and C5 filter channel 4 C1 and C4 filter channel 5 D2 and D5 filter channel 6 D1 and D4 filter channel 7 A3, B3, C3, D3 ground B2 and B4 no balls 3. Ordering information Table 2. Ordering information Type number IP3337CX18/LF Package Name Description Version WLCSP18 wafer level chip-size package; 18 bumps; 2.06 × 1.66 × 0.61 mm IP3337CX18/LF IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 2 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 4. Functional diagram A1, A2, B1, C1, C2, D1, D2 Ls(ch) Rs(ch) A4, A5, B5, C4, C5, D4, D5 A3, B3, C3, D3 001aai748 Fig 2. Schematic diagram IP3337CX18 5. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VI input voltage VESD electrostatic discharge voltage Conditions Min Max Unit −4.0 +4.0 V all pins to ground contact discharge [1] −15 +15 kV air discharge [1] −15 +15 kV contact discharge −8 +8 kV air discharge −15 +15 kV IEC 61000-4-2, level 4; all pins to ground Ich channel current (DC) Tamb = 70 °C - 10 mA Ich(M) peak channel current Tamb = 70 °C; 60 s - 50 mA Pch channel power dissipation continuous power; Tamb = 70 °C - 10 mW Ptot total power dissipation Tamb = 70 °C - 70 mW Tstg storage temperature −55 +150 °C - 260 °C −35 +85 °C Treflow(peak) peak reflow temperature Tamb [1] 10 s maximum ambient temperature Device tested with 1000 pulses of ±15 kV contact discharges, according to the IEC 61000-4-2 model, which far exceeds IEC 61000-4-2, level 4 (8 kV contact discharge). IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 3 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 6. Characteristics Table 4. Channel characteristics Tamb = 25 °C; unless otherwise specified. Symbol Parameter Rs(ch) channel series resistance Cch channel capacitance Ls(ch) channel series inductance VBR breakdown voltage [1] Min Typ Max Unit f = 0 Hz (DC) 100 125 150 Ω - 25 30[1] pF - 60 - nH Itest = 1 mA 6 - 10 V Itest = −1 mA −10 - −6 V per channel; VI = 3.0 V - - 100 nA Min Typ Max Unit 800 MHz < f < 1 GHz 38 40 - dB 1 GHz < f < 3 GHz 35 40 - dB at 0 Hz; Rgen = 50 Ω; RL = 50 Ω; Vbias(DC) = 0 V 6 7 10 dB Vbias(DC) = 0 V; f = 1 MHz [1] reverse leakage current ILR Conditions Guaranteed by design. Table 5. Frequency characteristics Tamb = 25 °C; unless otherwise specified. Symbol Parameter Conditions αil Rgen = 50 Ω; RL = 50 Ω insertion loss f−3dB cut-off frequency measured relative to insertion loss at DC; Rgen = 50 Ω; RL = 50 Ω 150 180 - MHz αct crosstalk attenuation 800 MHz < f < 3 GHz; Rgen = 50 Ω; RL = 50 Ω 35 40 - dB 7. Application information 7.1 Insertion loss The setup for measuring insertion loss in a 50 Ω system is shown in Figure 3. IN DUT OUT 50 Ω 50 Ω TEST BOARD Vgen 001aai755 Fig 3. Frequency response measurement configuration The measured frequency response curves for all channels are shown in Figure 4. IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 4 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 001aai749 0 αil (dB) −10 −20 −30 −40 (1) (2) (3) −50 −60 −70 10−1 1 102 10 103 104 f (MHz) (1) Channel 2 (pins A1 and A4). (2) Channel 5 (pins C1 and C4). (3) Channel 7 (pins D1 and D4). Fig 4. Measured frequency response curves 7.2 Crosstalk The setup for measuring crosstalk in a 50 Ω system is shown in Figure 5. IN_1 50 Ω DUT IN_2 50 Ω OUT_2 OUT_1 TEST BOARD 50 Ω 50 Ω Vgen 001aai756 Fig 5. Crosstalk measurement configuration The crosstalk between adjacent channels within the IP3337CX18 for different channel pairs measured in a 50 Ω NetWork Analyzer (NWA) system, is shown in Figure 6. In all cases, all unused connections are terminated with 50 Ω to ground. IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 5 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection αct 001aai750 0 −10 −20 −30 −40 (1) (2) (3) (4) −50 −60 −70 −80 −90 10−1 1 102 10 103 104 f (MHz) (1) Channels 2 and 5 (pins A1 and C4). (2) Channels 3 and 4 (pins B1 and C5). (3) Channels 3 and 6 (pins B1 and D5). (4) Channels 2 and 1 (pins A1 and A5). Fig 6. Measured crosstalk between adjacent channels 8. Marking pin A1 indicator LASER MARKING AREA 001aai893 top view, balls facing down Fig 7. Marking of IP3337CX18/LF IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 6 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 9. Package outline WLCSP18: wafer level chip-size package; 18 bumps; 2.06 x 1.66 x 0.61 mm A B D IP3337CX18/LF bump A1 index A2 E A A1 detail X e1 e b D e C e2 B A 1 2 3 4 5 X 0 1 Dimensions Unit mm 2 mm scale A A1 A2 b D E max 0.66 0.22 0.31 2.11 1.71 nom 0.61 0.20 0.41 0.26 2.06 1.66 min 0.56 0.18 0.21 2.01 1.61 e e1 e2 0.4 1.6 1.2 ip3337cx18_lf_po Outline version References IEC JEDEC JEITA Issue date 08-08-08 08-09-09 IP3337CX18/LF Fig 8. European projection Package outline IP3337CX18/LF (WLCSP18) IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 7 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 10. Packing information R1 R2 K1 ∅0 D1 0.1 E C D θ T A0 P B A T1 B 5° max G R3 W1 B1 B0 W F E A ∅ 0.2/40 D0 P2 P0 D E A-A K K0 0.1 E D C C A0 B-B Fig 9. 001aai751 Tape and reel information Table 6. Tape dimensions Item Parameter Overall dimensions Sprocket holes[1] Distance between center lines Specification (mm) Dimension Tolerance tape width W 8.00 ±0.3 thickness K 1.20 maximum distance G 0.75 minimum outside width B1 3.70 maximum diameter D0 1.50 +0.1/−0.0 distance E 1.75 ±0.1 pitch P0 4.00 ±0.1 length direction P2 2.00 ±0.05 width direction F 3.50 ±0.05 IP3337CX18_1 Product data sheet Symbol © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 8 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection Table 6. Tape dimensions …continued Item Parameter Compartments Device Carrier tape anti-static[2] Cover tape[3] Bending pad Specification (mm) Dimension Tolerance length A0 1.90 ±0.05 width B0 2.35 ±0.05 depth K0 0.80 ±0.05 hole diameter D1 0.50 ±0.1 pitch P 4.00 ±0.1 radius R1 0.40 maximum radius R2 0.30 maximum radius R3 0.30 typical depth K1 0...0.25 −0.1 rotation θ ±10° film thickness T 0.25 ±0.07 width W1 5.75 max film thickness T1 0.1 max in winding direction R 30 min [1] Cumulative pitch error: ±0.2 mm per 10 pitches. [2] Carbon-loaded polystyrene 100 % recyclable. [3] The cover tape must not overlap the sprocket holes. IP3337CX18_1 Product data sheet Symbol © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 9 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 11. Design and assembly recommendations 11.1 PCB design guidelines For optimum performance it is recommended to use a Non-Solder Mask PCB Design (NSMD), also known as a copper-defined design, incorporating laser-drilled micro-vias connecting the ground pads to a buried ground-plane layer. This results in the lowest possible ground inductance and provides the best high frequency and ESD performance. For this case, refer to Table 7 for the recommended PCB design parameters. Table 7. Recommended PCB design parameters Parameter Value or Specification PCB pad diameter 200 µm Micro-via diameter 100 µm (0.004 inch) Solder mask aperture diameter 337 µm Copper thickness 20 µm to 40 µm Copper finish OSP PCB material FR4 11.2 PCB assembly guidelines for Pb-free soldering Table 8. Assembly recommendations Parameter Value or Specification Solder screen aperture diameter 330 µm Solder screen thickness 100 µm (0.004 inch) Solder paste: Pb-free SnAg (3 % to 4 %) Cu (0.5 % to 0.9 %) Solder/flux ratio 50/50 Solder reflow profile see Figure 10 T (°C) Treflow(peak) 250 230 cooling rate 217 pre-heat t1 t2 t3 t4 t (s) t5 001aai943 The device is capable of withstanding at least three reflows of this profile. Fig 10. Pb-free solder reflow profile IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 10 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection Table 9. Symbol Characteristics Parameter Conditions Treflow(peak) peak reflow temperature Min Typ Max Unit 230 - 255 °C t1 time 1 soak time 60 - 180 s t2 time 2 time during T ≥ 250 °C - - 30 s t3 time 3 time during T ≥ 230 °C 10 - 50 s t4 time 4 time during T > 217 °C 30 - 150 s t5 time 5 dT/dt rate of change of temperature - - 540 s cooling rate - - −6 °C/s pre-heat 2.5 - 4.0 °C/s 12. Abbreviations Table 10. Abbreviations Acronym Description DUT Device Under Test EMI ElectroMagnetic Interference ESD ElectroStatic Discharge FR4 Flame Retard 4 LAN Local Area Network NSMD Non-Solder Mask Design OSP Organic Solderability Preservative PCB Printed-Circuit Board PCS Personal Communication System PDA Personal Digital Assistant PSU Power Supply Unit RoHS Restriction of Hazardous Substances WAN Wide Area Network WLCSP Wafer-Level Chip-Scale Package 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes IP3337CX18_1 20081112 Product data sheet - - IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 11 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 14.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] IP3337CX18_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 12 November 2008 12 of 13 IP3337CX18 NXP Semiconductors 7-channel integrated LC-filter network with ESD input protection 16. Contents 1 1.1 1.2 1.3 2 2.1 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 12 13 14 14.1 14.2 14.3 14.4 15 16 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Application information. . . . . . . . . . . . . . . . . . . 4 Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 Packing information. . . . . . . . . . . . . . . . . . . . . . 8 Design and assembly recommendations . . . 10 PCB design guidelines . . . . . . . . . . . . . . . . . . 10 PCB assembly guidelines for Pb-free soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 12 November 2008 Document identifier: IP3337CX18_1