Data Sheet

IP4035CX24
10-channel integrated filter network with ESD input protection
to IEC 61000-4-2 level 4
Rev. 01 — 12 February 2010
Product data sheet
1. Product profile
1.1 General description
The IP4035CX24 is a 10-channel RC low-pass filter array which is designed to provide
filtering of undesired RF signals. In addition, the IP4035CX24 incorporates diodes to
provide protection to downstream components from ElectroStatic Discharge (ESD)
voltages as high as ±30 kV contact according the IEC 61000-4-2 standard, far exceeding
level 4.
The IP4035CX24 is fabricated using monolithic silicon technology and integrates
10 resistors and 20 diodes in a single Wafer-Level Chip-Scale Package (WLCSP).
These features make the IP4035CX24 ideal for use in applications requiring the utmost in
miniaturization such as mobile phone handsets, cordless telephones and personal digital
devices.
1.2 Features and benefits
„
„
„
„
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
10-channel integrated π-type RC filter network
1 kΩ series resistance; 100 pF (typical) channel capacitance
Integrated ESD protection withstanding ±30 kV contact discharge, far exceeding
IEC 61000-4-2 level 4
„ WLCSP with 0.5 mm pitch
1.3 Applications
Reduce ElectroMagnetic Interference (EMI) and Radio Frequency Interference (RFI) and
provide downstream ESD protection for:
„ Cellular and Personal Communication System (PCS) mobile handsets
„ Cordless telephones
„ Other appliances with low frequency signals (e.g. keypads)
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
2. Pinning information
2.1 Pinning
bump A1
index area
1
2
3
4
5
A
B
C
D
E
008aaa191
transparent top view,
solder balls facing down
Fig 1.
Pin configuration IP4035CX24
2.2 Pin description
Table 1.
IP4035CX24_1
Product data sheet
Pinning
Pin
Description
B1 and D1
filter channel 1
A2 and D2
filter channel 2
B2 and D3
filter channel 3
A5 and D4
filter channel 4
B5 and D5
filter channel 5
C1 and E1
filter channel 6
C2 and E2
filter channel 7
C3 and E3
filter channel 8
C4 and E4
filter channel 9
C5 and E5
filter channel 10
A3, A4, B3, B4
ground
A1
no ball
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
2 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
3. Ordering information
Table 2.
Ordering information
Type number
IP4035CX24
Package
Name
Description
Version
WLCSP24
wafer level chip-size package; 24 bumps; 2.45 × 2.41 × 0.65 mm
IP4035CX24
4. Functional diagram
A2, A5, B1, B2, B5,
C1, C2, C3, C4, C5
Rs(ch)
D1, D2, D3, D4, D5,
E1, E2, E3, E4, E5
A3, A4, B3, B4
Fig 2.
008aaa192
Schematic diagram IP4035CX24
5. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VI
input voltage
VESD
electrostatic discharge voltage all pins to ground
Min
Max
Unit
−0.5
+5.5
V
contact discharge
[1]
−30
+30
kV
air discharge
[1]
−30
+30
kV
contact discharge
−8
+8
kV
air discharge
−15
+15
kV
IEC 61000-4-2 level 4;
all pins to ground
Ich
channel current (DC)
current flow between
external and internal
pins
-
7
mA
Pch
channel power dissipation
continuous power
-
42
mW
Ptot
total power dissipation
continuous power
-
420
mW
Tstg
storage temperature
−55
+150
°C
-
260
°C
−45
+85
°C
Treflow(peak) peak reflow temperature
Tamb
[1]
IP4035CX24_1
Product data sheet
10 s maximum
ambient temperature
Device is qualified with 1 000 pulses of ±15 kV contact discharges each, according to the IEC 61000-4-2
model and far exceeds the specified level 4 (8 kV contact discharge).
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
3 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
6. Characteristics
Table 4.
Channel characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
900
1 000
1100
Ω
Rs(ch)
channel series resistance
Cch
channel capacitance
Vbias(DC) = 0 V; f = 1 MHz
40
50
60
pF
VBR
breakdown voltage
Itest = 1 mA
6
-
15
V
ILR
reverse leakage current
per channel; VI = 3.0 V
-
-
20
nA
Table 5.
Frequency characteristics
Tamb = 25 °C; unless otherwise specified.
IP4035CX24_1
Product data sheet
Symbol Parameter
Conditions
Min
Typ
Max
Unit
αil
insertion loss
800 MHz < f < 3 GHz;
Rgen = 50 Ω; RL = 50 Ω
-
25
-
dB
αct
crosstalk attenuation
800 MHz < f < 3 GHz;
Rgen = 50 Ω; RL = 50 Ω
-
−25
-
dB
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
4 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
7. Application information
7.1 Insertion loss
The insertion loss measurement configuration of a typical 50 Ω NetWork Analyzer (NWA)
system for evaluation of the IP4035CX24 is shown in Figure 3.
The insertion loss of all channels for frequencies up to 6 GHz is displayed in Figure 4.
The insertion loss is measured with a test PCB utilizing laser drilled micro-via holes that
connect the PCB ground plane to the IP4035CX24 ground pins.
IN
OUT
DUT
50 Ω
50 Ω
TEST BOARD
Vgen
001aai755
Fig 3.
Frequency response measurement configuration
001aak011
0
s21
(dB)
−10
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
−20
−30
−40
−50
−60
−70
1
10
102
103
104
f (MHz)
(1) Channel 1 (pins B1 and D1).
(2) Channel 10 (pins C5 and E5).
(3) Channel 6 (pins C1 and E1).
(4) Channel 5 (pins B5 and D5).
(5) Channel 9 (pins C4 and E4).
(6) Channel 8 (pins C3 and E3).
(7) Channel 3 (pins B2 and D3).
(8) Channel 2 (pins A2 and D2).
(9) Channel 4 (pins A5 and D4).
(10) Channel 7 (pins C2 and E2).
Fig 4.
IP4035CX24_1
Product data sheet
Measured insertion loss magnitudes
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
5 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
7.2 Crosstalk
The crosstalk measurement configuration of a typical 50 Ω NWA system for evaluation of
the IP4035CX24 is shown in Figure 5.
The measured crosstalk within the IP4035CX24 in a 50 Ω NWA system from one channel
to another is shown in Figure 6 for two different pairs of channels representing both the
worst and the best case conditions in terms of physical distance. In both cases the signal
input pin is C1. While pin E2 is very close to the input, pin E5 is relatively far away. In all
cases, unused connections are terminated with 50 Ω to ground.
IN_1
50 Ω
OUT_2
DUT
IN_2
50 Ω
OUT_1
TEST BOARD
50 Ω
50 Ω
Vgen
001aai756
Fig 5.
Crosstalk measurement configuration
001aak010
0
αct
(dB)
−10
−20
−30
(1)
(2)
−40
−50
−60
−70
1
10
102
103
104
f (MHz)
(1) Channels 6 and 7 (pins C1 and E2).
(2) Channels 6 and 10 (pins C1 and E5).
Fig 6.
IP4035CX24_1
Product data sheet
Measured crosstalk between adjacent channels
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
6 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
8. Package outline
WLCSP24: wafer level chip-size package; 24 bumps (5 x 5 - A1)
D
bump A1
index area
A2
E
A
A1
detail X
e1
e
b
E
e
D
e1
C
B
A
European
projection
1
2
3
4
X
5
wlcsp24_5x5-a1_po
Fig 7.
Table 6.
Package outline IP4035CX24 (WLCSP24)
Dimensions for Figure 7
Symbol
Min
Typ
Max
Unit
A
0.60
0.65
0.70
mm
A1
0.22
0.24
0.26
mm
A2
0.38
0.41
0.44
mm
b
0.27
0.32
0.37
mm
D
2.40
2.45
2.50
mm
E
2.36
2.41
2.46
mm
e
-
0.5
-
mm
e1
-
2.0
-
mm
IP4035CX24_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
7 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
9. Design and assembly recommendations
9.1 PCB design guidelines
For optimum performance it is recommended to use a Non-Solder Mask PCB Design
(NSMD), also known as a copper-defined design, incorporating laser-drilled micro-vias
connecting the ground pads to a buried ground-plane layer. This results in the lowest
possible ground inductance and provides the best high frequency and ESD performance.
For this case, refer to Table 7 for the recommended PCB design parameters.
Table 7.
Recommended PCB design parameters
Parameter
Value or specification
PCB pad diameter
200 μm
Micro-via diameter
100 μm (0.004 inch)
Solder mask aperture diameter
370 μm
Copper thickness
20 μm to 40 μm
Copper finish
AuNi
PCB material
FR4
9.2 PCB assembly guidelines for Pb-free soldering
Table 8.
Assembly recommendations
Parameter
Value or specification
Solder screen aperture diameter
330 μm
Solder screen thickness
100 μm (0.004 inch)
Solder paste: Pb-free
SnAg (3 % to 4 %) Cu (0.5 % to 0.9 %)
Solder / flux ratio
50 / 50
Solder reflow profile
see Figure 8
T
(°C)
Treflow(peak)
250
230
cooling rate
217
pre-heat
t1
t2
t3
t4
t (s)
t5
001aai943
The device is capable of withstanding at least three reflows of this profile.
Fig 8.
IP4035CX24_1
Product data sheet
Pb-free solder reflow profile
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
8 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
Table 9.
Symbol
Characteristics
Parameter
Conditions
Treflow(peak) peak reflow temperature
Min
Typ
Max
Unit
230
-
260
°C
t1
time 1
soak time
60
-
180
s
t2
time 2
time during T ≥ 250 °C
-
-
30
s
t3
time 3
time during T ≥ 230 °C
10
-
50
s
t4
time 4
time during T > 217 °C
30
-
150
s
t5
time 5
dT/dt
rate of change of
temperature
-
-
540
s
cooling rate
-
-
−6
°C/s
pre-heat
2.5
-
4.0
°C/s
10. Abbreviations
Table 10.
Abbreviations
Acronym
Description
DUT
Device Under Test
EMI
ElectroMagnetic Interference
ESD
ElectroStatic Discharge
FR4
Flame Retard 4
NSMD
Non-Solder Mask PCB Design
PCB
Printed-Circuit Board
PCS
Personal Communication System
RFI
Radio Frequency Interference
RoHS
Restriction of Hazardous Substances
WLCSP
Wafer-Level Chip-Scale Package
11. Revision history
Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
IP4035CX24_1
20100212
Product data sheet
-
-
IP4035CX24_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
9 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Non-automotive qualified products — Unless the data sheet of an NXP
Semiconductors product expressly states that the product is automotive
qualified, the product is not suitable for automotive use. It is neither qualified
nor tested in accordance with automotive testing or application requirements.
NXP Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
IP4035CX24_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
10 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
IP4035CX24_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 February 2010
© NXP B.V. 2010. All rights reserved.
11 of 12
IP4035CX24
NXP Semiconductors
10-channel integrated filter network with ESD input protection
14. Contents
1
1.1
1.2
1.3
2
2.1
2.2
3
4
5
6
7
7.1
7.2
8
9
9.1
9.2
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application information. . . . . . . . . . . . . . . . . . . 5
Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Design and assembly recommendations . . . . 8
PCB design guidelines . . . . . . . . . . . . . . . . . . . 8
PCB assembly guidelines for Pb-free
soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 12 February 2010
Document identifier: IP4035CX24_1