NCP1596A 1.5 A, 1.5 MHz Current Mode PWM Buck Down Converter The NCP1596A is a current mode PWM buck converter with integrated power switch. It can provide up to 1.5 A output current with high conversion efficiency. High frequency PWM control scheme can provide a low output ripple noise. Thus, it allows the usage of small size passive components to reduce the board space. In a low load condition, the controller will automatically change to PFM mode which provides a higher efficiency at low load. Additionally, the device includes soft−start, thermal shutdown with hysteresis, cycle−by−cycle current limit, and short circuit protection. This device is available in a compact 3x3 DFN package. http://onsemi.com 1 6 PIN DFN 3x3 MN SUFFIX CASE 506AH Features • • • • • • • • • • • • • • • High Efficiency up to 90%, 1 A @ 3.3 V, 75% @ 1.2 V Fully Internal Compensation Low Output Voltage Ripple, 20 mV Typical ±1.5% Reference Voltage High PWM Switching Frequency, 1.5 MHz Automatic PWM / PFM Switchover at Light Load Built−in 1 ms Digital Soft Start Cycle−by−cycle Current Limit Thermal Shutdown with Hysteresis Internal UVLO Protection Ext. Adjustable Output Voltage Low Profile and Minimum External Components Designed for use with Ceramic Capacitor Compact 3x3 DFN Package These are Pb−Free Devices MARKING DIAGRAM 1 1596A ALYW G 1596A = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package PIN CONNECTIONS FB GND LX EN VCC VCCP (Top View) Typical Applications • Hard Disk Drives • USB Power Device • Wireless and DSL Modems ORDERING INFORMATION Device Package Shipping† NCP1596AMNTWG DFN6 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2009 June, 2009 − Rev. 0 1 Publication Order Number: NCP1596A/D NCP1596A L1 VIN = 4.0 V to 5.5 V NCP1596A D1 VCC C1 EN VOUT = 0.8 V to 0.9 x VIN LX VCCP GND R1 C2 FB R2 Figure 1. Typical Operating Circuit ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Power Supply (Pins 4, 5) VIN 6.0 −0.3 (DC) −1.0 (100 ns) V Input / Output Pins Pins 1, 3, 6 VIO 6.0 −0.3 (DC) −1.0 (100 ns) V PD RqJA 1450 68.5 mW °C/W Operating Junction Temperature Range (Note 4) TJ −40 to +150 °C Operating Ambient Temperature Range TA −40 to +85 °C Storage Temperature Range Tstg −55 to +150 °C 230 °C 1 − Thermal Characteristics 3x3 DFN Plastic Package Maximum Power Dissipation @ TA = 25°C Thermal Resistance Junction−to−Ambient 0 lfpm Lead Temperature Soldering (10 sec) Moisture Sensitivity Level (Note 3) MSL Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: ESD data available upon request. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) 2.0 kV per JEDEC standard: JESD22−A114. Machine Model (MM) 200 V per JEDEC standard: JESD22−A115. 2. Latch−up Current Maximum Rating: 150 mA per JEDEC standard: JESD78. 3. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A. 4. The maximum package power dissipation limit must not be exceeded. PD + T J(max) * T A R qJA http://onsemi.com 2 NCP1596A ELECTRICAL CHARACTERISTICS (VIN = 5.0 V, VOUT = 1.2 V, TA = 25°C for typical value, −40°C ≤ TA ≤ 85°C for min/max values unless otherwise noted) Symbol Min Typ Max Unit VIN 4.0 − 5.5 V Under Voltage Lockout Threshold VUVLO 3.2 3.5 3.8 V Under Voltage Lockout hysteresis VUVLO_HYS − 180 − mV PFET Leakage Current (Pins 5, 4) TA = 25°C TA = −40°C to 85°C ILEAK−P − − 1.0 − 10 15 Characteristic Operating Voltage mA FEEDBACK VOLTAGE FB Input Threshold (TA = −40°C to 85°C) VFB 0.788 0.800 0.812 V FB Input Current IFB − 10 100 nA Thermal Shutdown Threshold (Note 5) TSHDN − 160 − °C Hysteresis (Note 5) TSDHYS − 30 − °C FOSC 1.27 1.5 1.725 MHz THERMAL SHUTDOWN PWM SMPS MODE Switching Frequency (TA = −40°C to 85°C) Internal PFET ON−Resitance (ILX = 100 mA, VIN = 5.0 V, TA = 25°C) (Note 5) RDS(on)_P − 0.2 0.3 Ohm Minimum Duty Cycle DMIN − 0 − % Maximum Duty Cycle DMAX − 100 − % Soft−Start Time (VIN = 5.0 V, Vo = 1.2 V, ILOAD = 0 mA, TA = 25°C) TSS 0.8 1.0 1.2 ms Main PFET Switch Current Limit (Note 5) ILIM 2.0 2.5 − A Enable Threshold High VEN_H 1.8 − − V Enable Threshold Low VEN_L − − 0.4 V IEN − 500 − nA Output Load Current 10 mA @ 1.2 V (Note 5) h − 50 − % Output Load Current 100 mA to 1.2 A @ 1.2 V (Note 5) h − 70 − % Quiescent Current Into VCCP (VIN = 5 V, VFB = 1.0 V, TA = 25°C) ICCP − 10 − mA Quiescent Current Into VCC (VIN = 5 V, VFB = 1.0 V, TA = 25°C) ICC − 500 − mA ICC_SD − 1.0 3.0 mA ENABLE Enable bias current (EN = 0 V) EFFICIENCY TOTAL DEVICE Shutdown Quiescent Current into VCC and VCCP (EN = 0, VIN = 5 V, VFB = 1.0 V, TA = 25°C) 5. Values are design guaranteed. http://onsemi.com 3 NCP1596A PIN FUNCTION DESCRIPTIONS Pin # Symbol 1 FB 2 GND 3 LX 4 VCCP 5 VCC 6 EN Pin Description Feedback pin. Part is internally compensated. Only necessary to place a voltage divider or connect the output directly to this pin. Ground Pin connected internally to power switch. Connect externally to inductor. Power connection to the power switch. IC power connection. Device Enable pin. This pin has an internal current source pull up. No connect is enable the device. With this pin pulled down below 0.8 V, the device is disabled and enters the shutdown mode. EN Vin C1 Isense UVLO VCC Thermal Shutdown Isense Short circuit protect VCCP disable 500 nA Oscillator Vout = 0.8 V to 0.9 V * Vin Soft Start S FB Q L1 LX driver R 0.8 V Q R1 Ton(min) D1 GND R2 C2 Figure 2. Detail Block Diagram EXTERNAL COMPONENT REFERENCE DATA VOUT Inductor Model Inductor (L1) Diode (D1) CIN (C1) COUT (C2) R1 R2 3.3 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH MBRA210LT3G 22 mF 22 mF x 2 22 mF 22 mF x 2 31 k 10 k 2.5 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH MBRA210LT3G 22 mF 22 mF x 2 22 mF 22 mF x 2 21 k 10 k 1.5 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH MBRA210LT3G 22 mF 22 mF x 2 22 mF 22 mF x 2 8k 10 k 1.2 V CDC5D23 3R3 (1 A) CDRH6D38 3R3 (1.5 A) 3.3 mH MBRA210LT3G 22 mF 22 mF x 2 22 mF 22 mF x 2 5k 10 k http://onsemi.com 4 NCP1596A 3.8 V 3.5 V VIN TIME 1 ms/div VOUT 1 ms 5V EN EN 1.8 V 0.4 V TIME 1 ms/div Figure 3. Timing Diagram Power up the device VCC > 3 V Enable the internal Vref NO VCC > UVLO YES YES Enable Oscillator, OTA and driver Ramp up Soft start (1 ms) YES Disable the Oscillator, OTA and driver Temperature < 130 deg YES Current Limit > 2.5 A VCC < UVLO Temperature > 160 deg Normal Operation Figure 4. State Diagram http://onsemi.com 5 YES NO NCP1596A 0.5 806 VFB, FB INPUT THRESHOLD (V) RDS(on), SWITCH ON RESISTANCE (W) TYPICAL OPERATING CHARACTERISTICS 0.4 0.3 0.2 0.1 0.0 −40 0 25 800 798 796 Figure 5. Switch ON Resistance vs. Temperature Figure 6. Feedback Input Threshold vs. Temperature 1.52 1.50 1.48 1.46 0 25 85 3.0 2.5 2.0 1.5 1.0 0.5 −40 0 25 85 TA, AMBIENT TEMPERATURE (°C) ICC+_SD, SHUTDOWN QUIESCENT CURRENT (mA) Figure 7. Switching Frequency vs. Temperature 550 530 510 490 470 0 85 3.5 TA, AMBIENT TEMPERATURE (°C) ICC, QUIESCENT CURRENT INTO VCC (mA) 25 TA, AMBIENT TEMPERATURE (°C) 1.54 450 −40 0 TA, AMBIENT TEMPERATURE (°C) ILIM, MAIN P−FET CURRENT LIMIT (V) FOSC, SWITCH FREQUENCY (MHz) 802 794 −40 85 1.56 1.44 −40 804 25 85 TA, AMBIENT TEMPERATURE (°C) Figure 8. Main P−FET Current Limit vs. Temperature 500 450 400 350 300 250 −40 Figure 9. Quiescent Current Into VCC vs. Temperature 0 25 TA, AMBIENT TEMPERATURE (°C) Figure 10. Shutdown Quiescent Current vs. Temperature http://onsemi.com 6 85 1.5 100 1.0 90 OUTPUT EFFICIENCY (%) DVOUT, OUTPUT VOLTAGE CHANGE (%) NCP1596A 0.5 VIN = 5.0 V 0.0 VIN = 4.0 V −0.5 VOUT = 3.3 V L = 3.3 mH CIN = 22 mF COUT = 22 mF −1.0 −1.5 1 10 100 1000 VIN = 5.0 V 80 70 60 50 40 30 10 10000 VIN = 4.0 V VOUT = 3.3 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 100 OUTPUT CURRENT 1.5 100 1.0 90 0.5 VIN = 5.0 V VIN = 4.0 V −0.5 VOUT = 1.8 V L = 3.3 mH CIN = 22 mF COUT = 22 mF −1.0 −1.5 1 10 100 1000 80 VIN = 5.0 V 70 60 50 40 30 10 10000 VIN = 4.0 V VOUT = 1.8 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 100 OUTPUT CURRENT 1.0 90 OUTPUT EFFICIENCY (%) DVOUT, OUTPUT VOLTAGE CHANGE (%) 100 0.5 VIN = 5.0 V 0.0 −1.5 VIN = 4.0 V VOUT = 1.2 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 1 10 100 10000 Figure 14. Efficiency vs. Output Current 1.5 −1.0 1000 OUTPUT CURRENT Figure 13. Output Voltage Change vs. Output Current −0.5 10000 Figure 12. Efficiency vs. Output Current OUTPUT EFFICIENCY (%) DVOUT, OUTPUT VOLTAGE CHANGE (%) Figure 11. Output Voltage Change vs. Output Current 0.0 1000 OUTPUT CURRENT 1000 10000 VIN = 4.0 V 80 VIN = 5.0 V 70 60 50 40 30 10 OUTPUT CURRENT VOUT = 1.2 V L = 3.3 mH CIN = 22 mF COUT = 22 mF 100 1000 OUTPUT CURRENT Figure 16. Output Voltage Change vs. Output Current Figure 15. Efficiency vs. Output Current http://onsemi.com 7 10000 NCP1596A (VIN = 5 V, ILOAD = 10 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: Output Ripple Voltage, 20 mV/div Middle Trace: LX Pin Switching Waveform, 5 V/div Lower Trace: Inductor Current Waveform, 500 mA/div Time Base: 500 ns/div (VIN = 5 V, ILOAD = 500 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: Output Ripple Voltage, 20 mV/div Middle Trace: LX Pin Switching Waveform, 5 V/div Lower Trace: Inductor Current Waveform, 500 mA/div Time Base: 200 ns/div Figure 17. DCM Switching Waveform for VOUT = 3.3 V Figure 18. CCM Switching Waveform for VOUT = 3.3 V (VIN = 5 V, ILOAD = 10 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: Output Ripple Voltage, 20 mV/div Middle Trace: LX Pin Switching Waveform, 5 V/div Lower Trace: Inductor Current Waveform, 500 mA/div Time Base: 2 ms/div (VIN = 5 V, ILOAD = 500 mA, L = 3.3 mH, COUT = 20 mF) Upper Trace: Output Ripple Voltage, 20 mV/div Middle Trace: LX Pin Switching Waveform, 5 V/div Lower Trace: Inductor Current Waveform, 500 mA/div Time Base: 200 ns/div Figure 19. DCM Switching Waveform for VOUT = 1.2 V Figure 20. CCM Switching Waveform for VOUT = 1.2 V (VIN = 5 V, ILOAD = 10 mA, L = 3.3 mH, COUT = 20 mFx2) Upper Trace: Input Voltage, 1 V/div Lower Trace: Output Voltage, 1 V/div Time Base: 500 ms/div (VIN = 5 V, ILOAD = 10 mA, L = 3.3 mH, COUT = 20 mFx2) Upper Trace: Input Voltage, 1 V/div Lower Trace: Output Voltage, 500 mV/div Time Base: 500 ms/div Figure 21. Soft−Start Waveforms for VOUT = 3.3 V Figure 22. Soft−Start Waveforms for VOUT = 1.2 V http://onsemi.com 8 NCP1596A (VIN = 5 V, L = 3.3 mH, COUT = 10 mFx2) Upper Trace: Output Dynamic Voltage, 100 mV/div Lower Trace: Output Current, 200 mA/div Time Base: 20 ns/div (VIN = 5 V, L = 3.3 mH, COUT = 10 mFx2) Upper Trace: Output Dynamic Voltage, 100 mV/div Lower Trace: Output Current, 200 mA/div Time Base: 20 ns/div Figure 23. Load Regulation for VOUT = 3.3 V Figure 24. Load Regulation for VOUT = 3.3 V (VIN = 5 V, L = 3.3 H, COUT = 10 mFx2) Upper Trace: Output Dynamic Voltage, 50 mV/div Lower Trace: Output Current, 200 mA/div Time Base: 10 ns/div (VIN = 5 V, L = 3.3 H, COUT = 10 mF x 2) Upper Trace: Output Dynamic Voltage, 50 mV/div Lower Trace: Output Current, 200 mA/div Time Base: 10 ns/div Figure 25. Load Regulation for VOUT = 1.2 V Figure 26. Load Regulation for VOUT = 1.2 V http://onsemi.com 9 NCP1596A DETAILED OPERATING DESCRIPTION Introduction inside NCP1596A to overcome the potential instability. Slope compensation consists of a ramp signal generated by the synchronization block and adding this to the inductor current signal. The summed signal is then applied to the PWM comparator. The NCP1596A is a current−mode buck converter with switching frequency at 1.5 MHz. High operation frequency can reduce the capacitor value and PCB area. Also, more features are built in this converter. 1. Internal 1 ms soft−start to avoid inrush current at startup. 2. Internal cycle by cycle current limit provides an output short circuit protection. 3. Internal compensation. No external compensation components are necessary. 4. Thermal shutdown protects the devices from over heat. 5. 100% duty cycle allowed. Speed up transient load response. The upper feature can provide more cost effective solutions to applications. A simple function block diagram and timing diagram are shown in Figure 1 and Figure 2. Thermal Shutdown Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event when maximum junction temperature is exceeded. When activated, typically at 180°C, the shutdown signal will disable the P−channel switch. The thermal shutdown circuit is designed with 30°C of hysteresis. This means that the switching will not start until the die temperature drops by this amount. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended as a substitute for proper heat sinking. NCP1596A is contained in the thermally enhanced QFN package. Under Voltage Lockout (UVLO) Soft−Start and Current Limit UVLO function is used to ensure the logic level correctly when input voltage is very low. In NCP1596A, the UVLO level is set to 3.5 V. If the input voltage is less than 3.5 V, the converter will shutdown itself automatically. A soft start circuit is internally implemented to reduce the in−rush current during startup. This helps to reduce the output voltage over−shoot. The current limit is set to allow peak switch current in excess of 2 A. The intended output current of the system is 1.5 A. The ripple current is calculated to be approximately 350 mA with a 3.3 mH inductor. Therefore, the peak current at 1.5 A output will be approximately 1.7 Amps. A 2.5 Amp set point will allow for transient currents during load step. The current limit circuit is implemented as a cycle−by−cycle current limit. Each on−cycle is treated as a separate situation. Current limiting is implemented by monitoring the P−channel switch current buildup during conduction with a current limit comparator. The output of the current limit comparator resets the PWM latch, immediately terminating the current cycle. When output loading is short circuit, device will auto restart with soft−start. Low Power Shutdown Mode (EN) NCP1596A can be disabled whenever the EN pin is tied to ground. During the shutdown mode, the internal reference, oscillator and driver control circuits will be turn off, the device only consume 1 mA typically and output voltage will be discharge to zero by the external resistor divider. EN pin has an internal pull−up current source, which typical value is 500 nA. Power Saving Pulse−Frequency−Modulation (PFM) Control Scheme While the converter loading decreases, the converter enters the Discontinues−conduction−mode (DCM) operation. In DCM operation, the on−time (Ton) of the integrated switch for each switching cycle will decrease when the output current decreases. In order to maintain a high converter efficiency at light load condition. A minimum Ton is set to 70 ns. It can make sure a minimum fixed power send to output. To avoid a higher switch loss occurs when without loading apply. This control scheme can reduce the switching loss at light load and improve the conversion efficiency. Error Amplifier and Slope Compensation A fully internal compensated error amplifier is provided inside NCP1596A. No external circuitry is needed to stabilize the device. The error amplifier provides an error signal to the PWM comparator by comparing the feedback voltage (800 mV) with internal voltage reference of 1.2 V. Current mode converter can exhibit instability at duty cycles over 50%. A slope compensation circuit is provided http://onsemi.com 10 NCP1596A APPLICATION INFORMATION Output Voltage Selection ripple current, input voltage, output voltage, output current and operation frequency, the inductor value is given by: The output voltage is programmed through an external resistor divider connect from VOUT to FB then to GND. For internal compensation and noise immunity, the resistor from FB to GND should be in 10 k to 20 k ranges. The relationship between the output voltage and feedback resistor is given by: V OUT + V FB ǒ1 ) R1Ǔ R2 D IL + V OUT L F SW ǒ1 * VV Ǔ OUT (eq. 2) IN DIL : peak to peak inductor ripple current L: inductor value FSW: switching frequency After selected a suitable value of the inductor, it should be check out the inductor saturation current. The saturation current of the inductor should be higher than the maximum load plus the ripple current. (eq. 1) VOUT: Output voltage VFB: Feedback Voltage R1: Feedback resistor from VOUT to FB. R2: Feedback resistor from FB to GND. D IL(MAX) + D IOUT(MAX) ) Input Capacitor Selection DIL(MAX) DIOUT(MAX) In the PWM buck converter, the input current is pulsating current with switching noise. Therefore, a bypass input capacitor must choose for reduce the peak current drawn from the power supply. For NCP1596A, low ESR ceramic capacitor of 10 mF should be used for most of cases. Also, the input capacitor should be placed as close as possible to the VCCA pin for effective bypass the supply noise. D IL (eq. 3) 2 : Maximum inductor current : Maximum output current Output Capacitor Selection Output capacitor value is based on the target output ripple voltage. For NCP1596A, the output capacitor is required a ceramic capacitors with low ESR value. Assume buck converter duty cycle is 50%. The output ripple voltage in PWM mode is given by: Inductor Selection The inductor parameters are including three items, which are DC resistance, inductor value and saturation current. Inductor DC resistance will effect the convector overall efficiency, low DC resistor value can provide a higher efficiency. Thus, inductor value are depend on the inductor D VOUT [ D IL ǒ4 1 FSW C OUT Ǔ ) ESR (eq. 4) In general, value of ceramic capacitor using 20 mF should be a good choice. http://onsemi.com 11 NCP1596A PACKAGE DIMENSIONS DFN6 3*3 MM, 0.95 PITCH CASE 506AH−01 ISSUE O A D B ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ PIN 1 REFERENCE 2X NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMESNION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. E DIM A A1 A3 b D D2 E E2 e K L 0.15 C 2X 0.15 C TOP VIEW 0.10 C A 6X 0.08 C (A3) SIDE VIEW 6X SOLDERING FOOTPRINT* 0.450 0.0177 D2 L e 1 6X C A1 SEATING PLANE MILLIMETERS MIN NOM MAX 0.80 0.90 1.00 0.00 0.03 0.05 0.20 REF 0.35 0.40 0.45 3.00 BSC 2.40 2.50 2.60 3.00 BSC 1.50 1.60 1.70 0.95 BSC 0.21 −−− −−− 0.30 0.40 0.50 4X 0.950 0.0374 3 E2 K 1.700 0.0685 3.31 0.130 6 4 6X b (NOTE 3) 0.10 C A B BOTTOM VIEW 0.05 C 0.63 0.025 2.60 0.1023 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP1596A/D