CY62136VN MoBL® 2-Mbit (128K x 16) Static RAM Features portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). • Temperature Ranges — Industrial: –40°C to 85°C — Automotive-A: –40°C to 85°C — Automotive-E: –40°C to 125°C • High speed: 55 ns • Wide voltage range: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected • CMOS for optimum speed/power • Available in standard Pb-free 44-pin TSOP Type II, Pb-free and non Pb-free 48-ball FBGA packages Functional Description[1] The CY62136VN is a high-performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes. Logic Block Diagram PinConfigurations[3] TSOP II (Forward) Top View SENSE AMPS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 ROW DECODER DATA IN DRIVERS 128K x 16 RAM Array I/O0 – I/O7 I/O8 – I/O15 BHE WE CE OE BLE A14 A15 A16 A12 A13 A11 COLUMN DECODER A4 A3 A2 A1 A0 CE I/O 0 I/O 1 I/O 2 I/O 3 VCC VSS I/O 4 I/O 5 I/O 6 I/O 7 WE A 16 A 15 A 14 A 13 A12 1 44 2 3 43 42 4 41 40 39 38 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE BHE BLE I/O 15 I/O 14 I/O 13 I/O 12 VSS VCC I/O 11 I/O 10 I/O 9 I/O 8 NC A8 A9 A 10 A 11 NC Note: 1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 001-06510 Rev. *A • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised August 3, 2006 [+] Feedback CY62136VN MoBL® Product Portfolio Power Dissipation VCC Range (V) Product CY62136VNLL Operating, ICC (mA) Standby, ISB2 (µA) Min Typ.[2] Max Speed Ranges Typ.[2] Maximum Typ.[2] Maximum 2.7 3.0 3.6 55 55 Industrial 7 20 1 15 Automotive-A 7 20 1 15 70 Industrial 7 15 1 15 70 Automotive-A 7 15 1 15 70 Automotive-E 7 20 1 20 Pin Configurations[3] FBGA Top View 4 3 1 2 BLE OE A0 I/O8 BHE I/O9 5 6 A1 A2 NC A A3 A4 CE I/O0 B I/O10 A5 A6 I/O1 I/O2 C VSS I/O11 NC A7 I/O3 VCC D VCC I/O12 NC A16 I/O4 VSS E I/O14 I/O13 A14 A15 I/O5 I/O6 F I/O15 NC A12 A13 WE I/O7 G NC A8 A9 A10 A11 NC H Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C. 3. NC pins are not connected on the die. Document #: 001-06510 Rev. *A Page 2 of 12 [+] Feedback CY62136VN MoBL® Maximum Ratings Output Current into Outputs (LOW)............................ 20 mA Static Discharge Voltage........................................... > 2001V (per MIL-STD-883, Method 3015) (Above which the useful life may be impaired. For user guidelines, not tested.) Latch-up Current..................................................... > 200 mA Storage Temperature .................................. –65°C to +150°C Operating Range Ambient Temperature with Power Applied............................................. –55°C to +125°C Range Supply Voltage to Ground Potential ............... –0.5V to +4.6V Ambient Temperature [TA][5] VCC −40°C to +85°C 2.7V to 3.6V Industrial DC Voltage Applied to Outputs in High-Z State[4] ....................................–0.5V to VCC + 0.5V DC Input Voltage[4] .................................–0.5V to VCC + 0.5V Automotive-A –40°C to +85°C Automotive-E –40°C to +125°C Electrical Characteristics Over the Operating Range -55 Parameter Description Test Conditions Min. Typ.[2] -70 Max. Min. Typ.[2] Max. Unit 2.4 VOL Output HIGH Voltage VCC = 2.7V, IOH = −1.0 mA Output LOW Voltage VCC = 2.7V, IOL = 2.1 mA 0.4 V VIH Input HIGH Voltage 2.2 VCC + 0.5V 2.2 VCC + 0.5V V VIL Input LOW Voltage VCC = 2.7V IIX Input Leakage Current GND < VI < VCC VOH 2.4 0.4 VCC = 3.6V –0.5 0.8 –0.5 0.8 V Ind’l –1 +1 –1 +1 µA Auto-A –1 +1 –1 +1 µA –10 +10 µA Auto-E IOZ Output Leakage Current GND < VO < VCC, Output Disabled Ind’l –1 +1 –1 +1 µA Auto-A –1 +1 –1 +1 µA –10 +10 µA 15 mA Auto-E ICC VCC Operating Supply Current f = fMAX = 1/tRC VCC = 3.6V, Ind’l IOUT = 0 mA, Auto-A CMOS Levels Auto-E f = 1 MHz V 7 20 7 20 7 ISB2 Automatic CE Power-down Current— CMOS Inputs CE > VCC − 0.3V, VIN > VCC − 0.3V or VIN < 0.3V, f = fMAX Automatic CE Power-down Current— CMOS Inputs CE > VCC − 0.3V VIN > VCC − 0.3V or VIN < 0.3V, f = 0 15 20 Ind’l 1 2 1 2 Auto-A 1 2 1 2 Auto-E ISB1 7 7 1 mA 2 Ind’l 100 100 µA Auto-A 100 100 µA 100 µA µA Auto-E Ind’l 1 15 1 15 Auto-A 1 15 1 15 1 20 Auto-E Capacitance[6] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions Max. Unit TA = 25°C, f = 1 MHz, VCC = VCC(typ) 6 pF 8 pF Notes: 4. VIL(min) = –2.0V for pulse durations less than 20 ns. 5. TA is the “Instant-On” case temperature. 6. Tested initially and after any design or process changes that may affect these parameters. Document #: 001-06510 Rev. *A Page 3 of 12 [+] Feedback CY62136VN MoBL® Thermal Resistance[6] Parameter Description ΘJA Thermal Resistance (Junction to Ambient) ΘJC Thermal Resistance (Junction to Case) Test Conditions TSOPII FBGA Unit Still Air, soldered on a 4.25 x 1.125 inch, 4-layer printed circuit board 60 55 °C/W 22 16 °C/W AC Test Loads and Waveforms R1 R1 VCC ALL INPUT PULSES VCC OUTPUT VCC Typ OUTPUT 90% 10% 90% 10% GND R2 30 pF R2 5 pF INCLUDING JIG AND SCOPE INCLUDING JIG AND SCOPE (a) Rise Time: 1 V/ns Fall Time: 1 V/ns (c) (b) Equivalent to: THÉVENIN EQUIVALENT RTH OUTPUT Parameters V Value Unit R1 1105 Ohms R2 1550 Ohms RTH 645 Ohms VTH 1.75 Volts Data Retention Characteristics (Over the Operating Range) Parameter Conditions[9] Description Min. Typ.[2] Max. Unit 0.5 7.5 µA VDR VCC for Data Retention ICCDR Data Retention Current 1.0 V tCDR[6] Chip Deselect to Data Retention Time 0 ns tR[7] Operation Recovery Time 70 ns VCC = 1.0V, CE > VCC − 0.3V, VIN > VCC − 0.3V or VIN < 0.3V, Data Retention Waveform DATA RETENTION MODE VCC VCC(min.) VDR > 1.0 V tCDR VCC(min.) tR CE Note: 7. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 ms or stable at VCC(min) > 100 ms. 8. No input may exceed VCC + 0.3V Document #: 001-06510 Rev. *A Page 4 of 12 [+] Feedback CY62136VN MoBL® Switching Characteristics Over the Operating Range [9] 55 ns Parameter Description Min. 70 ns Max. Min. Max. Unit Read Cycle tRC Read Cycle Time 55 tAA Address to Data Valid tOHA Data Hold from Address Change tACE CE LOW to Data Valid 55 70 ns tDOE OE LOW to Data Valid 25 35 ns 25 ns [10] tLZOE OE LOW to Low-Z tHZOE OE HIGH to High-Z[10, 11] tLZCE CE LOW to Low-Z[10] CE HIGH to tPU CE LOW to Power-up tPD CE HIGH to Power-down tDBE BLE / BHE LOW to Data Valid tLZBE tHZBE 55 10 BLE / BHE LOW to Low-Z[10, 11] BLE / BHE HIGH to High-Z[12] ns 70 10 5 10 ns 10 25 ns ns 5 25 High-Z[10, 11] tHZCE 70 ns 25 ns 55 70 ns 25 35 ns 0 0 5 ns 5 25 ns 25 ns Write Cycle[12, 13] tWC Write Cycle Time 55 70 ns tSCE CE LOW to Write End 45 60 ns tAW Address Set-up to Write End 45 60 ns tHA Address Hold from Write End 0 0 ns tSA Address Set-up to Write Start 0 0 ns tPWE WE Pulse Width 40 50 ns tBW BLE / BHE LOW to Write End 50 60 ns tSD Data Set-up to Write End 25 30 ns tHD Data Hold from Write End 0 0 ns tHZWE tLZWE WE LOW to High-Z[10, 11] [10] WE HIGH to Low-Z 20 5 25 10 ns ns Notes: 9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified IOL/IOH and 30-pF load capacitance. 10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 11. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 12. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 13. The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document #: 001-06510 Rev. *A Page 5 of 12 [+] Feedback CY62136VN MoBL® Switching Waveforms Read Cycle No. 1[14, 15] tRC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Read Cycle No. 2[15, 16] tRC CE tPD tHZCE tACE OE tHZOE tDOE BHE/BLE tLZOE tHZBE tDBE tLZBE DATA OUT HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID tLZCE VCC SUPPLY CURRENT tPU ICC 50% 50% ISB Notes: 14. Device is continuously selected. OE, CE = VIL. 15. WE is HIGH for read cycle. 16. Address valid prior to or coincident with CE transition LOW. Document #: 001-06510 Rev. *A Page 6 of 12 [+] Feedback CY62136VN MoBL® Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled)[12, 17, 18] tWC ADDRESS CE tAW tHA tSA WE tPWE tBW BHE/BLE OE tSD DATA I/O NOTE 19 tHD DATAIN VALID tHZOE Write Cycle No. 2 (CE Controlled)[12, 17, 18] tWC ADDRESS tSCE CE tSA tAW BHE/BLE WE tHA tBW tPWE tSD DATA I/O tHD DATAIN VALID Notes: 17. Data I/O is high impedance if OE = VIH. 18. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 19. During this period, the I/Os are in output state and input signals should not be applied. Document #: 001-06510 Rev. *A Page 7 of 12 [+] Feedback CY62136VN MoBL® Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW)[13, 18] tWC ADDRESS CE tAW tBW BHE/BLE WE tHA tSA tHD tSD DATA I/O DATAIN VALID NOTE 19 tLZWE tHZWE Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[19] tWC ADDRESS CE tAW tHA tBW BHE/BLE tSA WE tSD DATA I/O NOTE 19 tHZWE Document #: 001-06510 Rev. *A tHD DATAIN VALID tLZWE Page 8 of 12 [+] Feedback CY62136VN MoBL® Typical DC and AC Characteristics Normalized Operating Current vs. Supply Voltage 1.4 Standby Current vs. Supply Voltage 35 MoBL 30 1.2 MoBL 0.8 ICC 25 ISB (µA) 1.0 0.6 20 15 10 0.4 5 0.2 0.0 1.7 0 2.2 2.7 3.2 SUPPLY VOLTAGE (V) 3.7 1.0 2.7 2.8 3.7 1.9 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 80 MoBL 70 60 TAA (ns) 50 40 30 20 10 1.0 2.7 2.8 1.9 3.7 SUPPLY VOLTAGE (V) Truth Table CE H WE X OE X BHE X BLE X Inputs/Outputs High-Z Mode Deselect/Power-down Power Standby (ISB) L H L L L Data Out (I/O0–I/O15) Read Active (ICC) L H L H L Data Out (I/O0–I/O7); I/O8–I/O15 in High-Z Read Active (ICC) L H L L H Data Out (I/O8–I/O15); I/O0–I/O7 in High-Z Read Active (ICC) L H L H H High-Z Deselect/Output Disabled Active (ICC) L H H L L High-Z Deselect/Output Disabled Active (ICC) L H H H L High-Z Deselect/Output Disabled Active (ICC) L H H L H High-Z Deselect/Output Disabled Active (ICC) L L X L L Data In (I/O0–I/O15) Write Active (ICC) L L X H L Data In (I/O0–I/O7); I/O8–I/O15 in High-Z Write Active (ICC) L L X L H Data In (I/O8–I/O15); I/O0 –I/O7 in High-Z Write Active (ICC) Document #: 001-06510 Rev. *A Page 9 of 12 [+] Feedback CY62136VN MoBL® Ordering Information Speed (ns) 55 70 Ordering Code Package Diagram Package Type Operating Range CY62136VNLL-55ZXI 51-85087 44-pin TSOP II (Pb-Free) CY62136VNLL-55BAI 51-85096 48-Ball (7.00 mm x 7.00 mm) FBGA CY62136VNLL-55ZSXA 51-85087 44-pin TSOP II (Pb-Free) Automotive-A CY62136VNLL-70ZXI 51-85087 44-pin TSOP II (Pb-Free) Industrial CY62136VNLL-70BAI 51-85096 48-Ball (7.00 mm x 7.00 mm) FBGA CY62136VNLL-70BAXA 51-85096 48-Ball (7.00 mm x 7.00 mm) FBGA (Pb-Free) CY62136VNLL-70ZSXA 51-85087 44-pin TSOP II (Pb-Free) CY62136VNLL-70ZSXE 51-85087 44-pin TSOP II (Pb-Free) Industrial Automotive-A Automotive-E Please contact your local Cypress sales representative for availability of these parts Package Diagrams 44-pin TSOP II (51-85087) 51-85087-*A Document #: 001-06510 Rev. *A Page 10 of 12 [+] Feedback CY62136VN MoBL® Package Diagrams (continued) 48-Ball (7.00 mm x 7.00 mm) FBGA (51-85096) BOTTOM VIEW TOP VIEW PIN 1 CORNER Ø0.05 M C PIN 1 CORNER (LASER MARK) Ø0.25 M C A B Ø0.30±0.05(48X) 1 2 3 4 5 6 6 4 3 2 1 C F G D E F 2.625 E 0.75 C 5.25 B 7.00±0.10 A B D 7.00±0.10 5 A G H H A A 1.875 0.75 B 7.00±0.10 3.75 7.00±0.10 0.10 C 0.21±0.05 0.53±0.05 0.25 C B 0.15(4X) 51-85096-*F 0.36 SEATING PLANE C 1.20 MAX. MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the products of their respective holders. Document #: 001-06510 Rev. *A Page 11 of 12 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. [+] Feedback CY62136VN MoBL® Document History Page Document Title: CY62136VN MoBL® 2-Mbit (128K x 16) Static RAM Document Number: 001-06510 ECN NO. Issue Date Orig. of Change ** 426503 See ECN RXU New Data Sheet *A 488954 See ECN NXR Added Automotive product Updated ordering Information table REV. Document #: 001-06510 Rev. *A Description of Change Page 12 of 12 [+] Feedback