MAXIM DS2125

DS2125
Ultra3 LVD/SE SCSI 15-Line Terminator
www.maxim-ic.com
GENERAL DESCRIPTION
FEATURES
The DS2125 Ultra3 LVD/SE SCSI terminator is both
a low-voltage differential (LVD) and single-ended
(SE) terminator. The multimode operation enables
the designer to implement LVD in current products
while allowing the end user SE backward
compatibility with legacy devices. If the device is
connected in an LVD-only bus, the DS2125 uses
LVD termination. If any SE devices are connected to
the bus, the DS2125 uses SE termination, which is
accomplished automatically inside the part by
sensing the voltage on the SCSI bus DIFFSENS line.
§
§
§
§
§
§
§
§
For the LVD termination, the DS2125 integrates two
current sources with 15 precision resistor strings. For
the SE termination, one regulator and 15 precision
110W resistors are used. Two DS2125 terminators
are needed for a wide SCSI bus.
Fully Compliant with Ultra3 SCSI
Provides Multimode Low-Voltage
Differential/Single-Ended (LVD/SE) Termination
for 15 Signal Line Pairs
Auto-Selection of LVD or SE Termination
5% Tolerance on SE and LVD Termination
Resistance
Low 3pF Power-Down Capacitance
On-Board Thermal-Shutdown Circuitry
SCSI Bus Hot-Plug Compatible
Fully Supports Actively Negated SE SCSI
Signals
PIN CONFIGURATION
TOP VIEW
HS_GND
HS_GND
HS_GND
VREF
R1P
R1N
APPLICATIONS
Raid Systems
SCSI Host Bus Adapter (HBA) Cards
Servers
SCSI Cables
Network Attached Storage (NAS)
Storage Area Networks (SANs)
ORDERING INFORMATION
PART
DS2125
TEMP RANGE
0°C to +70°C
PIN-PACKAGE
48 LQFP
HS_GND
HS_GND
HS_GND
TPWR
R15N
R15P
R2P
12
13
R2N
14
R3P
15
R3N
16
R4P
17
R4N
11
10
9
8
7
6
5
4
3
2
1
48
R14N
47
R14P
46
R13N
45
R13P
44
R12N
18
43
R12P
R5P
19
42
R11N
R5N
20
41
R11P
R6P
21
40
R10N
R6N
22
39
R10P
R7P
23
38
R9N
R7N
24
37
36
R9P
Dallas
Semiconductor
DS2125
25
26
27
28
29
30
31
32
R8P
R8N
GND
HS_GND
HS_GND
HS_GND
33
34
35
ISO
DIFFSENSE
DIFF_CAP
HS_GND
HS_GND
HS_GND
LQFP
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 052604
DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator
ABSOLUTE MAXIMUM RATINGS
VREF, ISO, GND, DIFFSENSE, DIFF_CAP, TPWR, RxP, RxN (x = 1 . . . 15)
VREF Continuous Output Current
Continuous Power Dissipation (TA = +70°C), 48-Pin LQFP
Operating Temperature Range
Junction Temperature
Storage Temperature Range
Lead Temperature (soldering, 10s)
-0.3V, +6.0V
±200mA
2W
0°C to +70°C
+150°C
-65°C to +160°C
+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(TPWR = 3.3V, TA = 0°C to +70°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
TPWR Operating Supply
LVD
VTPWR
Range
SE
TPWR SUPPLY CURRENT
ITPWR_LVD
LVD SCSI mode
TPWR Supply Current
ITPWR_SE
SE SCSI mode
(All Lines Open)
ISO mode (terminators disabled)
ITPWR_ISO
LVD TERMINATION (Applies to each line pair, 1 to 15 in LVD mode)
Differential-Mode
RDM
Termination Resistance
Common-Mode
RP and RN shorted together
RCM
Termination Resistance
Differential-Mode Bias
VDM
All lines open
Common-Mode Bias
VCM
RP and RN shorted together
SE TERMINATION (Applies to SE terminators, 1 to 15 in SE mode)
RSE = (VLx - 0.2) / ILx,
where VLx = voltage at terminator
Single-Ended Mode
RSE
pin with pin unloaded and
Termination Resistance
ILx = current for each terminator pin
with the pin forced to 0.2V (Note 2)
Termination Current
Signal level at 0.2V, all lines low
ISE
(Note 2)
Signal level at 0.5V
SE Voltage Reference
VREF
Pin Leakage
(Note 2)
TYP
MAX
5.5
5.5
UNITS
32
10
750
mA
mA
mA
100
110
W
110
165
W
20
1.6
250
VREF unloaded; vary TPWR from
2.7V to 5.5V
2.85V Regulator
(Note 2)
V
100
1.15
1.25
125
1.35
mV
V
104.5
110
115.5
W
-21.0
-18.0
-24
-25.4
-22.4
mA
2.7
2.85
3.0
V
400
nA
60
W
3
pF
With ISO high
Single-Ended GND
RGND
Resistance
TERMINATOR PIN CAPACITANCE
Terminator Pin
CIN
Capacitance
VREF REGULATOR
1.25V Regulator Output
VREF_LVD
Voltage
1.25V Regulator ShortISOURCE
Circuit Source Current
1.25V Regulator ShortISINK
Circuit Sink Current
1.25V Regulator Line
Regulation
2.85V Regulator ShortCircuit Source Current
2.85V Regulator ShortCircuit Sink Current
MIN
2.7
4.0
Measured at RP pins, I = 10mA
20
With ISO high (Note 1)
1.15
1.25
1.35
V
VREF = 0V
-375
-700
-1000
mA
VREF = 3.3V
170
300
700
mA
1.0
2.5
%
2.7
2.85
3.0
V
VREF = 0V (Note 2)
-375
-700
-1000
mA
VREF = 3.3V (Note 2)
170
300
700
mA
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DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator
ELECTRICAL CHARACTERISTICS (continued)
(TPWR = 3.3V, TA = 0°C to +70°C, unless otherwise noted.)
PARAMETER
VREF REGULATOR
2.85V Regulator Line
Regulation
DIFFSENS OUTPUT
DIFFSENS Driver Output
Voltage
DIFFSENS Driver Source
Current
DIFFSENS Driver Sink
Current
DIFFSENS Leakage
(Note 3)
SYMBOL
CONDITIONS
MIN
VREF unloaded; vary TPWR from
4.0V to 5.5V
TYP
MAX
UNITS
1.0
2.5
%
VDSO
-5mA £ IDFFSENS £ 50mA
1.2
1.4
V
IDSH
VDIFFSENS = 0V
-15
-5
mA
IDSL
VDIFFSENS = 3.3V
100
200
mA
-3
+1
1
3
ILEAK, LOW
ILEAK, HIGH
THERMAL SHUTDOWN
Thermal-Shutdown
Threshold
Thermal-Shutdown
Hysteresis
MODE CHANGE DELAY/FILTER
Mode Change Delay
tDELAY
LOGICAL SIGNALS (ISO)
Input Low Voltage
VIL
With ISO high, |VDIFFSENS| = 0.3V
With ISO high, |VDIFFSENS - VTPWR| =
0.3V
mA
For increasing temperature
(Note 1)
150
°C
(Note 1)
10
°C
0.66
1.25
-0.3
2
2.00
ms
+0.8
TPWR
+ 0.3
V
Input High Voltage
VIH
V
Input Current
DIFF_CAP
Input Current
DIFF_CAP SE
Operating Range
DIFF_CAP LVD
Operating Range
DIFF_CAP HVD
Operating Range
IIL
VCC = 3.3V
-30
IL
VIL = -0.3V
-1
+1
mA
VSEOR
-0.3
+0.5
V
VLVDOR
0.7
1.9
V
VHVDOR
2.4
VTPWR +
0.3
V
mA
-10
Note 1: Guaranteed by design.
Note 2: TPWR = 4.0V.
Note 3: Room temperature only.
PIN DESCRIPTION
PIN
1, 2, 11–26,
37–48
NAME
RxP, RxN
FUNCTION
Signal Termination. Connect to SCSI bus signal lines.
Termination Power. Connect to the SCSI TERMPWR line and decouple with a 2.2mF
capacitor.
3
TPWR
4–9, 28–33
HS_GND
10
VREF
Reference Voltage. 2.85V reference in SE mode and 1.25V reference in LVD mode; must be
decoupled with a 4.7mF capacitor.
27
GND
Ground. Signal ground, 0V.
34
DIFF_CAP
35
DIFFSENSE
36
ISO
Heat-Sink Ground. Internally connected to the mounting pad. This should be grounded.
DIFFSENSE Capacitor. Connect a 0.1mF capacitor for the DIFFSENSE filter. Input to detect
the type of device (differential or single-ended) on the SCSI bus.
DIFFSENSE. Output to drive the SCSI bus DIFFSENS line.
Isolation. When pulled high, the DS2125 isolates its bus pins (RxN, RxP) from the SCSI bus.
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DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator
Figure 1. Block Diagram
ISO
DIFFSENSE
THERMALSHUTDOWN
CIRCUITRY
SE
DIFFENSE
CIRCUITRY
DIFF_CAP
CONTROL
LOGIC
LVD
HVD
VREF
VREF
+
-
10W
10W
BANDGAP
1.25V
+
-
R1N
R15N
Dallas
Semiconductor
DS2125
R1P
R15P
+
-
SE GND
DRIVER
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DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator
Figure 2. SCSI Bus Configuration
TERMPWR
TERMPWR
TPWR
TPWR
ISO
ISO
CONTROL LINES (15)
VREF
DIFFSENS
DIFF_CAP
4.7mF
DIFFSENSE
20kW
DIFFSENS
20kW
0.1mF
DIFF_CAP
0.1mF
VREF
4.7mF
TPWR
TPWR
ISO
ISO
CONTROL LINES (15)
VREF
DIFFSENS
DIFFSENS
DIFF_CAP
DIFF_CAP
4.7mF
VREF
4.7mF
Note: The following terms are used throughout this data sheet:
DIFFSENS: Refers to the SCSI bus signal.
DIFFSENSE: Refers to the DS2125 pin name and internal circuitry capable of driving the DIFFSENS line.
DIFF_CAP: Refers to the DS2125 pin name and internal circuitry relating to monitoring the DIFFSENS line.
DETAILED DESCRIPTION
The DS2125 combines LVD and SE termination with DIFFSENSE sourcing and detection. A bandgap reference is
fed into two amplifiers, which creates a 1.25V reference voltage and a 2.85V reference voltage. The control logic
determines which of these references are applied to the termination resistors. If the SCSI bus is in LVD mode, the
1.25V reference is used. If the SCSI bus is in SE mode, the 2.85V reference is used. That same control logic
switches in/out parallel resistors to change the total termination resistance accordingly. Finally, in SE mode the Rp
pins are switched to ground.
The DIFFSENSE circuitry decodes trinary logic. There is one of three voltages on the SCSI control line called
DIFFSENS. Two comparators and a NAND gate determine if the voltage is below 0.6V, above 2.15V, or in
between, which indicates the mode of the bus as SE, HVD, or LVD, respectively.
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DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator
The DS2125’s DIFF_CAP pin monitors the DIFFSENS line to determine the device’s proper operating mode. The
DIFFSENSE pin can also drive the SCSI DIFFSENS line to determine the SCSI bus-operating mode. The DS2125
switches to the termination mode that is appropriate for the bus based on the value of the DIFFSENS voltage.
These modes are LVD mode, SE mode, and HVD isolation mode.
LVD MODE
A precision laser-trimmed resistor string with two amplifiers provides LVD termination. This configuration yields
105W differential and 150W common-mode impedance. A 112mV fail-safe bias is maintained when no drivers are
connected to the SCSI bus.
SE MODE
When the external driver for a given signal line turns off, the active terminator pulls that signal line to 2.85V
(quiescent state). The terminating resistors maintain their 110W value.
HVD ISOLATION MODE
The DS2125 identifies that there is an HVD device on the SCSI bus and isolates the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus, and VREF remains active. During
thermal shutdown, the termination pins are isolated from the SCSI bus, and VREF becomes high impedance. The
DIFFSENSE driver is shut down during either of these two events. An internal pulldown resistor assures that the
DS2125 is terminating the bus if the ISO pin is left floating.
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As with all
analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2mF capacitor and a 0.01mF highfrequency capacitor are recommended between TPWR and ground, and placed as close as possible to the
DS2125. The DS2125 should be placed as close as possible to the SCSI connector to minimize signal and power
trace length, thereby resulting in less input capacitance and reflections, which can degrade the bus signals.
To maintain the specified regulation, a 4.7mF capacitor is required between the VREF pin and ground of each
DS2125. A high-frequency capacitor (0.1mF ceramic recommended) can also be placed on the VREF pin in
applications that use fast rise/fall-time drivers. Figure 2 shows a typical SCSI bus configuration.
REFERENCE DOCUMENTS
SCSI Parallel Interface 2 (SPI-2)
T10 PROJECT
DOCUMENT
Project: 1142-M, 1998
ftp://ftp.t10.org/t10/drafts/spi2/spi2r20b.pdf
SCSI Parallel Interface 3 (SPI-3)
Project: 1302-D, 1999
ftp://ftp.t10.org/t10/drafts/spi3/spi3r14.pdf
NCITS.336:2000
SCSI Parallel Interface 4 (SPI-4)
Project: 1365-D, 200x
ftp://ftp.t10.org/t10/drafts/spi4/spi4r10.pdf
INCITS.362:2002
TITLE
T10 COMMITTEE FTP LINK
SUPPLIERS
SUPPLIER
PHONE
WEBSITE
American National Standards Institute (ANSI)
212-642-4900
www.ansi.org/
Global Engineering Documents
800-854-7179
http://global.ihs.com/
CHIP INFORMATION
TRANSISTOR COUNT: 8382 MOS and 87 BiPOLAR
PROCESS: BiCMOS
SUBSTRATE CONNECTED TO GROUND
THERMAL INFORMATION
Theta-JA: 65°C/W
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ANSI
DOCUMENT NO.
X3.302:1998
DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator
PACKAGE INFORMATION
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information, go to www.maxim-ic.com/DallasPackInfo.)
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Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
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are registered trademarks of Maxim Integrated Products, Inc., and Dallas Semiconductor Corporation.