LTM2881 Complete Isolated RS485/RS422 µModule Transceiver + Power Description Features n n n n n n n n n n n n n n n n n Isolated RS485/RS422 Transceiver: 2500VRMS Isolated DC Power: 5V at Up to 200mA No External Components Required 20Mbps or Low EMI 250kbps Data Rate High ESD: ±15kV HBM on Transceiver Interface High Common Mode Transient Immunity: 30kV/μs Integrated Selectable 120Ω Termination 3.3V (LTM2881-3) or 5.0V (LTM2881-5) Operation 1.62V to 5.5V Logic Supply Pin for Flexible Digital Interface Common Mode Working Voltage: 560VPEAK High Input Impedance Failsafe RS485 Receiver Current Limited Drivers and Thermal Shutdown Compatible with TIA/EIA-485-A Specification High Impedance Output During Internal Fault Condition Low Current Shutdown Mode (< 10µA) General Purpose CMOS Isolated Channel Small, Low Profile (15mm × 11.25mm × 2.8mm) Surface Mount BGA and LGA Packages Applications The LTM®2881 is a complete galvanically isolated fullduplex RS485/RS422 µModule® transceiver. No external components are required. A single supply powers both sides of the interface through an integrated, isolated, low noise, efficient 5V output DC/DC converter. Coupled inductors and an isolation power transformer provide 2500VRMS of isolation between the line transceiver and the logic interface. This device is ideal for systems where the ground loop is broken allowing for large common mode voltage variation. Uninterrupted communication is guaranteed for common mode transients greater than 30kV/μs. Maximum data rates are 20Mbps or 250kbps in slew limited mode. Transmit data, DI and receive data, RO, are implemented with event driven low jitter processing. The receiver has a one-eighth unit load supporting up to 256 nodes per bus. A logic supply pin allows easy interfacing with different logic levels from 1.62V to 5.5V, independent of the main supply. Enhanced ESD protection allows this part to withstand up to ±15kV (human body model) on the transceiver interface pins to isolated supplies and ±10kV through the isolation barrier to logic supplies without latch-up or damage. Isolated RS485/RS422 Interface Industrial Networks n Breaking RS485 Ground Loops n n L, LT, LTC, LTM, Linear Technology, µModule and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Isolated Half-Duplex RS485 μModule Transceiver LTM2881 Operating Through 35kV/μs CM Transients 3.3V VCC ISOLATION BARRIER VL RO PWR RE TE DE DI LTM2881 VCC2 A AVAILABLE CURRENT: 150mA (LTM2881-5) 100mA (LTM2881-3) 500V/DIV B TWISTED-PAIR CABLE Y Z GND 5V MULTIPLE SWEEPS OF COMMON MODE TRANSIENTS GND2 DI RO 1V/DIV 1V/DIV 50ns/DIV 2881 TA01a 2881 TA01 2881fa LTM2881 Absolute Maximum Ratings Pin Configuration (Note 1) VCC to GND................................................... –0.3V to 6V VCC2 to GND2................................................ –0.3V to 6V VL to GND..................................................... –0.3V to 6V Interface Voltages (A, B, Y, Z) to GND2......................... VCC2 –15V to 15V Signal Voltages ON, RO, DI, DE, RE, TE, DOUT to GND.......................... –0.3V to VL +0.3V Signal Voltages SLO, DIN to GND2.....................................–0.3V to VCC2 +0.3V Operating Temperature Range LTM2881C................................................ 0°C to 70°C LTM2881I..............................................–40°C to 85°C Storage Temperature Range................... –55°C to 125°C Peak Reflow Temperature (Soldering, 10 sec)........ 245°C TOP VIEW 1 A 2 DOUT TE 3 4 5 6 7 8 DI DE RE RO VL ON B VCC GND C D E F G H J GND2 K L DIN SLO Y Z BGA PACKAGE 32-PIN (15mm s 11.25mm s 3.42mm) TJMAX = 125°C, QJA = 32.2°C/W, QJCTOP = 27.2°C/W, QJCBOTTOM = 20.9°C/W, QJB = 26.4°C/W, WEIGHT = 1g B A VCC2 LGA PACKAGE 32-PIN (15mm s 11.25mm s 2.8mm) TJMAX = 125°C, QJA = 31.1°C/W, QJCTOP = 27.3°C/W, QJCBOTTOM = 19.5°C/W, QJB = 25.1°C/W, WEIGHT = 1g order information LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTM2881CY-3#PBF LTM2881CY-3#PBF LTM2881Y-3 32-Pin (15mm × 11.25mm × 3.42mm) BGA 0°C to 70°C LTM2881IY-3#PBF LTM2881IY-3#PBF LTM2881Y-3 32-Pin (15mm × 11.25mm × 3.42mm) BGA –40°C to 85°C LTM2881CY-5#PBF LTM2881CY-5#PBF LTM2881Y-5 32-Pin (15mm × 11.25mm × 3.42mm) BGA 0°C to 70°C LTM2881IY-5#PBF LTM2881IY-5#PBF LTM2881Y-5 32-Pin (15mm × 11.25mm × 3.42mm) BGA –40°C to 85°C LTM2881CV-3#PBF LTM2881CV-3#PBF LTM2881V-3 32-Pin (15mm × 11.25mm × 2.8mm) LGA 0°C to 70°C LTM2881IV-3#PBF LTM2881IV-3#PBF LTM2881V-3 32-Pin (15mm × 11.25mm × 2.8mm) LGA –40°C to 85°C LTM2881CV-5#PBF LTM2881CV-5#PBF LTM2881V-5 32-Pin (15mm × 11.25mm × 2.8mm) LGA 0°C to 70°C LTM2881IV-5#PBF LTM2881IV-5#PBF LTM2881V-5 32-Pin (15mm × 11.25mm × 2.8mm) LGA –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ 2881fa LTM2881 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX l l 3.0 4.5 3.3 5.0 3.6 5.5 l 1.62 UNITS VCC VCC Supply Voltage LTM2881-3 LTM2881-5 VL VL Supply Voltage 5.5 V ICCPOFF VCC Supply Current in Off Mode ON = 0V l 0 10 µA ICCS VCC Supply Current in On Mode LTM2881-3 DE = 0V, RE = VL , No Load LTM2881-5 DE = 0V, RE = VL , No Load l l 20 15 25 19 mA mA VCC2 Regulated VCC2 Output Voltage, Loaded LTM2881-3 DE = 0V, RE = VL, ILOAD = 100mA LTM2881-5 DE = 0V, RE = VL, ILOAD = 150mA l VCC2NOLOAD Regulated VCC2 Output Voltage, No Load DE = 0V, RE = VL , No Load Power Supply Efficiency ICC2 = 100mA, LTM2881-5 (Note 2) VCC2 Short-Circuit Current DE = 0V, RE = VL , VCC2 = 0V l |VOD| Differential Driver Output Voltage R = ∞ (Figure 1) R = 27Ω (RS485) (Figure 1) R = 50Ω (RS422) (Figure 1) l l l ∆|VOD| Difference in Magnitude of Driver Differential Output Voltage for Complementary Output States R = 27Ω or R = 50Ω (Figure 1) l ICC2S 4.7 4.7 5.0 5.0 4.8 5.0 V V V V 5.35 V 250 mA VCC2 VCC2 VCC2 V V V 0.2 V 62 % Driver 1.5 2 VOC Driver Common Mode Output Voltage R = 27Ω or R = 50Ω (Figure 1) l 3 V ∆|VOC| Difference in Magnitude of Driver Common Mode Output Voltage for Complementary Output States R = 27Ω or R = 50Ω (Figure 1) l 0.2 V IOZD Driver Three-State (High Impedance) Output Current on Y and Z DE = 0V, (Y or Z) = –7V, +12V l ±10 µA IOSD Maximum Driver Short-Circuit Current – 7V ≤ (Y or Z) ≤ 12V (Figure 2) l – 250 250 mA RIN Receiver Input Resistance RE = 0V or VL , VIN = –7V, –3V, 3V, 7V, 12V (Figure 3) l 96 125 RTE Receiver Termination Resistance Enabled TE = VL , VAB = 2V, VB = – 7V, 0V, 10V (Figure 8) l 108 120 IIN Receiver Input Current (A, B) ON = 0V VCC2 = 0V or 5V, VIN = 12V (Figure 3) l ON = 0V VCC2 = 0V or 5V, VIN = –7V (Figure 3) l –100 l –0.2 Receiver kΩ 156 Ω 125 µA µA VTH Receiver Differential Input Threshold Voltage (A-B) –7V ≤ B ≤ 12V 0.2 ∆VTH Receiver Input Failsafe Hysteresis B = 0V Receiver Input Failsafe Threshold B = 0V Logic Input Low Voltage 1.62V ≤ VL ≤ 5.5V l Logic Input High Voltage DIN SLO DI, TE, DE, ON, RE: VL ≥ 2.35V 1.62V ≤ VL < 2.35V l l 0.67•VCC2 2 V V l l 0.67•VL 0.75•VL V V 25 –0.2 –0.05 V mV 0 V Logic VIL VIH 0.4 V 2881fa LTM2881 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. SYMBOL PARAMETER IINL Logic Input Current VHYS Logic Input Hysteresis (Note 2) VOH Output High Voltage Output High, ILOAD = –4mA (Sourcing), 5.5V ≥ VL ≥ 3V Output High, ILOAD = –1mA (Sourcing), 1.62V ≤ VL < 3V l VL –0.4 V l VL –0.4 V Output Low, ILO AD = 4mA (Sinking), 5.5V ≥ VL ≥ 3V Output High, ILOAD = 1mA (Sinking), 1.62V ≤ VL < 3V l 0.4 V l 0.4 V VOL Output Low Voltage CONDITIONS MIN l TYP MAX 0 ±1 150 UNITS µA mV IOZR Three-State (High Impedance) Output Current RE = VL , 0V ≤ RO ≤ VL on RO l ±1 µA IOSR Short-Circuit Current l ±85 mA 0V ≤ (RO or DOUT) ≤ VL switching Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Driver SLO = VCC2 fMAX Maximum Data Rate (Note 3) tPLHD tPHLD Driver Input to Output RDIFF = 54Ω, CL = 100pF (Figure 4) l 20 60 85 Mbps ns ∆tPD Driver Input to Output Difference |tPLHD – tPHLD| RDIFF = 54Ω, CL = 100pF (Figure 4) l 1 8 ns tSKEWD Driver Output Y to Output Z RDIFF = 54Ω, CL = 100pF (Figure 4) l 1 ±8 ns tRD tFD Driver Rise or Fall Time RDIFF = 54Ω, CL = 100pF (Figure 4) l 4 12.5 ns tZLD , tZHD , tLZD , tHZD Driver Output Enable or Disable Time RL = 500Ω, CL = 50pF (Figure 5) l 170 ns Driver SLO = GND2 fMAX Maximum Data Rate (Note 3) 250 kbps tPLHD tPHLD Driver Input to Output RDIFF = 54Ω, CL = 100pF (Figure 4) 1 1.55 µs ∆tPD Driver Input to Output Difference |tPLHD – tPHLD| RDIFF = 54Ω, CL = 100pF (Figure 4) 50 500 ns tSKEWD Driver Output Y to Output Z RDIFF = 54Ω, CL = 100pF (Figure 4) ±200 ±500 ns tRD tFD Driver Rise or Fall Time RDIFF = 54Ω, CL = 100pF (Figure 4) l 0.9 1.5 µs tZLD , tZHD , tLZD , tHZD Driver Output Enable or Disable Time RL = 500Ω, CL = 50pF (Figure 5) l 400 ns 2881fa LTM2881 switching Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tPLHR tPHLR Receiver Input to Output CL = 15pF, VCM = 2.5V, |VAB| = 1.4V, tR and tF < 4ns, (Figure 6) l 100 140 ns tSKEWR Differential Receiver Skew |tPLHR - tPHLR| CL = 15pF (Figure 6) l 1 8 ns tRR tFR Receiver Output Rise or Fall Time CL = 15pF (Figure 6) l 3 12.5 ns tZLR , tZHR , tLZR , tHZR Receiver Output Enable Time RL =1kΩ, CL = 15pF (Figure 7) l 50 ns tRTEN , tRTZ Termination Enable or Disable Time RE = 0V, DE = 0V, VAB = 2V, VB = 0V (Figure 8) l 100 µs CL = 15pF, tR and tF < 4ns l 60 100 ns l 325 800 µs Receiver Generic Logic Input tPLHL1 tPHLL1 DIN to DOUT Input to Output Power Supply Generator VCC2 –GND2 Supply Start-Up Time (0V to 4.5V) ON isolation Characteristics otherwise noted. VL, No Load TA = 25°C, LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V unless SYMBOL PARAMETER CONDITIONS VISO Rated Dielectric Insulation Voltage 1 Minute (Derived from 1 Second Test) 2500 VRMS 1 Second ±4400 VDC (Note 2) 30 Maximum Working Insulation Voltage (Note 2) 560 Partial Discharge VPR = 1050 VPEAK (Note 2) Common Mode Transient Immunity VIORM MIN TYP MAX UNITS kV/µs VPEAK <5 >109 pC Ω Input to Output Resistance (Note 2) Input to Output Capacitance (Note 2) 6 pF Creepage Distance (Note 2) 9.48 mm Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by design and not subject to production test. Note 3: Maximum Data rate is guaranteed by other measured parameters and is not tested directly. Note 4: This µModule transceiver includes over temperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when over temperature protection is active. Continuous operation above specified maximum operating junction temperature may result in device degradation or failure. 2881fa LTM2881 Typical Performance Characteristics VCC = 5.0V, VL = 3.3V unless otherwise noted. Driver Propagation Delay vs Temperature Driver Skew vs Temperature 2.0 80 1.5 1.5 75 1.0 0.5 0 –0.5 DRIVER PROP DELAY (ns) 2.0 DRIVER SKEW (ns) RECEIVER SKEW (ns) Receiver Skew vs Temperature TA = 25°C, LTM2881-3 VCC = 3.3V, LTM2881-5 1.0 0.5 0 –25 0 25 50 TEMPERATURE (°C) 75 –1.0 –50 100 –25 0 25 50 TEMPERATURE (°C) 75 2881 G01 4.0 124 3.5 120 118 116 2.0 1.5 112 0.5 0 100 OUTPUT LOW 0 10 20 30 40 50 OUTPUT CURRENT (mA) 60 75 100 Supply Current vs Data Rate 200 2 1 115 SUPPLY CURRENT (mA) RECEIVER PROP DELAY (ns) OUTPUT VOLTAGE (V) 0 25 50 TEMPERATURE (°C) 180 3 110 105 100 160 R = 54Ω (LTM2881-3) 140 120 100 80 60 40 95 20 SINK 2 3 4 OUTPUT CURRENT (mA) –25 2881 G06 Receiver Propagation Delay vs Temperature SOURCE 1 R = 54Ω 2 0 –50 70 120 0 R = 100Ω 3 2881 G05 4 0 R=∞ 4 1 2881 G04 Receiver Output Voltage vs Output Current (Source and Sink) 100 5 OUTPUT HIGH 2.5 1.0 75 75 6 3.0 114 0 25 50 TEMPERATURE (°C) 0 25 50 TEMPERATURE (°C) Driver Differential Output Voltage vs Temperature OUTPUT VOLTAGE (V) 4.5 126 122 –25 2881 G03 5.0 128 –25 50 –50 100 Driver Output Low/High Voltage vs Output Current RTERM vs Temperature 110 –50 60 2881 G02 OUTPUT VOLTAGE (V) RESISTANCE (Ω) 130 65 55 –0.5 –1.0 –50 70 5 2881 G07 90 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 2881 G08 R = 100Ω (LTM2881-3) R = 54Ω (LTM2881-5) R = 100Ω (LTM2881-5) R = ∞ (LTM2881-3) R = ∞ (LTM2881-5) 0 0.1 1 DATA RATE (Mbps) 10 2881 G09 2881fa LTM2881 Typical Performance Characteristics VCC = 5.0V, VL = 3.3V unless otherwise noted. 6 200 LTM2881-5 150 100 50 200 LTM2881-5 (RS485 60mA) 150 LTM2881-5 (RS485 90mA) LTM2881-3 (RS485 60mA) 100 LTM2881-5 5 VOLTAGE (V) 250 LTM2881-3 4 3 50 LTM2881-3 (RS485 90mA) 0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 2 2881 G11 2881 G10 70 VCC2 vs Load Current 250 LTM2881-3 300 ICC CURRENT (mA) VCC2 Surplus Current vs Temperature VCC Supply Current vs Temperature at ILOAD = 100mA on VCC2 SURPLUS CURRENT (mA) 350 TA = 25°C, LTM2881-3 VCC = 3.3V, LTM2881-5 VCC2 Power Efficiency 10 20 40 60 80 100 120 140 160 180 VCC2 LOAD CURRENT (mA) 2881 G12 VCC2 Load Step (100mA) VCC2 Noise LTM2881-5 VCC2 100mV/DIV EFFICIENCY (%) 60 50 LTM2881-3 10mV/DIV 40 ILOAD 50mA/DIV 30 20 10 100µs/DIV 0 150 50 100 ICC2 OUTPUT CURRENT (mA) 2881 G14 200µs/DIV 2881 G15 200 2881 G13 2881fa LTM2881 Pin Functions LOGIC SIDE (VCC , VL, GND) ISOLATED SIDE (VCC2, GND2) DOUT (Pin A1): General Purpose Logic Output. Logic output connected through isolation path to DIN . Under the condition of an isolation communication failure DOUT is in a high impedance state. DIN (Pin L1): General Purpose Isolated Logic Input. Logic input on the isolated side relative to VCC2 and GND2. A logic high on DIN will generate a logic high on DOUT. A logic low on DIN will generate a logic low on DOUT. TE (Pin A2): Terminator Enable. A logic high enables a termination resistor (typically 120Ω) between pins A and B. SLO (Pin L2): Driver Slew Rate Control. A low input, relative to GND2, will force the driver into a reduced slew rate mode for reduced EMI. A high input, relative to GND2, puts the driver into full speed mode to support maximum data rates. DI (Pin A3): Driver Input. If the driver outputs are enabled (DE high), then a low on DI forces the driver noninverting output (Y) low and the inverting output (Z) high. A high on DI, with the driver outputs enabled, forces the driver noninverting output (Y) high and inverting output (Z) low. DE (Pin A4): Driver Enable. A logic low disables the driver leaving the outputs Y and Z in a high impedance state. A logic high enables the driver. RE (Pin A5): Receiver Enable. A logic low enables the receiver output. A logic high disables RO to a high impedance state. RO (Pin A6): Receiver Output. If the receiver output is enabled (RE low) and if A – B is > 200mV, RO is a logic high, if A – B is < 200mV RO is a logic low. If the receiver inputs are open, shorted, or terminated without a valid signal, RO will be high. Under the condition of an isolation communication failure RO is in a high impedance state. Y (Pin L3): Non Inverting Driver Output. High impedance when the driver is disabled. Z (Pin L4): Inverting Driver Output. High impedance when the driver is disabled. B (Pin L5): Inverting Receiver Input. Impedance is > 96kΩ in receive mode with TE low or unpowered. A (Pin L6): Non Inverting Receiver Input. Impedance is > 96kΩ in receive mode with TE low or unpowered. VCC2 (Pins L7-L8): Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 5V. Internally bypassed to GND2 with 2.2µF. GND2 (Pins K1-K8): Isolated Side Circuit Ground. The pads should be connected to the isolated ground and/or cable shield. VL (Pin A7): Logic Supply. Interface supply voltage for pins RO, RE, TE, DI, DE, DOUT, and ON. Recommended operating voltage is 1.62V to 5.5V. Internally bypassed to GND with 2.2µF. ON (Pin A8): Enable. Enables power and data communication through the isolation barrier. If ON is high the part is enabled and power and communications are functional to the isolated side. If ON is low the logic side is held in reset and the isolated side is unpowered. GND (Pins B1-B5): Circuit Ground. VCC (Pins B6-B8): Supply Voltage. Recommended operating voltage is 3V to 3.6V for LTM2881-3 and 4.5V to 5.5V for LTM2881-5. Internally bypassed to GND with 2.2µF. 2881fa LTM2881 Block Diagram VCC 2.2µF VCC2 5V REG ISOLATED DC/DC CONVERTER 2.2µF VL 2.2µF A RO RX B RE ISOLATED COMM INTERFACE DE ISOLATED COMM INTERFACE 120Ω DI Y DX ON Z SLO TE DIN DOUT GND GND2 2881 BD = LOGIC SIDE COMMON = ISOLATED SIDE COMMON TEST CIRCUITs Y GND OR VL DI Y + DRIVER VOD – Z R R GND OR VL + – DI IOSD DRIVER VOC Z 2881 F01 –7V TO 12V 2881 F02 Figure 1. Driver DC Characteristics Figure 2. Driver Output Short-Circuit Current IIN VIN + – + – A OR B B OR A RECEIVER 2881 F03 V RIN = IN IIN Figure 3. Receiver Input Current and Input Resistance 2881fa LTM2881 TEST CIRCUITs DI Y DI VL tPLHD 0V tPHLD tSKEWD CL DRIVER RDIFF Y, Z VOD 1/2 VOD CL Z 90% 2881 F04a (Y-Z) 10% 0 0 90% 10% tRD tFD 2881 F04b Figure 4. Driver Timing Measurement RL Y VL OR GND DI CL GND OR VCC2 RL Z 1/2 VL 0V tZLD VCC2 Y OR Z DRIVER DE VL DE CL VCC2 OR GND 2881 F05a tLZD 1/2 VCC2 0.5V 0.5V 1/2 VCC2 Z OR Y 0V tZHD 2881 F05b tHZD Figure 5. Driver Enable and Disable Timing Measurements tR ±VAB/2 VCM ±VAB/2 VAB A-B –VAB A B RECEIVER RO CL 2881 F06a RO VL 0 90% 10% tF 90% 0 10% tPLHR 90% 1/2 VL 10% tRR tPHLR 1/2 VL 90% 10% tFR 2881 F06b Figure 6. Receiver Propagation Delay Measurements 2881fa 10 LTM2881 TEST CIRCUITs VL RE 0V OR VCC2 B VCC2 OR 0V 1/2 VL 0V A RL RO RECEIVER VL OR GND CL RE tZLR VL RO 1/2 VL VOL RO VOH 0.5V 0.5V 1/2 VL 0V 2881 F07a tLZR 2881 F07b tZHR tHZR Figure 7. Receiver Enable/Disable Time Measurements IA A RO RTE = + – RECEIVER VAB IA TE VAB VL 1/2 VL 0V IA B + – TE tRTEN tRTZ 90% 10% VB 2881 F08 Figure 8. Termination Resistance and Timing Measurements functional table LOGIC INPUTS MODE A, B Y, Z RO DC/DC CONVERTER TERMINATOR ON RE TE DE 1 0 0 0 Receive RIN Hi-Z Enabled On Off 1 0 0 1 Transceiver RIN Driven Enabled On Off 1 1 0 1 Transmit RIN Driven Hi-Z On Off 1 0 1 0 Receive + Term On RTE Hi-Z Enabled On On 0 X X X Off RIN Hi-Z Hi-Z Off Off 2881fa 11 LTM2881 Applications Information Overview The LTM2881 µModule transceiver provides a galvanically-isolated robust RS485/RS422 interface, powered by an integrated, regulated DC/DC converter, complete with decoupling capacitors. A switchable termination resistor is integrated at the receiver input to provide proper termination to the RS485 bus. The LTM2881 is ideal for use in networks where grounds can take on different voltages. Isolation in the LTM2881 blocks high voltage differences and eliminates ground loops and is extremely tolerant of common mode transients between ground potentials. Error free operation is maintained through common mode events greater than 30kV/μs providing excellent noise isolation. µModule Technology The LTM2881 utilizes isolator µModule technology to translate signals and power across an isolation barrier. Signals on either side of the barrier are encoded into pulses and translated across the isolation boundary using coreless transformers formed in the µModule substrate. This system, complete with data refresh, error checking, safe shutdown on fail, and extremely high common mode immunity, provides a robust solution for bidirectional signal isolation. The µModule technology provides the means to combine the isolated signaling with our RS485 transceiver and powerful isolated DC/DC converter in one small package. DC/DC Converter The LTM2881 contains a fully integrated isolated DC/DC converter, including the transformer, so that no external components are necessary. The logic side contains a fullbridge driver, running about 2MHz, and is AC-coupled to a single transformer primary. A series DC blocking capacitor prevents transformer saturation due to driver duty cycle imbalance. The transformer scales the primary voltage, and is rectified by a full-wave voltage doubler. This topology eliminates transformer saturation caused by secondary imbalances. The DC/DC converter is connected to a low dropout reg ulator (LDO) to provide a regulated low noise 5V output. The internal power solution is sufficient to support the transceiver interface at its maximum specified load and data rate, and external pins are supplied for extra decoupling (optional) and heat dissipation. The logic supplies, VCC and VL have a 2.2µF decoupling capacitance to GND and the isolated supply VCC2 has a 2.2µF decoupling capacitance to GND2 within the µModule package. VCC2 Output The on-board DC/DC converter provides isolated 5V power to output VCC2. VCC2 is capable of suppling up to 1W of power at 5V in the LTM2881-5 option and up to 600mW of power in the LTM2881-3 option. This surplus current is available to external applications. The amount of surplus current is dependent upon the implementation and current delivered to the RS485 driver and line load. An example of available surplus current is shown in the Typical Performance Characteristics graph, VCC2 Surplus Current vs Temperature. Figure 19 demonstrates a method of using the VCC2 output directly and with a switched power path that is controlled with the isolated RS485 data channel. Driver The driver provides full RS485 and RS422 compatibility. When enabled, if DI is high, Y–Z is positive. When the driver is disabled, both outputs are high impedance with less than 10µA of leakage current over the entire common mode range of –7V to 12V, with respect to GND2. Driver Overvoltage and Overcurrent Protection The driver outputs are protected from short circuits to any voltage within the absolute maximum range of (VCC2 –15V) to (GND2 +15V) levels. The maximum VCC2 current in this condition is 250mA. If the pin voltage exceeds about ±10V, current limit folds back to about half of the peak value to reduce overall power dissipation and avoid damaging the part. The device also features thermal shutdown protection that disables the driver and receiver output in case of excessive power dissipation (See Note 4 in the Electrical Characteristics section). 2881fa 12 LTM2881 Y-Z 10dB/DIV Y-Z 10dB/DIV Applications Information 0 6.25 FREQUENCY (MHz) 12.5 0 6.25 FREQUENCY (MHz) 12.5 2881 F09b 2881 F09a Figure 9a. Frequency Spectrum SLO Mode 125kHz Input SLO Mode The LTM2881 features a logic-selectable reduced slew rate mode (SLO mode) that softens the driver output edges to reduce EMI emissions from equipment and data cables. The reduced slew rate mode is entered by taking the SLO pin low to GND2, where the data rate is limited to about 250kbps. Slew limiting also mitigates the adverse effects of imperfect transmission line termination caused by stubs or mismatched cables. Figures 9a and 9b show the frequency spectrums of the LTM2881 driver outputs in normal and SLO mode operating at 250kbps. SLO mode significantly reduces the high frequency harmonics. Receiver and Failsafe With the receiver enabled, when the absolute value of the differential voltage between the A and B pins is greater than 200mV, the state of RO will reflect the polarity of (AB). During data communication the receiver detects the state of the input with symmetric thresholds around 0V. The symmetric thresholds preserve duty cycle for attenuated signals with slow transition rates on high capacitive busses, or long cable lengths. The receiver incorporates a failsafe feature that guarantees the receiver output to be a logic-high during an idle bus, when the inputs are shorted, left open or terminated, but not driven. The failsafe feature eliminates the need for system level integration of network pre-biasing by guaranteeing a logic-high on RO under the conditions of an idle bus. Further network biasing constructed to condition transient noise during an idle Figure 9b. Normal Mode Frequency Spectrum 125kHz Input state is unnecessary due to the common mode transient rejection of the LTM2881. The failsafe detector monitors A and B in parallel with the receiver and detects the state of the bus when A-B is above the input failsafe threshold for longer than about 3µs with a hysteresis of 25mV. This failsafe feature is guaranteed to work for inputs spanning the entire common mode range of –7V to 12V. The receiver output is internally driven high (to VL) or low (to GND) with no external pull-up needed. When the receiver is disabled the RO pin becomes Hi-Z with leakage of less than ±1µA for voltages within the supply range. Receiver Input Resistance The receiver input resistance from A or B to GND2 is greater than 96k permitting up to a total of 256 receivers per system without exceeding the RS485 receiver loading specification. The input resistance of the receiver is unaffected by enabling/disabling the receiver or by powering/unpowering the part. The equivalent input resistance looking into A and B is shown in Figure 10. A >96k 60Ω TE 60Ω >96k 2881 F10 B Figure 10. Equivalent Input Resistance into A and B 2881fa 13 LTM2881 Applications Information Switchable Termination Proper cable termination is very important for signal fidelity. If the cable is not terminated with its characteristic impedance, reflections will distort the signal waveforms. The integrated switchable termination resistor provides logic control of the line termination for optimal perfor mance when configuring transceiver networks. Supply Current The static supply current is dominated by power delivered to the termination resistance. Power supply current increases with data rate due to capacitive loading. Figure 14 shows supply current versus data rate for three different loads for the circuit configuration of Figure 4. Supply current increases with additional external applications drawing current from VCC2. 130 128 126 RESISTANCE (Ω) When the TE pin is high, the termination resistor is enabled and the differential resistance from A to B is 120Ω. Figure 11 shows the I/V characteristics between pins A and B with the termination resistor enabled and disabled. The resistance is maintained over the entire RS485 common mode range of –7V to 12V as shown in Figure 12. The integrated termination resistor has a high frequency response which does not limit performance at the maximum specified data rate. Figure 13 shows the magnitude and phase of the termination impedance versus frequency. The termination resistor cannot be enabled by TE if the device is unpowered, ON is low or the LTM2881 is in thermal shutdown. 124 122 120 118 116 114 112 110 –10 –5 0 5 10 COMMON MODE VOLTAGE (V) 2881 G11 2881 F11 Figure 11. Curve Trace Between A and B with Termination Enabled and Disabled 230 PHASE 0 MAGNITUDE –20 110 –30 100 0.1 –40 210 SUPPLY CURRENT (mA) –10 130 120 250 PHASE (DEGREES) MAGNITUDE (Ω) 140 Figure 12. Termination Resistance vs Common Mode Voltage 10 150 15 190 170 LTM2881-3 R=54 CL=1000p R=54 CL=100p R=54 CL=0 150 130 110 90 LTM2881-5 R=54 CL=1000p R=54 CL=100p R=54 CL=0 70 1 FREQUENCY (MHz) 10 2881 F13 Figure 13. Termination Magnitude and Phase vs Frequency 50 0.1 1 DATA RATE (Mbps) 10 2881 F14 Figure 14. Supply Current vs Data Rate 2881fa 14 LTM2881 Applications Information • Under heavily loaded conditions, VCC and GND current can exceed 300mA. Use sufficient copper on the PCB to ensure resistive losses do not cause the supply voltage to drop below the minimum allowed level. Similarly, size the VCC2 and GND2 conductors to support any external load current. These heavy copper traces will also help to reduce thermal stress and improve the thermal conductivity. • Input and Output decoupling is not required, since these components are integrated within the package. If an additional decoupling capacitor is used a value of 6.8µF to 22µF is recommended. The recommendation for EMI sensitive applications is to include an additional low ESL ceramic capacitor of 1µF to 4.7µF, placed close to the power and ground terminals. Alternatively, use a number of smaller value parallel capacitors to reduce ESL and achieve the same net capacitance. • Hot plugging the LTM2881 voltage supply without additional protection may cause device damage. Refer to Linear Technology Application Note 88, entitled “Ceramic Capacitors Can Cause Overvoltage Transients” for a detailed discussion of this problem. To protect against hot plug transients use a 6.8µF tantalum as the additional decoupling capacitor. • Do not place copper on the PCB between the inner columns of pads. This area must remain open to withstand the rated isolation voltage. Slot the PCB in this area to facilitate cleaning and ensure contamination does not compromise the isolation voltage. • The recommendation for non-EMI critical applications is to use solid ground planes for GND and GND2 for optimizing signal fidelity, thermal performance, and to minimize RF emissions due to uncoupled PCB trace conduction. The drawback of using ground planes, where EMI is of concern, is the creation of a dipole • For large ground planes a small capacitance (≤ 330pF) from GND to GND2, either discrete or embedded within the substrate, provides a low impedance current return path for the module parasitic capacitance, minimizing any high frequency differential voltages and substantially reducing radiated emissions. Discrete capacitance is not as effective due to parasitic ESL; in addition consider voltage rating, leakage, and clearance for component selection. Embedding the capacitance within the PCB substrate provides a near ideal capacitor and eliminates the other component selection issues, however the PCB must be 4 layers and the use of a slot is not compatible. Exercise care in applying either technique to insure the voltage rating of the barrier is not compromised. VCC = VL = ON C1 RO A RE B SLOT The high integration of the LTM2881 makes PCB layout very simple. However, to optimize its electrical isolation characteristics, EMI, and thermal performance, some layout considerations are necessary. The PCB layout in Figure 15 shows a recommended configuration for a low EMI RS485 application. antenna structure, which can radiate differential voltages formed between GND and GND2. If ground planes are used, minimize their area, and use contiguous planes, any openings or splits can increase RF emissions. DE Z Y DI TE GND SLOT PCB Layout Considerations 2881 F15 Figure 15. PCB Recommended Layout 2881fa 15 LTM2881 Applications Information Cable Length versus Data Rate RF, Magnetic Field Immunity For a given data rate, the maximum transmission distance is bounded by the cable properties. A typical curve of cable length versus data rate compliant with the RS485 standard is shown in Figure 16. Three regions of this curve reflect different performance limiting factors in data transmission. In the flat region of the curve, maximum distance is determined by resistive loss in the cable. The downward sloping region represents limits in distance and rate due to the AC losses in the cable. The solid vertical line represents the specified maximum data rate in the RS485 standard. The dashed line at 250kbps shows the maximum data rate when SLO is low. The dashed line at 20Mbps shows the maximum data rate when SLO is high. The LTM2881 has been independently evaluated and has successfully passed the RF and magnetic field immunity testing requirements per European Standard EN 55024, in accordance with the following test standards: CABLE LENGTH (FT) 10k EN 61000-4-3 Radiated, Radio-Frequency, Electromagnetic Field Immunity EN 61000-4-8 Power Frequency Magnetic Field Immunity EN 61000-4-9 Pulsed Magnetic Field Immunity Tests were performed using an unshielded test card designed per the data sheet PCB layout recommendations. Specific limits per test are detailed in Table 1. Table 1. Test Frequency Field Strength LOW-EMI MODE MAX DATA RATE 1k NORMAL MODE MAX DATA RATE 100 EN 61000-4-3, Annex D 80MHz to 1GHz 1.4MHz to 2GHz 2GHz to 2.7GHz 10V/m 3V/m 1V/m EN61000-4-8, Level 4 50Hz and 60Hz 30A/m EN61000-4-8, Level 5 60Hz 100A/m* EN61000-4-9, Level 5 Pulse 1000A/m *Non IEC Method RS485 MAX DATA RATE 10 10k 100k 1M 10M DATA RATE (bps) 100M 2881 F16 Figure 16. Cable Length vs Data Rate 2881fa 16 LTM2881 Typical Applications VCC VL VCC LTM2881 A ISOLATION BARRIER RO RE TE DE DI 330k B Y Z DIN DOUT GND FAULT GND2 2881 F17 Figure 17. Isolated System Fault Detection VCC VCC LTM2881 PWR VL ISOLATION BARRIER RO RE TE DE DI A B Y Z GND GND2 2881 F18 Figure 18. Full-Duplex RS485 Connection 2881fa 17 LTM2881 Typical Applications VCC 1.8V VCC RE TE DE DI OFF ON PWR ISOLATION BARRIER VL RO A GND IRLML6402 B LTM2881 330k Z DIN DOUT CMOS OUTPUT REGULATED 5V SWITCHED 5V VCC2 GND2 CMOS INPUT 2881 F19 Figure 19. Switched 5V Power with Isolated CMOS Logic Connection with Low Voltage Interface VCC VCCB ISOLATION BARRIER RO RE DE DI LTM2881 LTM2881 PWR A B Y Y 51Ω 10nF Z 51Ω A 51Ω Z GND GND2 VCC PWR ISOLATION BARRIER VCC VL VL DE DI RE RO B 51Ω 10nF GND2 BUS INHERITED GND 2881 F20 B Figure 20. 4-Wire Full Duplex Self Biasing for Unshielded CAT5 Connection 2881fa 18 3.175 SUGGESTED PCB LAYOUT TOP VIEW 1.905 aaa Z 0.630 ±0.025 Ø 32x E 0.000 PACKAGE TOP VIEW 0.635 4 0.635 PIN “A1” CORNER 1.905 Y X D 6.350 5.080 0.000 5.080 6.350 aaa Z 2.45 – 2.55 4.445 3.175 4.445 SYMBOL A A1 A2 b b1 D E e F G aaa bbb ccc ddd eee NOM 3.42 0.60 2.82 0.78 0.63 15.0 11.25 1.27 12.70 8.89 DIMENSIONS 0.15 0.10 0.20 0.30 0.15 MAX 3.62 0.70 2.92 0.83 0.66 NOTES DETAIL B PACKAGE SIDE VIEW TOTAL NUMBER OF BALLS: 32 MIN 3.22 0.50 2.72 0.73 0.60 DETAIL A b1 0.27 – 0.37 SUBSTRATE ddd M Z X Y eee M Z DETAIL B MOLD CAP ccc Z A1 A2 A Z (Reference LTC DWG #05-08-1851 Rev B) Øb (32 PLACES) // bbb Z BGA Package 32-Lead (15mm × 11.25mm × 3.42mm) e b 7 5 G 4 e 3 PACKAGE BOTTOM VIEW 6 2 1 L K J H G F E D C B A 3 SEE NOTES PIN 1 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE BALL DESIGNATION PER JESD MS-028 AND JEP95 TRAY PIN 1 BEVEL COMPONENT PIN “A1” BGA 32 0110 REV B PACKAGE IN TRAY LOADING ORIENTATION LTMXXXXXX µModule 5. PRIMARY DATUM -Z- IS SEATING PLANE 4 3 2. ALL DIMENSIONS ARE IN MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 F b 8 DETAIL A LTM2881 Package Description 2881fa 19 4 3.175 SUGGESTED PCB LAYOUT TOP VIEW 1.905 PACKAGE TOP VIEW 11.25 BSC 0.635 Y X 6.350 5.080 0.000 5.080 6.350 DETAIL c 15.00 BSC aaa Z 2.400 – 2.600 eee S X Y 0.290 – 0.350 SUBSTRATE DETAIL C 0.630 ±0.025 Ø 32x DETAIL B eee S X Y DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 4 SYMBOL TOLERANCE aaa 0.10 bbb 0.10 eee 0.05 6. THE TOTAL NUMBER OF PADS: 32 5. PRIMARY DATUM -Z- IS SEATING PLANE LAND DESIGNATION PER JESD MO-222 3 2. ALL DIMENSIONS ARE IN MILLIMETERS NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 DETAIL A 0.630 ±0.025 Ø 32x DETAIL B MOLD CAP 2.69 – 2.95 (Reference LTC DWG # 05-08-1773 Rev q) bbb Z PAD “A1” CORNER 0.635 Z 20 1.905 LGA Package 32-Lead (15mm × 11.25mm × 2.8mm) TRAY PIN 1 BEVEL COMPONENT PIN “A1” 12.70 BSC 8 DETAIL A 7 8.89 BSC 5 4 3 1.27 BSC 2 1 L K J H G F E D C B A LGA 32 0308 REV Ø 3 PADS SEE NOTES PAD 1 PACKAGE IN TRAY LOADING ORIENTATION LTMXXXXXX µModule PACKAGE BOTTOM VIEW 6 LTM2881 Package Description 2881fa 4.445 3.175 4.445 aaa Z LTM2881 Revision History REV DATE DESCRIPTION PAGE NUMBER A 3/10 Changes to Features, Description and Typical Application Add BGA Package to Pin Configuration, Order Information and Package Description Sections 1 2, 19 Changes to LGA Package in Pin Configuration Section 2 Changes to Electrical Characteristics Section 3 Changes to Graphs G09, G13, G14 6, 7 Update to Pin Functions 8 Update to Applications Information 12 Change to X-Axis on Figures 9a and 9b 13 Update to Supply Current Section 14 “PCB Layout Isolation Considerations” Section Replaced 15 RF, Magnetic Field Immunity Section Added 16 Changes to Related Parts 22 2881fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 21 LTM2881 Typical Application VCCC VCCA VCC LTM2881 PWR VL ISOLATION BARRIER CABLE SHIELD OR GROUND RETURN Y Y Z Z GND2 VL A A RO RE TE VCC2 DE DI GND GND2 C Z GND B PWR PWR GND2 DI B Y DE A B VCC1 RE TE A ISOLATION BARRIER RO VCC LTM2881 ISOLATION BARRIER GND DI DE TE RE RO VCC VL VCCB LTM2881 2881 F21 B B Figure 21. Multi-Node Network with End Termination and Single Ground Connection on Isolation Bus Related Parts PART NUMBER DESCRIPTION COMMENTS LTM2882 Dual Isolated RS232 µModule Transceiver + Power 1Mbps, ±10kV HBM ESD, 2500VRMS LTC1535 Isolated RS485 Transceiver 2500VRMS Isolation in Surface Mount Package LT1785 ±60V Fault-Protected Transceiver Half Duplex LT1791 ±60V Fault-Protected Transceiver Full Duplex LTC2861 20Mbps RS485 Transceivers with Integrated Switchable Termination Full Duplex 15kV ESD 2881fa 22 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LT 0310 REV A • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2009