TOREX XC9515AC01ZR-G

XC9515 Series
ETR0706-010
2 channel Synchronous Step-Down DC/DC Converter with Manual Reset
■GENERAL DESCRIPTION
The XC9515 series consists of 2 channel synchronous step-down DC/DC converters and a voltage detector with delay circuit
built-in. The DC/DC converter block incorporates a P-channel 0.35Ω (TYP.) driver transistor and a synchronous N-channel
0.35Ω (TYP.) switching transistor. By minimizing ON resistance of the built-in transistors, the XC9515 series can deliver
highly efficient and a stable output current up to 800mA. With high switching frequencies of 1MHz, a choice of small inductor
is possible. The series has a built-in UVLO (under-voltage lock-out) function, therefore, the internal P-channel driver
transistor is forced OFF when input voltage becomes 1.8V or lower (for XC9515A, 2.7V or lower). The voltage detector block
can be set delay time freely by connecting an external capacitor. With the manual reset function, the series can output a
reset signal at any time.
■APPLICATIONS
■FEATURES
DC/DC Block
Input Voltage Range
Output Voltage
●DVDs
: 2.5V～5.5V
: VOUT1=1.2V～4.0V
VOUT2=1.2V～4.0V
(Accuracy ±2%)
Oscillation Frequency
: 1MHz (Accuracy ±15%)
High Efficiency
: 95% (VIN=5V, VOUT=3.3V)
Output Current
: 800mA
Control
: PWM control
Protection Circuits
: Thermal Shutdown
: Integral Latch (Over Current Limit)
: Short Protection Circuit
Ceramic Capacitor Compatible
Voltage Detector (VD) Block
Detect Voltage Range
: 2.0～5.5V（Accuracy ±2%）
Delay Time
: 173 ms
(When Cd=0.1μF is connected)
Output Configuration
: N-channel open drain
Package
: QFN-20
●Blue-ray Disk
●LCD TVs, LCD modules
●Multifunctional printers
●Photo printers
●Set top boxes
■TYPICAL APPLICATION CIRCUIT
■ TYPICAL PERFORMANCE
CHARACTERISTICS
● Efficiency vs. Output Current
L1
VOUT1
VIN=5V,FOSC=1MHz
VIN=5V, fOSC=1MHz, L=4.7μH (CDRH4D28C)
EN1
VIN
L=4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
EN2
CIN=10μF (ceramic), CL=10μF (ceramic)
100
VOUT=3.3V
PVSS
1
MR
NC
70
MR
AVSS
PVSS
2
NC
LX2
NC
PVDD
2
VDOUT
Cd
NC
VOUT
2
Cd
Efficiency[%]
VOUT
1
NC
80
CL1
EN2
EN1
NC
PVDD
1
CIN1
LX1
90
60
VOUT=1.5V
50
40
30
20
RUP
CIN2
CL2
VDOUT
VOUT=1.8V
10
0
1
L2
VOUT2
10
100
Output Current : IOUT [mA]
1000
1/21
20 PVDD1
19 NC
18 LX1
17 EN1
■PIN CONFIGURATION
16 EN2
XC9515 Series
Vout1 15
1 NC
MR 14
2 PVSS1
AVSS 13
NC 7
4 PVSS2
5 NC
PVDD2 6
NC 9
VDOUT 10
QFN-20
(BOTTOM VIEW)
LX2 8
CD 12
Vout2 11
3 NC
※1
■ PIN ASSIGNMENT
QFN-20
PIN
NUMBER
PIN NAME
FUNCTION
PIN
NUMBER
PIN NAME
FUNCTION
1
NC
No Connection
11
VOUT2
Output Voltage Sense 2
2
P_VSS1
Power Ground 1
12
Cd
Delay Capacitor Connection
Analog Ground
3
NC
No Connection
13
A_VSS
4
P_VSS2
Power Ground 2
14
MR
Manual Reset
5
NC
No Connection
15
VOUT1
Output Voltage Sense1
6
P_VDD2
Power Supply 2
16
EN2
CH2 ON/OFF Control
7
NC
No Connection
17
EN1
CH1 ON/OFF Control
8
LX2
Switching Output 2
18
LX1
Switching Output 1
9
NC
No Connection
19
NC
No Connection
10
VDOUT
Voltage Detector output
20
P_VDD1
Power Supply 1
*1 Back metal pad voltage ：VSS level
（The back metal pad should be soldered to enhance mounting strength and heat release. If the pad needs to be connected to
other circuit, care should be taken for the pad voltage level.）
2/21
XC9515
Series
■FUNCTION CHART
●EN1, EN2 and MR pins are internally pulled up. *
PIN
EN1
EN2
MR
2)
LEVEL
OPERATIONAL STATUS
High , Open
DC/DC_CH1 Operation
Low
DC/DC_CH1 Stop
High , Open
DC/DC_CH2 Operation
Low
DC/DC_CH2 Stop
High , Open
VD_OUT Detect RESET Signal Output
Low
VD_OUT Force RESET Signal Output
EN1, EN2 and MR pins are internally pulled up so that the levels of High and Open are same function.
●EN1, EN2 and MR pins are left open internally. *
PIN
EN1
EN2
MR
2)
LEVEL
OPERATIONAL STATUS
High
DC/DC_CH1 Operation
Low
DC/DC_CH1 Stop
High
DC/DC_CH2 Operation
Low
DC/DC_CH2 Stop
High
VD_OUT Detect RESET Signal Output
Low
VD_OUT Force RESET Signal Output
EN1, EN2 and MR pins are floated inside so that these pins shall not be left open outside.
2)
* Please refer to the PRODUCTION CLASSIFICATION to see the combination of pull-up status regarding the EN1, EN2, and MR pins.
■PRODUCT CLASSIFICATION
●Ordering Information (Standard products)
XC9515①②③④⑤⑥-⑦(*1)
DESIGNATOR
DESCRIPTION
①
Input Voltage & UVLO
②
EN & MR logic control conditions
SYMBOL
A
Input Voltage Range 5V±10%, UVLO Voltage 2.7V (TYP.)
B
A
Input Voltage Range 2.5V～5.5V, UVLO Voltage 1.8V (TYP.)
EN1, EN2, MR pins are not pulled up internally
EN1, EN2 pins have built-in pull-up resistors,
MR pin has a built-in pull-up resistor
EN1, EN2 Pins are not pulled up internally,
MR pin has a built-in pull-up resistor
EN1, EN2 pins have built-in pull-up resistors,
MR pin are not pulled up internally
B
C
D
(*1)
(*2)
DESCRIPTION
③④
Set Voltage Combinations
01～
Based on Torex Standard Product Number
⑤⑥-⑦
Packages
(*2)
Taping Type
ZR-G
QFN-20 (Halogen & Antimony free)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or
representative. (Standard orientation: ⑤R-⑦, Reverse orientation: ⑤L-⑦)
3/21
XC9515 Series
■BLOCK DIAGRAM
●EN1 Pin, EN2 Pin, MR Pin, Pull-up Inside
●EN1 Pin, EN2 Pin, MR Pin, internally floating
PVDD1
VOUT1
Current
Limit
PVDD1
VOUT1
Current
Limit
Error Amp
Error Amp
Current
Feedback
Current
Feedback
PVDD1
LX1
LX1
EN1
EN2
PWM
Comparator
Soft
Start
ON/OF
F
Control
Logic
EN1
Ramp
Wave
Vreｆ
PVSS1
Thermal
Shutdown
OSC
Current
Limit
Ramp
Wave
Soft
Start
EN2
ON/OF
F
Control
Soft
Start
Error Amp
PVSS1
OSC
PVDD2
VOUT2
Current
Limit
Ramp
Wave
Soft
Start
Current
Feedback
LX2
PWM
Comparator
Logic
Buffer
Drive
Thermal
Shutdown
Current
Feedback
PVDD1
Logic
Ramp
Wave
Vreｆ
PVDD2
VOUT2
PWM
Comparator
Buffer
Drive
Error Amp
Buffer
Drive
PVDD1
LX2
PWM
Comparator
Logic
Buffer
Drive
PVSS2
PVSS2
MR
MR
VDOUT
VDOUT
Rdelay
Rdelay
Vreｆ
Vreｆ
AVSS
AVSS
Cd
Cd
■ABSOLUTE MAXIMUM RATINGS
Ta=25℃
PARAMETER
SYMBOL
P_VDD1・P_VDD2 Pin Voltage
P_VDD1, P_VDD2
-0.3～6.5
V
VOUT1・VOUT2 Pin Voltage
VOUT1, VOUT2
-0.3～6.5
V
UNITS
Cd Pin Voltage
VCd
-0.3～P_VDD1・2 + 0.3
V
VDOUT Pin Voltage
VDOUT
-0.3～6.5
V
VDOUT Pin Current
IDOUT
10
mA
EN1・EN2・MR Pin Voltage
VEN1,VEN2,VMR
-0.3～6.5
V
LX1・LX2 Pin Voltage
VLx1, VLx2
-0.3～P_VDD1・2+0.3
V
LX1・LX2 Pin Current
ILx1, ILx2
1500
mA
Power Dissipation
QFN-20
Operating Temperature Range
Storage Temperature Range
* P_VDD1・2 stands for P_VDD1=P_VDD2
A_VSS=P_VSS1=P_VSS2=0V
4/21
RATINGS
Pd (Free air)
300
Pd (PCB mounted)
1000
Topr
-40 ～ +85
o
-55 ～ +125
o
Tstg
mW
C
C
XC9515
Series
■ELECTRICAL CHARACTERISTICS
XC9515AB04xx
● DC/DC CH1, CH2 (VOUT1=1.5V, VOUT2=3.3V, fOSC =1MHz, EN1・2 Pull-up inside)
PARAMETER
SYMBOL
Input Voltage
VIN
Output Voltage 1
VOUT1
Output Voltage 2
VOUT2
Maximum Output Current 1・2
(*1)
CONDITIONS
Connected to the external components,
P_VDD1・2=VEN1=VEN2=0V, IOUT1=30mA
Connected to the external components,
P_VDD1・2=VEN2=VEN1=0V, IOUT2=30mA
IOUTMAX1
MIN.
TYP.
4.5
5.0
MAX. UNITS CIRCUIT
5.5
V
－
1.470 1.500 1.530
V
①
3.234 3.300 3.366
V
①
800
－
－
mA
①
1000
－
－
mA
②
Connected to the external components, IOUT=10mA
0.85
1.00
1.15
MHz
①
IOUTMAX2
ILIM1,
Current Limit 1・2
Ta =25 oC
ILIM 2
Oscillation Frequency
fOSC
Maximum Duty Cycle
DMAX
VOUT1=VOUT2=0V
100
－
－
%
②
Minimum Duty Cycle
DMIN
VOUT1=VOUT2=VIN
－
－
0
%
②
－
89
－
%
①
－
94
－
%
①
－
0.35
(*4)
－
Ω
③
－
0.35
(*4)
－
Ω
－
－
6
－
ms
⑦
－
1.3
－
ms
①
(*6)
1.2
－
5
V
④
(*6)
AVSS
－
0.4
V
④
μA
④
μA
④
μA
④
μA
④
Connected to the external components,
Efficiency 1
(*2)
EFFI1
P_VDD1・2=VEN1=5.0V, VEN2=0V,
VOUT1=1.5V, IOUT1=200mA
Connected to the external components,
Efficiency 2
(*2)
EFFI2
P_VDD1・2=VEN2=5.0V, VEN1=0V,
VOUT2=3.3V, IOUT2=200mA
LX1・2 "H" ON Resistance
RLX1H・RLX2H
LX1・2 "L" ON Resistance
RLX1L・RLX2L
VOUT1=VOUT2=0V, ILx1=ILx2=100mA
(*3)
LX1 and LX2 are pulled down by a resistor of 200Ω
tLAT1, tLAT2
Integral Latch Time 1・2
VOUT1=Setting Voltage×0.9,
VOUT2= Setting Voltage ×0.9
tSS1, tSS2
Soft-Start Time 1・2
VEN1H,
EN1・2 "H" Level Voltage
VEN2H
VEN1L,
EN1・2 "L" Level Voltage
VEN2L
IEN1H, IEN2H
EN1・2 "H" Level Current
IEN1L, IEN2L
EN1・2 "L" Level Current
LX1・2 "H" Leakage Current
(*7)
LX1・2 "L" Leakage Current
ILEAK1H,
ILEAK2H
ILEAK1L,
ILEAK2L
(*5)
Time until EN1, EN2 or both pins changes from 0V to
VIN and voltage becomes VOUT1・2×0.95, IOUT1・2=10mA
VOUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”H”
VOUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”L”
P_VDD1・2=VEN1=VEN2=5.5V
0.1
－
P_VDD1・2=5.5V, VEN1=VEN2=0V
－
P_VDD1・2=VLX1=VLX2=5.5V, VEN1=VEN2=0V
－
P_VDD1・2=5.5V, VLX1=VLX2=VEN1=VEN2=0V
-3.0
(*9)
-6
(*8)
－
－
(*8)
－
1.0
(*9)
－
Test Conditions：
* P_VDD1・2 stands for P_VDD1=P_VDD2
**Unless otherwise stated, P_VDD1・2=5V, VEN1=VEN2= P_VDD1・2
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1：When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes.
If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance.
*2：EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100
*3：On resistance (Ω)= (VIN - Lx pin measurement voltage) / 100mA
*4：Designed value.
*5：Time until it short-circuits LX1 (LX2 in the side of 2CH) with GND via 1Ωof resistor from an operational state and is set to Low level from
current limit pulse generating.
*6：”H” is judged as “H”>VIN-0.1V, ”L” is judged as ”L”<0.1V.
*7：When temperature is high, a current of approximately 20μA (maximum) may leak.
*8：Current which EN1 and EN2 are measured separately.
*9：Lead current which LX1 and LX2 are measured separately.
5/21
XC9515 Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9515AB04xx
Ta=25oC
●Voltage Detector (VD) (MR pin Pull-up Inside) Block
PARAMETER
Detect Voltage
SYMBOL
VDF(E)
CONDITIONS
MIN.
(*1)
Hysteresis Width
VHYS
VD Output Current
IDOUT
TYP.
VDF(T)
×0.98
VHYS=(VDR(E)
(*3)
- VDF(E) ) / VDF(E) ×100
P_VDD1・2=VDF-0.01V, Apply 0.5V to VDOUT
(*2)
VDF(T)
MAX.
VDF(T)
×1.02
UNITS CIRCUIT
V
⑤
－
5.0
－
%
－
5.0
6.6
8.0
mA
④
Delay Resistance
RDLY
－
2.5
－
MΩ
－
MR "H" Level Voltage
VMRH
VDOUT=”H” Level Voltage
(*3)
1.2
－
5.5
V
④
MR "L" Level Voltage
VMRL
VDOUT=”L” Level Voltage
(*3)
AVSS
－
0.4
V
④
MR "H" Level Current
IMRH
P_VDD1・2=VMR=5.5V
－
－
0.1
μA
④
MR "L" Level Current
IMRL
P_VDD1・2=5.5V, VMR=0V
－
-6.0
－
μA
④
Test Conditions：
* P_VDD1・2 stands for P_VDD1=P_VDD2
**Unless otherwise stated, P_VDD1・2=5V, VEN1=VEN2= P_VDD1・2
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1：VDF(E)=Detect Voltage
*2：VDR(E)=Release Voltage
*3：”H” is judged as “H”>VIN-0.1V, ”L” is judged as “L”<0.1V
XC9515AB04xx
Ta=25oC
●Whole Circuit (VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz, EN1・2 Pull-up Inside)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX. UNITS CIRCUIT
Supply Current 1
Supply Current 2
IDD1
VOUT1=VOUT2=Setting Voltage x 0.9
－
950
1500
μA
⑥
IDD2
VOUT1=VOUT2=Setting Voltage x 1.1 （Oscillation stops）
－
75
145
μA
⑥
Stand-by Current
ISTB
UVLO Detect Voltage
VUVLOF
UVLO Release Voltage
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis Width
－
18
33
μA
⑥
VIN voltage which VOUT1=0V and LX pin becomes ”L”
(*1)
2.4
2.7
3.0
V
②
VIN voltage which VOUT1=0V and LX pin becomes ”H”
(*1)
－
－
3.5
V
②
TTSD
－
150
－
o
－
THYS
－
20
－
o
－
VUVLOR
VEN1=VEN2=0V
Test Conditions：
* P_VDD1・2 stands for P_VDD1=P_VDD2
**Unless otherwise stated, P_VDD1・2=5V, VEN1=VEN2= P_VDD1・2
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1：”H” is judged “H”>VIN-0.1V, ”L” is judged “L”<0.1V
6/21
C
C
XC9515
Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9515BA06xx
●DC/DC CH1, CH2 (VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz, EN1 and EN2 pins are internally floating)
PARAMETER
SYMBOL
Input Voltage
VIN
CONDITIONS
MIN.
TYP.
2.5
Ta=25 oC
MAX. UNITS CIRCUIT
5.5
V
Connected to the external components,
Output Voltage1
VOUT1
P_VDD1・2=VEN1, VEN2=0V
1.470 1.500 1.530
V
①
3.234 3.300 3.366
V
①
mA
①
IOUT1=30mA
Connected to the external components,
Output Voltage2
VOUT2
P_VDD1・2=VEN2, VEN1=0V
IOUT2=30mA
Maximum Output Current 1・2
(*1)
IOUTMAX1
800
IOUTMAX2
Current Limit 1・2
ILIM1, ILIM 2
Oscillation Frequency
fOSC
Maximum Duty Cycle
Minimum Duty Cycle
1000
Connected to the external components, IOUT=10mA
0.85
DMAX
VOUT1=VOUT2=0V
100
DMIN
VOUT1=VOUT2=VIN
1.00
1.15
mA
②
MHz
①
%
②
%
②
89
%
①
94
%
①
0
Connected to the external components,
Efficiency 1
(*2)
EFFI1
P_VDD1・2=VEN1=5.0V, VEN2=0V
VOUT1=1.5V, IOUT1=200mA
Connected to the external components,
Efficiency 2
(*2)
EFFI2
P_VDD1・2=VEN2=5.0V, VEN1=0V
VOUT2=3.3V, IOUT2=200mA
LX1・2 "H" ON Resistance
LX1・2 "L" ON Resistance
RLX1H, RLX2H
tLAT1, tLAT2
Soft-Start Time 1・2
tSS1, tSS2
EN1・2 "H" Voltage
VEN１H, VEN2H
EN1・2 "L" Voltage
VEN1L, VEN2L
EN1・2 "H" Current
IEN1H, IEN2H
EN1・2 "L" Current
(*7)
LX1・2 "L" Leak Current
(*3)
RLX1L, RLX2L
Integral Latch Time 1・2
LX1・2 "H" Leak Current
VOUT1=VOUT2=0V, ILx1=ILx2=100mA
LX1 and LX2 are pulled down by a resistor of 200Ω
VOUT1= Setting Voltage×0.9, VOUT2= Setting Voltage×0.9
Time until EN1, EN2 or both pins changes from 0V to VIN
and voltage becomes VOUT1・2×0.95, IOUT1・2=10mA
VOUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”H”
Ω
③
0.35
(*4)
Ω
-
6
ms
⑦
1.3
ms
①
1.2
5
V
④
(*6)
AVSS
0.4
V
④
μA
④
μA
④
μA
④
μA
④
VOUT1=VOUT2=0V
Voltage which LX1 or LX2 becomes ”L”
(*4)
(*6)
P_VDD1・2=VEN1=VEN2=5.5V
IEN1L, IEN2L
P_VDD1・2=5.5V, VEN1=VEN2=0V
Ileak1H, Ileak2H
P_VDD1・2=VLX1=VLX2=5.5V, VEN1=VEN2=0V
Ileak1L, Ileak2L
(*5)
0.35
P_VDD1・2=5.5V, VLX1=VLX2=VEN1=VEN2=0V
0.1
(*8)
1.0
(*9)
(*8)
-0.1
(*9)
-3.0
Test Conditions：
* P_VDD1・2 stands for P_VDD1=P_VDD2
**Unless otherwise stated, P_VDD1・2=5V, VEN1=VEN2= P_VDD1・2
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1：When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes.
If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance.
*2：EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100
*3：On resistance (Ω)= (VIN - Lx pin measurement voltage) / 100mA
*4：Designed value.
*5：Time until it short-circuits LX1 (LX2 in the side of 2CH) with GND via 1Ωof resistor from an operational state and is set to Low level
from current limit pulse generating.
*6：”H” is judged as “H”>VIN-0.1V, ”L” is judged as ”L”<0.1V.
*7：When temperature is high, a current of approximately 20μA (maximum) may leak.
*8：Current which EN1 and EN2 are measured separately.
*9：Lead current which LX1 and LX2 are measured separately.
7/21
XC9515 Series
■ELECTRICAL CHARACTERISTICS (Continued)
XC9515BA06xx
●VD (MR pin is) internally floating
PARAMETER
Detect Voltage
Ta=25 oC
SYMBOL
VDF(E)
CONDITIONS
(*1)
(*2)
MIN.
TYP.
MAX. UNITS CIRCUIT
2.94
3.00
3.06
-VDF(E) }/ VDF(E)×100
5.0
V
⑤
%
-
mA
④
Hysteresis Width
VHYS
VHYS={VDR(E)
VD Output Current
IDOUT
P_VDD1・2=VDF-0.01V, Apply 0.5V to VDOUT
Delay Resistance
RDLY
MR "H" Level Voltage
VMR
VDOUT=”H” Level Voltage
(*3)
1.2
5.5
MR "L" Level Voltage
VMR
VDOUT=”L” Level Voltage
(*3)
AVSS
0.4
V
④
MR "H" Level Current
IMR
P_VDD1・2=MR=5.5V
0.1
μA
④
MR "L" Level Current
IMR
P_VDD1・2=5.5V,MR=0V
μA
④
5.0
6.6
8.0
2.5
(*８)
-0.1
MΩ
-
V
④
Test Conditions：
* P_VDD1・2 stands for P_VDD1=P_VDD2
**Unless otherwise stated, P_VDD1・2=5V, VEN1=VEN2= P_VDD1・2
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1：VDF(E)=Detect Voltage
*2：VDR(E)=Release Voltage
*3：”H” is judged as “H”>VIN-0.1V, ”L” is judged as “L”<0.1V
XC9515BA01xx
●Whole Circuit (VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz, EN1 and EN2 pins are internally floating)
PARAMETER
SYMBOL
Supply Current 1
IDD1
VOUT1=VOUT2= Setting Voltage×0.9
CONDITIONS
MIN.
Ta=25 oC
TYP.
MAX. UNITS CIRCUIT
950
1500
μA
⑥
Supply Current 2
IDD2
VOUT1=VOUT2= Setting Voltage×1.1 (Oscillation stops)
75
145
μA
⑥
Stand-by Current
ISTB
EN1=EN2=0V
5.5
11
μA
⑥
UVLO Detect Voltage
VUVLOF
VIN voltage which VOUT1=0V and LX pin becomes ”L”
(*1)
2.1
V
②
UVLO Release Voltage
VUVLOR
VIN voltage which VOUT1=0V and LX pin becomes ”H”
(*1)
2.3
V
②
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis Width
1.8
TTSD
150
o
-
THYS
20
o
-
Test Conditions：
* P_VDD1・2 stands for P_VDD1=P_VDD2
**Unless otherwise stated, P_VDD1・2=5V, VEN1=VEN2= P_VDD1・2
*** A_VSS=P_VSS1=P_VSS2=0V
NOTE :
*1：”H” is judged “H”>VIN-0.1V, ”L” is judged “L”<0.1V
8/21
1.5
C
C
XC9515
Series
■TYPICAL APPRICATION CIRCUIT
L1
VOUT1
EN1
VIN
CL1
EN2
EN1
LX1
PVDD
1
CIN1
NC
EN2
VOUT
1
NC
PVSS
1
MR
MR
AVSS
NC
PVSS
2
NC
LX2
NC
PVDD
2
NC
VDOUT
Cd
VOUT
2
Cd
RUP
CIN2
L2
CL2
VDOUT
VOUT2
＜Example of the External Components＞
L1
：4.7μH（CDRH4D28C, SUMIDA）
L2
：4.7μH（CDRH4D28C, SUMIDA）
CIN1
：10μF（ceramic）
CIN2
：10μF（ceramic）
CL1
：10μF（ceramic）
CL2
：10μF（ceramic）
RUP ：100kΩ
9/21
XC9515 Series
■OPERATIONAL EXPLANATION
XC9515 series consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator, phase
compensation circuit, output voltage adjustment resistors, P-channel driver transistor, N-channel synchronous switching
transistor, current limit circuit, UVLO circuit and others. The series ICs compare, using the error amplifier, the voltage of the
internal voltage reference source with the feedback voltage from VOUT pin through split resistors, RFB1 and RFB2. Phase
compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the
turn-on time during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error
amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause
the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The
current feedback circuit monitors the P-channel driver transistor current for each switching operation, and modulates the error
amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR
capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage.
<Reference Voltage Source>
The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC converter.
<Ramp Wave Circuit>
The ramp wave circuit determines switching frequency. The frequency is fixed internally at 1MHz. Clock pulses generated
in this circuit are used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits.
<Error Amplifier>
The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback
voltage divided by the internal split resistor, RFB1 and RFB2. When a voltage lower than the reference is fed back, the output
voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier output are fixed
internally to deliver an optimized signal to the mixer.
<Current Limit>
The current limiter circuit of the XC9515 series monitors the current flowing through the P-channel MOS driver transistor
connected to the Lx pin, and features a combination of the current limit mode and the latch mode.
①When the driver current is greater than a specific level (peak value of coil current), the current limit function operates to off
the pulses from the Lx pin at any giving timing.
②When the driver transistor is turned off, the limiter circuit is then released from the current limit detection state.
③At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of an
over current state.
④When the over current is eliminated, the IC resumes its normal operation.
The IC waits for the over current state to end by repeating the steps ① to ③. If an over current state continues for a few
ms and the above three steps are repeatedly performed, the IC performs the function of latching the OFF state of the
driver transistor. Both two DC/DC blocks stop operations when either CH1 or CH2 of protection circuit is activated. At
this time, both Lx1 and Lx2 become high impedance. Once the IC is in latch mode, operations can be resumed by either
turning the IC off after letting EN1 and EN2 pins down to low level, or by restoring power. For restoring power, the IC
should be turned off after P_VDD1 and P_VDD2 voltages drop below the low level of EN1 and EN2 pin.）The latch operation
can be released from the current limit detection state because of the circuit’s noise. Also, depending on the state of the
PC Board, latch time may become longer and latch operation may not work. In order to avoid the effect of noise, the
board should be laid out so that capacitors are placed as close to the chip as possible.
Limit < # ms
10/21
Limit < # ms
XC9515
Series
■OPERATIONAL EXPLANATION (Continued)
<Thermal Shutdown>
For protecting the IC from heat damage, the thermal shutdown circuit monitors the chip temperature. When the chip
temperature reaches 150℃, the thermal shutdown circuit operates and the driver transistor will be set to OFF. As the chip
temperature drops to 130℃ by stopping current flow, the soft-start function operates to turn the output on.
<Short-Circuit Protection>
The short-circuit protection circuit monitors the FB voltage. If the output is shorted incorrectly with the ground, the
short-circuit protection circuit operates and turns the driver transistor off to latch when the FB voltage becomes less than half
of the setting voltage. Both two DC/DC blocks stop operations when either CH1 or CH2 of protection circuit is activated. At
this time, both Lx1 and Lx2 become high impedance. Once the IC is in latch mode, operations can be resumed by either
turning the IC off after letting both ends of EN1 and EN2 pins down to low level, or by restoring power. (The P_VDD1 and
P_VDD2 voltages should be less than the low level of the EN1 and EN2 pins when restoring power.)
<Soft Start Function>
The soft-start circuit protects against inrush current, when the power is switched on, and also to protect against voltage
overshoot. It should be noted, however, that this circuit does not protect the load capacitor (CL) from inrush current. With
the Vref voltage limited and depending upon the input to the error amps, the operation maintains a balance between the two
inputs of the error amps and controls the EXT1 pin's ON time so that it doesn't increase more than is necessary.
<UVLO Circuit>
When the VIN pin voltage becomes1.8V (TYP.) or lower (for XC9515A, 2.7V or lower), the P-channel output driver transistor is
forced OFF to prevent false pulse output caused by unstable operation of the internal circuitry. When the VIN pin voltage
becomes 1.9V (TYP.) or higher (for XC9515A, 3.0V or lower), switching operation takes place. By releasing the UVLO
function, the IC performs the soft-start function to initiate output startup operation.
<Voltage Detector Block>
The series' detector function monitors the voltage divided by resistors connected to the P_VDD1 pin, as well as monitoring the
voltage of the internal reference voltage source via the comparator. Because of hysteresis at the detector function, output at
the VDOUT pin will invert when the sense pin voltage of the detector block (P_VDD1) increases above the release voltage (105%
of the detect voltage). The output configuration of the VDOUT pin is N-channel open drain, therefore, a pull-up resistor is
required. The voltage detector block has a manual reset (MR) pin. By setting the MR pin at low level, the VDOUT pin is forced
to be at low level.
By connecting a capacitor (Cd) to the Cd pin, the XC9515 series can set a delay time to VDOUT pin’s output signal when
releasing voltage. The delay time can be calculated from the internal resistance, Rdelay (2.5MΩ fixed TYP.) and the
value of Cd as per the following equation. As selecting the capacitor (Cd), the delay time can be set freely.
tDR (Delay time) ＝Cd x Rdelay x 0.69
●Release Delay
Delay Capacity Cd [μF]
0.01
0.022
0.047
0.1
0.22
0.47
1
Release Delay tDR (TYP.) [ms]
17
38
81
173
380
811
1725
Ta=25 oC
Release Delay tDR (MIN.～MAX.) [ms]
10～24
23～53
49～113
103～242
228～532
487～1135
1035～2415
11/21
XC9515 Series
■NOTES ON USE
1.
Please use this IC within the stated maximum ratings. The IC is liable to malfunction should the ratings be exceeded.
2.
Please apply the same electrical potential to the P_VDD1 and P_VDD2 pins. Even where either CH1 or CH2 is used, both
P_VDD1 and P_VDD2 pins should have the same electrical potential. Applying the electrical potential to only one side
causes malfunction. Also the same electrical potential should be applied to the P_VSS1, P_VSS2 and A_VSS pins.
3.
The XC9515 series is designed for use with ceramic output capacitors. If, however, the potential difference between
dropout voltage or output current is too large, a ceramic capacitor may fail to absorb the resulting high switching energy and
the output could be unstable. If the input-output potential difference is large, use a larger output capacitor to compensate for
insufficient capacitance.
4.
When the peak current, which exceeds limit current flows within the specified time, the built-in driver transistor is turned off
(the integral latch circuit). During the time until it detects limit current and before the built-in transistor can be turned off, the
current for limit current flows; therefore, care must be taken when selecting the rating for the coil.
5.
When the input voltage is low, limit current may not be reached because of voltage falls caused by ON resistance or serial
resistance of the coil.
6.
Since the potential difference for input voltage has occurred to the both ends of a coil, the time changing rate of the coil
current is large when the P-channel driver transistor is ON. On the other hand, since the VOUT pin short-circuits to the GND
when the N-channel transistor is ON and there is almost no potential difference of the coil both ends, the time changing rate
of the coil current becomes very small.
This operation is repeated and the delay time of the circuit also influences, therefore, the coil current is converged on the
current value beyond the amount of current which should be restricted essentially.
The short-circuit protection does not operate during the soft-start time. As soon as the soft-start time finishes, the
short-circuit protection starts to operate and the circuit becomes disable.
The delay time of the circuit also influences when step-down ratio is large, as the result, a current more than over current
limit may flow. Please do not exceed the absolute maximum ratings of the coil.
①
②
③
④
⑤
A current flows to the driver transistor up to the current limit (ILIM).
For the delay time of the circuit, a current more than the ILIM flows after the ILIM decide until the P channel driver
transistor turns off.
Time changing rate of the coil current becomes very small because there is no potential difference between both ends
of the coil.
The Lx pin oscillates a narrow pulse during the soft-start time because of the current limit.
The circuit is latched since the short-circuit protection operates and the P-channel driver transistor is turned off.
# ms
12/21
XC9515
Series
■NOTES ON USE (Continued)
7.
Driving current below the minimum operating voltage may lead malfunction to the UVLO circuit because of the noise.
8.
Depending on the PC board condition, the latch function may be released from limit current detection state and the latch
time may extend or fail to reach the latch operation. Please locate the input capacitance as close to the IC as possible.
9.
Spike noise and ripple voltage arise in a switching regulator as with a DC/DC converter. These are greatly influenced by
external component selection, such as the coil inductance, capacitance values, and board layout of external components.
Once the design has been completed, verification with actual components should be done.
10. With the DC/DC converter block of the IC, the peak current of the coil is controlled by the current limit circuit. Since the
peak current increases when dropout voltage or load current is high, current limit starts operating, and this can lead to
instability. When peak current becomes high, please adjust the coil inductance value and fully check the circuit operation.
In addition, please calculate the peak current according to the following formula:
Peak current: Ipk = (VIN - VOUT) x OnDuty / (2 x L x fosc) + IOUT
L: Coil Inductance Value, fOSC: Oscillation Frequency
11. When the load current is light in PWM control, very narrow pulses will be outputted, and there is the possibility that some
cycles may be skipped completely.
12. When the difference between VIN and VOUT is small, and the load current is heavy, very wide pulses will be outputted and
there is the possibility that some cycles may be skipped completely.
13. If the power input pin voltage is assumed to decrease rapidly (ex. from 6.0V to 0V) at the release of the operation
although delay capacitance (Cd) pin is connected, please connect an Shottky barrier diode between the power input
(P_VDD1) pin and the delay capacitance (Cd) pin.
14. Please connect a pull-up resistor with 100 to 200kΩ to the output pin of the voltage detector block (VDOUT).
15. The delay time of the voltage detector block in heavy load may extend because of the noise of the DC/DC block.
Precipitous and large voltage fluctuation at the power input pin may cause malfunction of the IC.
16. Use of the IC at voltages below the minimum operating voltage may lead the output voltage drop before achieving over
current limit.
17. When P_VDD1 and P_VDD2 power supply pins and EN1 and EN2 enable pins are in undefined states, the latch
protection circuit may not be reset so that the IC operation does not start correctly. Power supply and enable pins
（EN1,EN2） should be grounded before starting the IC operation.
【Undefined state conditions for each pin】
P_VDD1=P_VDD2=0.1V ~ 1.2V
VEN1=VNE2= 0.4V ~ 1.2V
18. UVLO function works even if when VIN input voltage falls below the UVLO voltage in very short time period like a few ten
nanoseconds.
●Instruction on Pattern Layout
1.
In order to stabilize VIN's voltage level, we recommend that a by-pass capacitor (CIN1 and CIN2) be connected as close
as possible to the P_VDD1・P_VDD2 pins and P_VSS1・P_VSS2 pins.
2. Please mount each external component as close to the IC as possible.
3. Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit
impedance.
4. Make sure that the VSS traces are as thick as possible, as variations in the VSS potential caused by high VSS currents
at the time of switching may result in instability of the DC/DC converter.
13/21
XC9515 Series
■TEST CIRCUITS
Wave Form Measurement Point
< Test Circuit No.1 >
Wave Form Measurement Point
A
L
CL
LX1
EN1
PVDD1
EN2
PVSS1
PVSS2
VOUT1
MR
AVSS
CD
VOUT2
VDOUT
CIN
CIN
PVDD2
CL
L
LX2
V
A
V
Wave
Form
Point
Wave
FormMeasurement
Measurement Point
※　External Components
L
: 4.7μH(CDRH4D28C : SUMIDA)
CIN : 10μF (ceramic)
CL : 10μF (ceramic)
Wave Form Measurement Point
Wave Form Measurement Point
< Test Circuit No.2 >
A
A
1μF
V
V
LX1
EN1
PVDD1
EN2
PVSS1
PVSS2
VOUT1
MR
AVSS
CD
VOUT2
VDOUT
PVDD2
A
LX2
V
Wave Wave
FormForm
Measurement
Point
Measurement
Point
< Test Circuit No.3 >
100ｍA
A
V
1μF
100ｍA
A
14/21
V
LX1
EN1
PVDD1
EN2
PVSS1
PVSS2
VOUT1
MR
AVSS
CD
VOUT2
VDOUT
PVDD2
LX2
XC9515
Series
■TEST CIRCUITS (Continued)
Wave Form Measurement Point
Wave Form Measurement Point
15/21
XC9515 Series
■TYPICAL PERFORMANCE CHARACTERISTICS
(1) Efficiency vs. Output Current
VIN=5V,FOSC=1MHz
L=4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
100
VOUT=3.3V
90
Efficiency[%]
Efficiency:
EFFI (%)
80
70
60
VOUT=1.5V
50
40
30
20
VOUT=1.8V
10
0
1
10
100
Output Current
Current:: IIOUT
OUT (mA)
Output
[mA]
1000
(2) Output Voltage vs. Output Current
VOUT=1.5V
VIN=5. 0V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
VOUT=1.8V
VIN=5. 0V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic), CL=10uF(ceramic)
1.90
Output Voltage : VOUT[V]
OutputVoltage
Voltage:: VOUT[V]
VOUT (V)
Output
1.60
1.55
1.50
1.45
1
10
100
Output
Current
: IOUT[mA]
Output
Current:
IOUT (mA)
1000
VOUT=3.3V
VIN=5. 0V
L:4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
3.40
Output
Voltage:
VOUT (V)
Output
Voltage
: VOUT[V]
1.80
1.75
1.70
1.40
3.35
3.30
3.25
3.20
1
16/21
1.85
10
100
Output
Current
: IOUT[mA]
Output
Current:
IOUT (mA)
1000
1
10
100
Output
Current
: IOUT[mA]
Output
Current:
IOUT (mA)
1000
XC9515
Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(3) Output Voltage vs. Ambient Temperature
VVout=1.2V
OUT=1.2V
VVout=1.5V
OUT=1.5V
V IN=2.5V,3.0V,4.0V,5.0 V,5.5V
L:4.7 uH(CDRH 4D28C),CIN =10uF(ce ramic),CL=10uF(ceramic)
1.30
1.60
1.25
1.55
Output Voltage:Vout1[v]
Output Voltage:Vout1[v]
V IN=2.5V,3.0V,4.0V,5.0V,5.5 V
L:4.7uH(CDRH 4D28C),CIN =10uF(c eram ic ),CL=10uF(ce ramic)
1.20
1.15
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
1.10
1.05
1.50
1.45
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
1.40
1.35
1.30
1.00
-50
-25
0
25
50
75
-50
100
-25
VVout=1.8V
OUT=1.8V
V IN=2.5V,3.0V,4.0V,5.0V,5.5 V
L:4.7uH(CDRH 4D28C),CIN =10uF(c eram ic ),CL=10uF(ce ramic)
50
75
100
VOUT=3.3V
Vout=3.3V
VIN =4.0V,5.0 V,5.5V
L:4.7 uH(CDRH 4D28C),CIN =10uF(ce ramic),CL=10uF(ceramic)
1.90
3.40
1.85
3.35
Output Voltage:Vout2[v]
Output　Voltage:Vout1[v]
25
Ambient T emperature:Ta[℃ ]
Ambient Temperature:Ta[℃ ]
1.80
1.75
0
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
1.70
1.65
3.30
3.25
VIN=4.0V,5.0V,5.5V
3.20
3.15
3.10
1.60
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Ambient Temperature:Ta[℃ ]
Ambient Temperature:Ta[℃ ]
(4) Oscillation Frequency vs. Ambient Temperature
OscillationFrequency:
FrequencyfOSC (MHz)
Oscillation
:FOSC[MHz]
fOSC=1MHz
FOSC=1MHz
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
L:4.7uH(CD RH4D28C),CIN =10uF(ceramic),CL=10uF(ceramic)
1.2
1.1
1.0
0.9
VIN=2.5V,3.0V,4.0V,5.0V,5.5V
0.8
0.7
-50
-25
0
25
50
75
100
Ambient Temperature:Ta[℃ ]
17/21
XC9515 Series
■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(5) Load Transient Response
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VIN=5V,VOUT1=1.5V,VOUT2=3.3V,FOSC=1MHz,
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT1=200mA
IOUT1=1mA
IOUT1=200mA
IOUT1=1mA
50μs/div
50μs/div
200μs/div
200μs/div
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VIN=5V,VOUT1=1.5V,VOUT2=3.3V,FOSC=1MHz,
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT1=800mA
IOUT1=200mA
IOUT1=800mA
IOUT1=200mA
50μs/div
50μs/div
200μs/div
200μs/div
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VIN=5V,VOUT1=1.5V,VOUT2=3.3V,FOSC=1MHz,
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT2=200mA
IOUT2=1mA
IOUT2=200mA
IOUT2=1mA
50μs/div
50μs/div
200μs/div
200μs/div
VIN=5V, VOUT1=1.5V, VOUT2=3.3V, fOSC=1MHz
VIN=5V,VOUT1=1.5V,VOUT2=3.3V,FOSC=1MHz,
VOUT1=200mV/div
VOUT1=200mV/div
VOUT2=200mV/div
VOUT2=200mV/div
IOUT2=800mA
IOUT2=200mA
IOUT2=200mA
50μs/div
50μs/div
18/21
IOUT2=800mA
200μs/div
200μs/div
XC9515
Series
■PACKAGING INFORMATION
Unit: mm
●QFN-20
(0.2)
4.00±0.10
1 PIN INDENT
+0.03
0.02 -0.02
4.00±0.10
0.75±0.05
7
8
9
10
5
11
4
12
3
13
2
14
1
15
*The solder filet may not be formed because of no plating at side.
(0.5)
2.70±0.05
6
0.20±0.05
0.40±0.05
2.70±0.05
19
18
17
16
●QFN-20 Reference Pattern Layout
●QFN-20 Reference Metal Mask Design
4.6
3.2
0.3
3.3
4.6
3.2
2.7
0.3
1.1
4.5
3.3
4.5
20
2.7
0.5
0.3
0.5
0.3
1.1
Thickness of solder paste：120μm (reference)
19/21
XC9515 Series
■MARKING RULE
●QFN-20
●Standard Product
①②③Represent product series
MARK
1pin
①②③④⑤⑥
⑦⑧⑨
①
②
③
5
1
5
PRODUCT SERIES
XC9515******-G
④Input Voltage Range, UVLO Voltage
MARK
PRODUCT SERIES
QFN-20
(TOP VIEW)
A
XC9515A*****-G
B
XC9515B*****-G
⑤EN Pin, MR Pin, Internal Control
PRODUCT SERIES
MARK
A
XC9515*A****-G
B
XC9515*B****-G
C
XC9515*C****-G
D
XC9515*D****-G
OPTIONAL FUNCTIONS
Input Voltage Range 5V±10%, UVLO
Voltage 2.7V (TYP.)
Input Voltage Range 2.5V～5.5V, UVLO
Voltage 1.8V (TYP.)
OPTIONAL FUNCTIONS
EN1, EN2 Pin Open
MR Pin Open
Built-in EN1, EN2 Pin Pull-up Resistance
Built-in MR Pin Pull-up Resistance
EN1, EN2 Pin Open
Built-in MR Pin Pull-up Resistance
Built-in EN1, EN2 Pin Pull-up Resistance
MR Pin Open
⑥⑦Represents integer number of setting voltage
MARK
PRODUCT SERIES
⑥
⑦
0
1
XC9515**01**-G
⑧⑨Represents production lot number
Order of 01, …09, 10, 11, …99, 0A, …0Z, 1A, …9Z, A0, …Z9, AA, …ZZ.
(G, I, J, O, Q, W excepted)
*No character inversion used.
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XC9515
Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics.
Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
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