2.7V to 5.5V, 3A 1ch Synchronous Buck Converter integrated FET BD8963EFJ ●General Description ROHM’s high efficiency step-down switching regulator BD8963EFJ is a power supply designed to produce a low voltage including 1 volts from 5.5/3.3 volts power supply line. Offers high efficiency with synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. ●Key Specification Input voltage range: Output voltage range: Average output Current: Switching frequency: Pch FET ON resistance: Nch FET ON resistance: Standby current: Operating temperature range: ●Features Offers fast transient response with current mode PWM control system. Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) Incorporates soft-start function. Incorporates thermal protection and ULVO functions. Incorporates short-current protection circuit with time delay function. Incorporates shutdown function ●Package HTSOP-J8 2.7V to 5.5V 1.0V to 2.5V 3A(Max.) 1MHz(Typ.) 145mΩ(Typ.) 80mΩ(Typ.) 5μA (Typ.) -25℃ to +85℃ (Typ.) (Typ.) (Max.) 4.90mm x 6.00mm x 1.00mm ●Applications Power supply for LSI including DSP, Micro computer and ASIC HTSOP-J8 ●Typical Application Circuit VCC Cin L VCC EN VOUT VOUT SW ADJ ESR COMP GND RO CO RCOMP CCOMP Fig.1 Typical Application Circuit ○Product structure：Silicon monolithic integrated circuit www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･14･001 ○This product is not designed protection against radioactive rays. 1/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Pin configuration(TOP VIEW) COMP ADJ GND N.C EN SW VCC SW Fig.2 Pin configuration ●Pin Description Pin No. Pin name 1 COMP 2 GND PIN function GmAmp output pin/Connected phase compensation capacitor Ground 3 EN Enable pin(Active High, Open Active) 4 VCC VCC power supply input pin 5 SW Pch/Nch FET drain output pin 6 SW Pch/Nch FET drain output pin 7 N.C Non Connect 8 ADJ Output voltage detect pin ●Block Diagram VCC SW SW GND Fig.3 Block Diagram www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 2/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Absolute Maximum Ratings Symbol Parameter Ratings VCC Voltage VCC EN Voltage VEN -0.3 to +7 SW,COMP Voltage VSW,VCOMP -0.3 to +7 Power Dissipation 1 Pd1 0.5 Power Dissipation 2 Pd2 3.76 Operating temperature range Topr -25 to +85 ℃ Storage temperature range Tstg -55 to +150 ℃ Tjmax +150 ℃ Maximum junction temperature *1 *2 *3 -0.3 to +7 Unit *1 V V V *2 W *3 W Pd should not be exceeded. Reduced by 4.0mW for increase in Ta of 1℃ above 25℃. Reduced by 30.0mW for increase in Ta of 1℃ above 25℃. (when mounted on a board 70.0mm × 70.0mm × 1.6mm Glass-epoxy PCB) ●Recommended Operating Ratings (Ta=-25 to +85℃) Parameter Power Supply Voltage Symbol VCC Ratings Min. 2.7 *5 Unit Typ. Max. 5.0 5.5 V EN Voltage VEN 0 - Vcc V Output voltage range VOUT 1.0 - 2.5 *4 V 3.0 *5 A SW average output current *4 *5 Isw - - In case set output voltage 1.6V or more, VccMin. = Vout +2.25V Pd should not be exceeded. ●Electrical Characteristics (Unless otherwise specified , Ta=25℃ VCC=5V, EN=VCC, R1=20kΩ, R2=7.5kΩ) Limit Parameter Symbol Unit Conditions Min. Typ. Max. Standby Current Bias Current ISTB - 5 20 µA EN=GND ICC - 350 600 µA EN Low Voltage VENL - GND 0.3 V Stand-by Mode EN High Voltage VENH 2.0 VCC - V Active Mode IEN - 1.25 10 µA VEN=5V FOSC 0.8 1 1.2 MHz Pch FET ON Resistance RONP - 145 290 mΩ VCC=5V Nch FET ON Resistance RONN - 80 160 mΩ VCC=5V ADJ Reference Voltage VADJ 0.788 0.800 0.812 V COMP SINK Current ICOSI 10 25 - µA VADJ=1.0V COMP Source Current ICOSO 10 25 - µA VADJ=0.6V UVLO Threshold Voltage VUVLO1 2.400 2.500 2.600 V Vcc=5V→0V UVLO Hysteresis Voltage VUVLO2 2.425 2.550 2.700 V Vcc=0V→5V TSS 0.5 1 2 ms TLATCH 1 2 4 ms VSCP - VOUT×0.5 VOUT×0.7 V EN Current Oscillation Frequency Soft Start Time Timer Latch Time Output Short circuit Threshold Voltage www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 3/21 VOUT=1.0V→0V TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Typical Performance Curves Fig.5 VEN-Vout Fig.4 Vcc-Vout Fig. 7 Ta-VOUT Fig.6 IOUT-VOUT www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 4/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet EFFICIENCY[%] BD8963EFJ Fig.8 Efficiency Fig.9 Ta-FOSC Fig.11 Ta-VEN Fig.10 Ta-RONN, RONP www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 5/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ Fig.12 Ta-ICC Fig.13 Vcc-FOSC Fig.15 SW waveform Io=10mA Fig.14 Soft start waveform www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 6/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ Fig. 16 Transient response Io=0.5A→1.5A(10µs) www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 Fig. 17 Transient response Io=1.5A→0.5A(10µs) 7/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ Application Information ●Operation ○Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. ○Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. ・PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation. SENSE Current Comp RESET VOUT Level Shift R Q FB SET Gm Amp. COMP S IL Driver Logic VOUT SW Load OSC Fig.18 Diagram of current mode PWM control PVCC Current Comp SENSE Current Comp FB SET GND SET RESET GND RESET SW GND SW IL IL(AVE) VOUT VOUT(AVE) VOUT Fig.19 PWM switching timing chart www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 8/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Description of operations ・Soft-start function EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. ・Shutdown function With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 5µA (Typ.). ・UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. of 50mV (Typ.) is provided to prevent output chattering. And the hysteresis width Hysteresis 50mV VCC EN VOUT Tss Tss Tss Soft start Standby mode Standby mode Operating mode Operating mode UVLO UVLO Standby mode Operating mode EN Standby mode UVLO Fig.20 Soft start, Shutdown, UVLO timing chart ・Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO. EN Output OFF latch Output Short circuit Threshold Voltage VOUT IL Limit IL t1<TLATCH Standby mode t2=TLATCH Operating mode EN Standby mode Timer latch Operating mode EN Fig.21 Short-current protection circuit with time delay timing chart www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 9/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Information on advantages Advantage 1 : Offers fast transient response with current mode control system. Conventional product (Load response IO= 0.5A→1.5A) BD8963EFJ (Load response IO= 0.5A→1.5A) VOUT VOUT 36mV 75mV IOUT IOUT Voltage drop due to sudden change in load was reduced by about 50%. Fig.22 Comparison of transient response Advantage 2 : Offers high efficiency with synchronous rectifier Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. ON resistance of P-channel MOS FET : 145mΩ(Typ.) ON resistance of N-channel MOS FET : 80mΩ(Typ.) 100 90 EFFICIENCY:η [%] 80 70 60 50 40 【VOUT=1.1V】 VCC=5.0V Ta=25℃ 30 20 10 0 10 100 1000 OUTPUT CURRENT:IOUT[mA] 10000 Fig.23 Efficiency Advantage 3 :・Supplied in smaller package due to small-sized power MOS FET incorporated. ・Output capacitor Co required for current mode control: 10µF ceramic capacitor ・Inductance L required for the operating frequency of 1 MHz: 1.5µH inductor Reduces a mounting area required. VCC 15mm Cin CIN RCOMP DC/DC Convertor Controller RCOMP L VOUT L 10mm CCOMP Co CO CCOMP Fig.24 Example application www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 10/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Switching regulator efficiency Efficiency ŋ may be expressed by the equation shown below: η= VOUT×IOUT ×100[%]= Vin×Iin POUT Pin ×100[%]= POUT POUT+PDα ×100[%] Efficiency may be improved by reducing the switching regulator power dissipation factors P Dα as follows: Dissipation factors: 2 1) ON resistance dissipation of inductor and FET：PD(I R) 2) Gate charge/discharge dissipation：PD(Gate) 3) Switching dissipation：PD(SW) 4) ESR dissipation of capacitor：PD(ESR) 5) Operating current dissipation of IC：PD(IC) 2 2 1)PD(I R)=IOUT ×(RCOIL+RON) (RCOIL[Ω]：DC resistance of inductor, RON[Ω]：ON resistance of FET, IOUT[A]：Output current.) 2 2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET, f[Hz]：Switching frequency, V[V]：Gate driving voltage of FET) 2 3)PD(SW)= Vin ×CRSS×IOUT×f IDRIVE (CRSS[F]：Reverse transfer capacitance of FET, IDRIVE[A]：Peak current of gate.) 2 4)PD(ESR)=IRMS ×ESR (IRMS[A]：Ripple current of capacitor, ESR[Ω]：Equivalent series resistance.) 5)PD(IC)=Vin×ICC (ICC[A]：Circuit current.) www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 11/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Consideration on permissible dissipation and heat generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. 4 ① IC only θj-a=249.5℃/W ②1 layers（copper foil area:0mm×0mm） θj-a=153.2℃/W ③2 layers（copper foil area:15mm×15mm） θj-a=113.6℃/W ④2 layers（copper foil area:70mm×70mm） θj-a=59.2℃/W ⑤4 layers（copper foil area:70mm×70mm） θj-a=33.3℃/W (when mounted on a board 70mm×70mm×1.6mm Glass-epoxy PCB with termal Via) ⑤3.76W Power dissipation:Pd [W] 3 P=IOUT2×RON RON=D×RONP+(1-D)RONN D：ON duty (=VOUT/VCC) RCOIL：DC resistance of coil RONP：ON resistance of P-channel MOS FET RONN：ON resistance of N-channel MOS FET IOUT：Output current ④2.11W 2 ③1.10W 1 ②0.82W ①0.50W 0 0 25 50 75 85 100 125 150 Ambient temperature:Ta [℃] Fig.25 Thermal derating curve (HTSOP-J8) Ex.)VCC=5V, VOUT=1.1V, RONP=0.145Ω, RONN=0.08Ω IOUT=3A, for example, D=VOUT/VCC=1.1/5=0.22 RON=0.22×0.145+(1-0.22)×0.08 =0.0319+0.0624 =0.0943[Ω] 2 P=3 ×0.0943=0.8487[W] As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 12/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Selection of components externally connected 1. Selection of inductor (L) The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. IL ΔIL VCC ΔIL= (VCC-VOUT)×VOUT [A]・・・(1) L×VCC×f IL Appropriate ripple current at output should be 20% more or less of the maximum output current. VOUT L ΔIL=0.2×IOUTmax. [A]・・・(2) Co (VCC-VOUT)×VOUT L= [H]・・・(3) ΔIL×VCC×f (ΔIL: Output ripple current, and f: Switching frequency) Fig.26 Output ripple current *Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If VCC=5V, VOUT=1.1V, f=1MHz, ΔIL=0.2×3A=0.6A, for example,(BD8963EFJ) (5-1.1)×1.1 L= 0.6×5×1M =1.43µ → 1.5[µH] *Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (CO) Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. VCC Output ripple voltage is determined by the equation (4)： VOUT L ΔVOUT=ΔIL×ESR [V]・・・(4) (ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor) ESR Co *Rating of the capacitor should be determined allowing sufficient margin against output voltage. A 10µF to 100µF ceramic capacitor is recommended. Less ESR allows reduction in output ripple voltage. Fig.27 Output capacitor 3. Selection of input capacitor (Cin) VCC Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (5): Cin VOUT L Co IRMS=IOUT× √VOUT(VCC-VOUT) VCC [A]・・・(5) < Worst case > IRMS(max.) IOUT When Vcc is twice the VOUT, IRMS= Fig.28 Input capacitor 2 If VCC=5V, VOUT=1.1V, and IOUTmax.= 3A, (BD8963EFJ) √1.1×(5-1.1) =1.24[ARMS] 35 . A low ESR 22µF/10V ceramic capacitor is recommended to reduce3 ESR dissipation of input capacitor for better efficiency. IRMS=3× www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 13/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ 4. Determination of RCOMP, CCOMP that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier. fp(Min.) 1 2π×RO×CO 1 fz(ESR)= 2π×ESR×CO fp= A Gain [dB] fp(Max.) 0 fz(ESR) IOUTMin. Phase [deg] Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. IOUTMax. 0 -90 fp(Min.)= 1 [Hz]←with lighter load 2π×ROMax.×CO fp(Max.)= 1 2π×ROMin.×CO Fig.29 Open loop gain characteristics [Hz] ←with heavier load A fz(Amp.) Zero at power amplifier Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacitor ESR reduces to half.) Gain [dB] 0 0 Phase [deg] fz(Amp.)= -90 1 2π×RITH×CITH Fig.30 Error amp phase compensation characteristics VCC Cin EN VOUT VCC L ADJ COMP VOUT SW ESR GND RO CO RCOMP CCOMP Fig.31 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2π×RCOMP×CCOMP www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 = 1 2π×ROMax.×CO 14/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ 5. Determination of output voltage The output voltage VOUT is determined by the equation (6): VOUT=(R2/R1+1)×VADJ・・・(6) VADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required. 5 L 6 Output SW Co R2 8 Adjustable output voltage range : 1.0V to 2.5V ADJ R1 Fig.32 Determination of output voltage If a resistor of the resistance higher than 100 kΩ is used, check the assembled set The lower limit of input voltage depends on the output voltage. Basically, it is recommended to use in the condition : VCCmin = VOUT+2.25V. Fig.33. shows the necessary output current value at the lower limit of input voltage. (DCR of inductor : 0.05Ω) This data is the characteristic value, so it’ doesn’t guarantee the operation range, 4.7 IN PU T VOLTAGE : VCC [V] Use 1 kΩ to 100 kΩ resistor for R1. carefully for ripple voltage etc. Vo=2.5V 4.2 3.7 Vo=2.0V Vo=1.5V 3.2 Vo=1.8V 2.7 0 0.5 1 1.5 2 2.5 3 OUTPUT CURRENT : IOUT[A] Fig.33 minimum input voltage in each output voltage www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 15/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Cautions on PC Board layout ① Vout VCC L1 ①5 SW VCC SW EN N.C GND ADJ COMP 6 ②,④ 7 R2 ①,③ 3 C3 2 ①,③ ②,④ 1 R3 C2 ①,③ 8 4 ⑥ R1 C1 ⑤ Fig.34 Layout diagram ①To avoid conduction loss, please keep Black thick line as short and thick as possible. ②Don't close to switching current loop. ③Close to IC pin as possible. ④Keep PCB trace as short as possible. ⑤Use single point ground structure to connect with Pin2. ⑥Close to C2 as possible. ※ HTSOP-J8 (BD8963EFJ) has thermal PAD on the reverse of the package. The package thermal performance may be enhanced by bonding the PAD to GND plane which take a large area of PCB. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 16/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ Top Silkscreen Overlay Top Layer Middle Layer Bottom Layer Bottom Silkscreen Overlay Fig.35 Reference PCB Layout Pattern www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 17/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Recommended components Lists on above application Symbol Part Value Manufacturer L Coil 1.5µH TDK CIN Ceramic capacitor CO Ceramic capacitor CCOMP RCOMP Ceramic capacitor Resistance Series VLC6045T-1R5N Vcc-VOUT>3V 10µF Kyocera CM316X5R106M10A Vcc-VOUT<3V 22µF Kyocera CM32X5R226M10A Kyocera CM316X5R106M10A 10µF VOUT=1.0V 330pF Murata GRM18 Series VOUT=1.1V 330pF Murata GRM18 Series VOUT=1.2V 330pF Murata GRM18 Series VOUT=1.5V 390pF Murata GRM18 Series VOUT=1.8V 390pF Murata GRM18 Series VOUT=2.5V 390pF Murata GRM18 Series VOUT=1.0V 2kΩ Rohm MCR03 Series VOUT=1.1V 2kΩ Rohm MCR03 Series VOUT=1.2V 2.4kΩ Rohm MCR03 Series VOUT=1.5V 2.4kΩ Rohm MCR03 Series VOUT=1.8V 3.6kΩ Rohm MCR03 Series VOUT=2.5V 5.6kΩ Rohm MCR03 Series * The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. ●I/O equivalence circuit 【BD8963EFJ】 ・SW pin ・EN pin VCC VCC VCC EN SW ・COMP pin ・ADJ pin VCC ADJ COMP Fig.36 I/O equivalence circuit www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 18/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Operational Notes 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4. Operation in Strong electromagnetic field Be noted that using the IC in the strong electromagnetic radiation can cause operation failures. 5. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 7. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic element are formed. If a resistor is joined to a transistor terminal as shown in Fig 37. ○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and ○if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. Resistor Transistor (NPN) Pin A Pin B C B Pin B E Pin A N + N P N + P P N P substrate Parasitic element GND P+ Parasitic element B N C + P P N E P substrate Parasitic element GND GND GND Parasitic element Other adjacent elements Fig.37 Simplified structure of monorisic IC 8. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 9. Selection of inductor It is recommended to use an inductor with a series resistance element (DCR) 0.1Ω or less. Especially, in case output voltage is set 1.6V or more, note that use of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and output will be latched OFF. When using an inductor over 0.1Ω, be careful to ensure adequate margins for variation between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it is recommended to start up the output with EN after supply voltage is within operation range. Status of this document The Japanese version of this document is formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document formal version takes priority www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 19/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Ordering Information B D 8 9 6 3 E F J Package EFJ: HTSOP-J8 Part Number E2 Packaging and forming specification E2: Embossed tape and reel ●Physical Dimension Tape and Reel Information ●Marking Diagram MSOP8(TOP VIEW) Part Number Marking D 6 8 9 3 LOT Number 1PIN MARK www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 20/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet BD8963EFJ ●Revision History Date Revision 17.Jan.2012 001 Changes New Release www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 21/21 TSZ02201-0J3J0AJ00040-1-2 02.MAR.2012 Rev.001 Datasheet Notice ●Precaution for circuit design 1) The products are designed and produced for application in ordinary electronic equipment (AV equipment, OA equipment, telecommunication equipment, home appliances, amusement equipment, etc.). If the products are to be used in devices requiring extremely high reliability (medical equipment, transport equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the ROHM sales staff in advance. If product malfunctions may result in serious damage, including that to human life, sufficient fail-safe measures must be taken, including the following: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits in the case of single-circuit failure 2) The products are designed for use in a standard environment and not in any special environments. Application of the products in a special environment can deteriorate product performance. Accordingly, verification and confirmation of product performance, prior to use, is recommended if used under the following conditions: [a] Use in various types of liquid, including water, oils, chemicals, and organic solvents [b] Use outdoors where the products are exposed to direct sunlight, or in dusty places [c] Use in places where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use in places where the products are exposed to static electricity or electromagnetic waves [e] Use in proximity to heat-producing components, plastic cords, or other flammable items [f] Use involving sealing or coating the products with resin or other coating materials [g] Use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering [h] Use of the products in places subject to dew condensation 3) The products are not radiation resistant. 4) Verification and confirmation of performance characteristics of products, after on-board mounting, is advised. 5) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 6) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 7) Confirm that operation temperature is within the specified range described in product specification. 8) Failure induced under deviant condition from what defined in the product specification cannot be guaranteed. ●Precaution for Mounting / Circuit board design 1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the remainder of flux may negatively affect product performance and reliability. 2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the Company in advance. Regarding Precaution for Mounting / Circuit board design, please specially refer to ROHM Mounting specification ●Precautions Regarding Application Examples and External Circuits 1) If change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics of the products and external components, including transient characteristics, as well as static characteristics. 2) The application examples, their constants, and other types of information contained herein are applicable only when the products are used in accordance with standard methods. Therefore, if mass production is intended, sufficient consideration to external conditions must be made. Notice - Rev.001 Datasheet ●Precaution for Electrostatic This product is Electrostatic sensitive product, which may be damaged due to Electrostatic discharge. Please take proper caution during manufacturing and storing so that voltage exceeding Product maximum rating won't be applied to products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). ●Precaution for Storage / Transportation 1) Product performance and soldered connections may deteriorate if the products are stored in the following places: [a] Where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] Where the temperature or humidity exceeds those recommended by the Company [c] Storage in direct sunshine or condensation [d] Storage in high Electrostatic 2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using products of which storage time is exceeding recommended storage time period . 3) Store / transport cartons in the correct direction, which is indicated on a carton as a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4) Use products within the specified time after opening a dry bag. ●Precaution for product label QR code printed on ROHM product label is only for internal use, and please do not use at customer site. It might contain a internal part number that is inconsistent with an product part number. ●Precaution for disposition When disposing products please dispose them properly with a industry waste company. ●Precaution for Foreign exchange and Foreign trade act Since concerned goods might be fallen under controlled goods prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. ●Prohibitions Regarding Industrial Property 1) Information and data on products, including application examples, contained in these specifications are simply for reference; the Company does not guarantee any industrial property rights, intellectual property rights, or any other rights of a third party regarding this information or data. Accordingly, the Company does not bear any responsibility for: [a] infringement of the intellectual property rights of a third party [b] any problems incurred by the use of the products listed herein. 2) The Company prohibits the purchaser of its products to exercise or use the intellectual property rights, industrial property rights, or any other rights that either belong to or are controlled by the Company, other than the right to use, sell, or dispose of the products. Notice - Rev.001