FAIRCHILD SG6858_09

SG6858
Low-Cost, Green-Mode, PWM Controller for Flyback
Converters
Features
Description
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This highly integrated PWM controller provides several
special enhancements designed to meet the low
standby-power needs of low-power SMPS. To minimize
standby power consumption, the proprietary greenmode function provides off-time modulation to linearly
decrease the switching frequency under light-load
conditions. This green-mode function enables the
power supply to meet even the strictest power
conservation requirements.
Green-Mode PWM
Supports the ”Blue Angel” Standard
Low Startup Current: 10µA (Maximum)
Low Operating Current: 2.5mA
Leading-Edge Blanking (LEB)
Constant Output Power Limit
Built-in Synchronized Slope Compensation
Current-Mode Operation
Cycle-by-Cycle Current Limiting
Under-Voltage Lockout (UVLO)
Programmable PWM Frequency
VDD Over-Voltage Protection with Auto-Restart
Gate Output Voltage Clamped at 17V
Few External Components Required
SSOT-26 and DIP-8 Packages Available
Applications
ƒ
Battery chargers for cellular phones, cordless
phones, PDAs, digital cameras, and power tools
ƒ
Power adapters for ink jet printers, video game
consoles, and portable audio players
ƒ
Open-frame SMPS for TV/DVD standby and other
auxiliary supplies, home appliances, PC 5V
standby power, and consumer electronics
ƒ
Replacements for linear transformers and RCC
SMPS
ƒ
Offline High Brightness (HB) LED drivers
The BiCMOS fabrication process enables reducing the
startup current to 10µA and the operating current to
2.5mA. To further improve power conservation, a large
startup resistance can be used. Built-in synchronized
slope compensation ensures the stability of peakcurrent-mode control. Proprietary internal compensation
provides a constant output power limit over a universal
AC input range (90VAC to 264VAC). Pulse-by-pulse
current limiting ensures safe operation even during
short circuits.
To protect the external power MOSFET from being
damaged by supply over voltage, the output driver is
clamped at 17V. SG6858 controllers can improve the
performance and reduce the production cost of power
supplies. The SG6858 replaces linear and RCC-mode
power adapters. It is available in 8-pin DIP and 6-pin
SSOT-26 packages.
Ordering Information
Part Number
Operating Temperature Range
Eco Status
Package
Packing Method
SG6858TZ
-40 to +125°C
RoHS
6-Pin SSOT-26
Tape & Reel
SG6858DZ
-40 to +125°C
RoHS
8-Pin DIP-8
Tube
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
www.fairchildsemi.com
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
September 2009
Bridge
Rectifier
Diode
L
EMI
AC Input
Filter
+
N
RSN2 CSN2
CSN
CBulk
RSN
RStart
DVDD
NP
NS
VO +
DR +
CO1 CO2
ZDO
DSN
+
CVDD
VO-
NA
5
VDD
GATE 6
3 RI
RRI
RG
SG6858
2 FB
SENSE 4
GND
CFB
CLF
1
RLF
RSENSE
Rd
R1
PC817
CF
RF
TL431
R2
Figure 1. Typical Application
Block Diagram
GND
RI
1(8)
3(5)
VDD
OVP
Soft
Driver
25V
OSC
S
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Typical Application
6(1) GATE
Q
R
VDD 5(2)
Internal
BIAS
Vlimit ramp
+
UVLO
Slope
Compensation
16.5V/11.5V
3R
Green
Mode
Controller
Blanking
Circuit
4(4) SENSE
5V
2(7) FB
2R
SOT(DIP)
Figure 2. Block Diagram
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
www.fairchildsemi.com
2
XXX:AAI=SG6858
TT: Die run code
●: Year code
— : Week code
Figure 3. SSOT-26
F: Fairchild Logo
Z: Assembly Plant Code
X: Year Code
Y: Week Code
TT: Die Run Code
T: N=DIP
P: Y=Green Package
M: Manufacture flow code
Figure 4. DIP-8
Pin Configuration
GND
1
6
GAT E
FB
2
5
VDD
RI
3
4
GATE
1
8
GND
VDD
2
7
FB
NC
3
6
NC
SE NSE
4
5
RI
SENSE
SOT - 26
DIP-8
Figure 5. Pin Configurations
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Marking Information
Pin Definitions
Pin #
Name Description
DIP-8 SSOT-26
1
6
GATE
2
5
VDD
Power supply.
NC
No connection.
3
4
5
Totem-pole output driver for the power MOSFET.
4
Current sense. This pin senses the voltage across a resistor. When the voltage
SENSE reaches the internal threshold, PWM output is disabled. This activates over-current
protection. This pin provides current amplitude information for current-mode control.
3
RI
A resistor connected from the RI pin to ground generates a constant current source.
This current is used to charge an internal capacitor to determine the switching
frequency. Increasing the resistance reduces the amplitude of the current source
and reduces the switching frequency. A 95kΩ resistor, RI, results in a 50µA constant
current, II, and a 70kHz switching frequency.
NC
No connection.
Feedback. The FB pin provides the output voltage regulation signal, and feedback to
the internal PWM comparator, so the PWM comparator can control the duty cycle.
6
7
2
FB
8
1
GND
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
Ground.
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are
given with respect to GND pin.
Symbol
Parameter
Min.
Max.
Unit
VDD
Supply Voltage
30
V
VFB
Input Voltage to FB Pin
-0.3
7.0
V
Input Voltage to SENSE Pin
-0.3
7.0
V
VSENSE
RΘJC
TJ
TSTG
TL
ESD
Thermal Resistance (Junction-to-Case)
SSOT
208.4
DIP
82.5
°C/W
Operating Junction Temperature
-40
+125
°C
Storage Temperature Range
-55
+150
°C
260
°C
Lead Temperature, Wave Soldering, 10 Seconds
Electrostatic Discharge Capability
Human Body Model, JESD22-A114
3.0
Machine Model, JESD22-A115
0.2
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VDD
DC Supply Voltage
TA
Operating Ambient Temperature
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
Min.
-40
Max.
Unit
22
V
+125
°C
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Absolute Maximum Ratings
www.fairchildsemi.com
4
VDD=15V, TA=-40°C ~+125°C (TA= TJ), unless otherwise specified.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
22
V
VDD Section
VDD-OP
Continuously Operating Voltage
VDD-ON
Turn-On Threshold Voltage
15.5
16.5
17.5
V
VDD-OFF
Turn-Off Voltage
10.5
11.5
12.5
V
IDD-ST
Startup Current
VDD=VDD-ON – 0.1V
10
15
µA
IDD-OP
Operating Supply Current
VDD=15V, GATE with
1nF to GND
2.5
3.5
mA
23
25
26
V
50
125
200
µsec
VDD-OVP
VDD Over-Voltage Protection Level
tD-VDDOVP
VDD OVP Debounce Time
VDD-G OFF
VDD Low Threshold Voltage to Exit Green
Off Mode
VDD-OFF VDD-OFF VDD-OFF
+ 0.95 + 1.10 + 1.25
V
2/5
V/V
5
kΩ
Feedback Input Section
AV
FB Input to Current Comparator Attenuation
ZFB
Input Impedance
VFB-OPEN
FB Pin Open High Voltage
4.5
5.0
5.5
V
VFB-N
Green Mode Entry FB Voltage
2.85
V
VFB-G
Green Mode Ending FB Voltage
2.20
V
75
Hz/mV
SG
Green Mode Modulation Slope
RI=95kΩ
Current Sense Section
ZSENSE
Input Impedance
tPD
Delay to Output
VSTHFL
Flat Threshold Voltage for Current Limit
VSTHVA
Valley Threshold Voltage for Current Limit
tLEB
DCYSAW
10
kΩ
60
110
0.96
Leading-Edge Blanking Time
V
0.75
0.80
0.85
V
240
300
360
ns
Maximum Duty
Cycle
Duty Cycle of SAW Limit
ns
45
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Electrical Characteristics
%
Oscillator Section
fOSC
Frequency
RI=95kΩ
Green Mode Frequency
RI=95kΩ
fDV
Frequency Variation vs. VDD Deviation
VDD=13.5V to 22V
fDT
Frequency Variation vs. Temperature
Deviation
TA=-40°C ~+125°C
fOSC-G
65
70
75
22
0
0.02
kHz
kHz
2.00
%
2
%
80
%
1.5
V
Output Section
DCYMAX
Maximum Duty Cycle
VGATE-L
Output Voltage Low
VDD=15V, IO=20mA
Output Voltage High
VDD=13.5V,
IO=20mA
tR
Rising Time
VDD=13.5V, CL=1nF
100
170
240
ns
tF
Falling Time
VDD=13.5V, CL=1nF
35
55
75
ns
Output Clamp Voltage
VDD=13.5V, TA=25°C
16
17
18
V
VGATE-H
VGATE-CLAMP
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
70
75
8
V
www.fairchildsemi.com
5
Turn-On Threas hold Voltage (V DD-O N ) v s
Turn-off Thres hold Voltage (V DD-OF F ) v s
Tem perature
Tem perature
17.5
12.5
12.1
V DD-O FF (V)
V DD-O N (V)
17.0
16.5
16.0
11.7
11.3
10.9
15.5
10.5
-40
-25
-10
5
20
35
50
65
80
95
110
125
-40
Tem perature (℃)
Figure 6. Turn-On Threshold Voltage (VDD-ON)
vs. Temperature
-10
5
35
50
65
80
95
110
125
Operating Supply Current (IDD-O P ) v s Tem perature
3.5
15
3.0
IDD-O P (m A)
20
10
5
2.5
2.0
0
1.5
-40
-25
-10
5
20
35
50
65
80
95
110
125
-40
-25
-10
5
20
35
50
65
80
95
110
125
Temperature (℃)
Temperature (℃)
Figure 8. Startup Current (IDD-ST) vs. Temperature
Figure 9. Operating Supply Current (IDD-OP)
vs. Temperature
Frequenc y (F O S C ) v s Tem perature
M ax im um Duty Cy c le (DCY MA X ) v s Tem perature
75
80
73
78
DCY MA X (%)
F O S C (KHz )
20
Tem perature (℃)
Figure 7. Turn-Off Threshold Voltage (VDD-OFF)
vs. Temperature
Startup Current(IDD-S T ) v s Temperature
IDD-S T (uA)
-25
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Typical Performance Characteristics
71
69
67
76
74
72
65
70
-40
-25
-10
5
20
35
50
65
80
95
110
125
-40
Temperature (℃)
-10
5
20
35
50
65
80
95
110
125
Temperature (℃)
Figure 10. Frequency (fOSC) vs. Temperature
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
-25
Figure 11. Maximum Duty Cycle (DCYMAX)
vs. Temperature
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6
Green-M ode Entry FB Voltage(V FB -N ) v s
Green-M ode Ending FB Voltage (V FB -G ) v s
Temperature
Tem perature
3.2
2.50
3.1
2.40
V FB -G (V)
V FB -N (V)
3.0
2.9
2.8
2.7
2.6
2.30
2.20
2.10
2.00
VDD=15V
VDD=15V
1.90
2.5
-40
-25
-10
5
20
35
50
65
80
95
110
-40
125
-25
-10
5
35
50
65
80
95
110
125
Tem perature (℃)
Tem perature (℃)
Figure 12. Green Mode Entry FB Voltage (VFB-N)
vs. Temperature
Figure 13. Green Mode Ending FB Voltage (VFB-G)
vs. Temperature
Operation Current (IDD-OP ) vs VDD Voltage
Leading-Edge Blank ing Time (t L E B ) v s Tem perature
3.5
350
330
3.0
IDD-OP (m A)
t L E B (ns ec )
20
310
290
270
2.5
2.0
VDD=15V
250
1.5
-40
-25
-10
5
20
35
50
65
80
95
110
125
12
13
14
Tem perature (℃)
16
17
18
19
20
21
22
23
VDD Voltage (V)
Figure 14. Leading-Edge Blanking Time (tLEB)
vs. Temperature
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
15
Figure 15.
Operating Current (IDD-OP) vs.
Temperature
24
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Typical Performance Characteristics (Continued)
www.fairchildsemi.com
7
SG6858 devices integrate many useful designs into one
controller for low-power switch-mode power supplies.
The following descriptions highlight some of the
features of the SG6858 series.
Startup Operation
The startup current is only 10µA. Low startup current
allows a startup resistor with a high resistance and low
wattage to supply the startup power for the controller. A
1.5MΩ, 0.25W, startup resistor and a 10µF/25V VDD
hold-up capacitor would be sufficient for an AC-to-DC
power adapter with a wide input range (100VAC to
240VAC).
Operating Current
The operating current has been reduced to 2.5mA. The
low operating current results in higher efficiency and
reduces the VDD hold-up capacitance requirement.
Figure 16. Current Sense R-C Filter
Constant Output Power Limit
When the SENSE voltage across the sense resistor RS
reaches the threshold voltage (around 0.96V), the
output GATE drive is turned off following a short
propagation delay tPD.
Green-Mode Operation
The proprietary green-mode function provides off-time
modulation to linearly decrease the switching frequency
under light-load conditions. On-time is limited to provide
stronger protection against brownouts and other
abnormal conditions. The feedback current, which is
sampled from the voltage feedback loop, is taken as the
reference. Once the feedback current exceeds the
threshold current, the switching frequency starts to
decrease. This green-mode function dramatically
reduces power consumption under light-load and zeroload conditions. Power supplies using the SG6858 meet
the strictest regulations regarding standby power
consumption.
This propagation delay introduces an additional current
proportional to tPD•VIN/LP. The propagation delay is
nearly constant regardless of the input line voltage VIN.
Higher input line voltages result in larger additional
currents. At high input line voltages, the output power
limit is higher than at low input line voltages.
To compensate for this output power limit variation
across a wide AC input range, the threshold voltage is
adjusted by adding a positive ramp (VLIMIT_RAMP).
This ramp signal rises from 0.80V to 0.96V, then
flattens out at 0.96V. A smaller threshold voltage forces
the output GATE drive to terminate earlier. This reduces
the total PWM turn-on time and makes the output power
equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for
a wide AC input voltage range (90VAC to 264VAC).
Oscillator Operation
A resistor connected from the RI pin to ground
generates a constant current source for the SG6858.
This current is used to charge an internal capacitor. The
charge-time determines the internal clock speed and
the switching frequency. Increasing the resistance
reduces the amplitude of the input current and reduces
the switching frequency. A 95kΩ resistor RI results in a
50µA constant current II and a 70kHz switching
frequency. The relationship between RI and the
switching frequency is:
f PWM =
6650
R I (k Ω )
(kHz )
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally
at 16.5V/11.5V. During startup, the hold-up capacitor
must be charged to 16.5V through the startup resistor,
so that the SG6858 is enabled. The hold-up capacitor
continues to supply VDD until power can be delivered
from the auxiliary winding of the main transformer. VDD
must not drop below 11.5V during this startup process.
This UVLO hysteresis window ensures that the hold-up
capacitor is adequate to supply VDD during startup.
(1)
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs at the sense-resistor. To avoid premature
termination of the switching pulse, a 300ns leadingedge blanking time is built in. Conventional RC filtering
can therefore be omitted. During this blanking period,
the current-limit comparator is disabled and it cannot
switch off the gate driver.
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Operation Description
www.fairchildsemi.com
8
Built-in Slope Compensation
Integrated VDD over-voltage protection prevents damage
due to over-voltage conditions. When the VDD exceeds
the internal threshold due to abnormal conditions, PWM
output is turned off until the VDD voltage drops below the
UVLO, then starts again. Over-voltage conditions are
usually caused by open feedback loops.
The sensed voltage across the current sense resistor is
used for current mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillations due to
peak-current mode control. The SG6858 has a
synchronized, positively-sloped ramp built-in at each
switching cycle. The slope of the ramp is:
Gate Output
0.36 × Duty
Duty (max .)
The BiCMOS output stage is a fast totem-pole gate
driver. Cross conduction has been avoided to minimize
heat dissipation, increase efficiency, and enhance
reliability. The output driver is clamped by an internal
17V Zener diode to protect power MOSFET transistors
against undesired over-voltage gate signals.
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
(2)
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulsewidth jitter, particularly in
continuous-conduction
mode.
While
slope
compensation helps alleviate this problem, further
precautions should be taken. Good placement and
layout practices should be followed. Avoiding long PCB
traces and component leads, locating compensation
and filter components near the SG6858, and increasing
the power MOS gate resistance are advised.
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
VDD Over-Voltage Protection (OVP)
www.fairchildsemi.com
9
Application
Fairchild
Devices
Input Voltage Range
Output
Adapter
SG6858
90~264VAC
12V/1.25A (15W)
F1
L
IN4007*4
1A/250V
R XC1
XC 1MΩ
AC Input
RXC2
0.22µF/300V 1MΩ
+
RSN
66kΩ
CBulk
RStart
1.5MΩ
N
RVDD
NA
1.2Ω
10nF/1KV
CSN
22µF/400V
FR103
10µF/50V
DVDD
+
CVDD
NP
47Ω 1nF
RSN2 CSN2
470µF/16V
DR
+
+
NS MBR10100CT CO1 CO2
VO-
47Ω RSN
680µF/16V
DSN
UF1003
10Ω
SSP2N60
RG
5
100kΩ
VDD
3 RI
RRI
RSENSE
GATE 6
VO +
1.5Ω
38.3kΩ
R1
Rd
560Ω
SG6858
2 FB
PC817
SENSE 4
GND
RF
1
CY
2.2nF
Figure 17.
TL431
1%
CF
20kΩ 2.2nF
10kΩ
R2
Schematic of Application Circuit
Transformer
-
Core: EF-20
-
Primary-Side Inductance: 2mH (Pin1 to Pin3)
1
N1
105Turns
3
4
0.27Φ*1
N2
18Turns
0.3Φ*2
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Typical Application Circuit (Flyback Converter for Printer Application)
TP+
Shielding lead to Pin 2
N3: 2-4
Shielding lead to Pin 2
N2: TP – - TP+
Shielding lead to Pin 2
N1: 1-3
TP–
N3
22Turns
0.25Φ*1
2
Figure 18.
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
Transformer Structure
www.fairchildsemi.com
10
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Physical Dimensions
Figure 19. 6-Pin, SSOT-6 Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
www.fairchildsemi.com
11
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
Physical Dimensions (Continued)
9.83
9.00
6.67
6.096
8.255
7.61
3.683
3.20
5.08 MAX
7.62
0.33 MIN
3.60
3.00
(0.56)
2.54
0.56
0.355
0.356
0.20
9.957
7.87
1.65
1.27
7.62
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 20. 8-Pin, Dual-Inline Package (DIP-8)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
www.fairchildsemi.com
12
SG6858 — Low-Cost, Green-Mode, PWM Controller for Flyback Converters
© 2008 Fairchild Semiconductor Corporation
SG6858 • Rev. 1.2.4
www.fairchildsemi.com
13