FAIRCHILD SG6846GLSY

SG6846G
Highly Integrated Green-Mode PWM Controller
Features
Description
ƒ
ƒ
ƒ
Low Startup Current: 8µA
ƒ
PWM Frequency Continuously Decreasing with
Burst Mode at Light Loads
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
VDD Over-Voltage Protection (OVP)
A highly integrated PWM controller, SG6846G provides
several features to enhance the performance of flyback
converters. To minimize standby power consumption, a
proprietary green-mode function provides off-time
modulation to continuously decrease the switching
frequency under light-load conditions. Under zero-load
conditions, the power supply enters burst-mode, which
completely shuts off PWM output. Output restarts just
before the supply voltage drops below the UVLO lower
limit. This green-mode function enables power supplies
to meet international power conservation requirements.
ƒ
ƒ
ƒ
OCP Threshold is Half Peak Current Limit
Low Operating Current: 3.7mA
Peak-Current-Mode Operation with Cycle-by-Cycle
Current Limiting
AC Input Brownout Protection with Hysteresis
Constant Output Power Limit (Full AC Input Range)
Internal Latch Circuit for OVP, OTP, and OCP
Two-Level OCP Delay: 110ms
Programmable PWM Frequency with
Frequency Hopping
Feedback Open-Loop Protection with 110ms Delay
Soft Startup Time: 5ms
Applications
General-purpose, switch-mode power supplies and
flyback power converters, including:
ƒ
ƒ
ƒ
Power Adapters
Open-Frame SMPS
SMPS with Surge-Current Output, such as for
Printers, Scanners, Motor Drivers
The SG6846G is designed for SMPS with surge-current
output, incorporated with a two-level OCP function.
Besides the cycle-by-cycle current limiting; if the
switching current is higher than OCP threshold and
lasts for 110ms, SG6846G shuts down immediately.
SG6846G also integrates a frequency-hopping function
internally, which helps reduce EMI emission of a power
supply with minimum line filters. The built-in
synchronized slope compensation provides proprietary
internal compensation for constant output power limit
over a universal AC input range. The gate output is
clamped at 18V to protect the external MOSFET from
over-voltage damage.
Other protection functions include AC input brownout
protection with hysteresis and VDD over-voltage
protection. For over-temperature protection, an external
NTC thermistor can be applied to sense the ambient
temperature. When OCP, VDD OVP, or OTP are
activated, an internal latch circuit latches off the
controller. The latch resets when VDD supply is removed.
SG6846G is available in an 8-pin SOP package.
Ordering Information
Part
Number
Operating
Temperature Range
OCP
Latch
Eco
Status
Package
Packing
Method
SG6846GLSY
-40 to +105°C
Yes
Green
8-Pin Small Outline Package (SOP)
Tape & Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
SG6846G — Highly Integrated Green-Mode PWM Controller
October 2008
SG6846G — Highly Integrated Green-Mode PWM Controller
Typical Application
L
EMI
AC input
VO+
Filter
+
+
N
VO+
7
3
VIN
4
RI
2
FB
VDD
GATE 8
SENSE 6
GND
RT 5
1
SG6846G
Figure 1. Typical Application
Block Diagram
Ri
4
0.9V/0.7V
VDD
VIN
3
Soft
Driver
Over Power Compensation
8
GATE
2
FB
6
SENSE
1.18-0.08 XVIN
Q
VDD -TH-G
VDD
7
Green
Mode
OSC
R
Internal
BIAS
UVLO
S
6V
3R
R
+
16.5V/10.5V
1R
Latch
Slope
Compensation
Blanking
Circuit
23.6V
1R
Debounce
1R
IRT
RT
OCP
Delay
5
1.05V
1.15V
1
GND
Figure 2. Block Diagram
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
2
SG6846G — Highly Integrated Green-Mode PWM Controller
Marking Information
: Fairchild Logo
Z: Plant Code
X: Year Code
Y: Week Code
TT: Die Run Code
F: L = OCP Latch
T: Package Type, S = SOP
P: Y = Green Compound
M: Manufacturing Flow Code
Figure 3. Top Mark
Pin Configuration
Figure 4. Pin Configuration
Pin Definitions
Pin #
Name
Function
1
GND
Ground
2
FB
Feedback
3
VIN
Line-voltage
Detection
Line-voltage detection is used for brownout protection with hysteresis.
Constant output power limit over universal AC input range is also achieved
using this pin. Add a low-pass filter to filter out line ripple on the bulk capacitor.
RI
Reference
Setting
A resistor from the RI pin to ground generates a reference current source that
determines the switching frequency. Increasing the resistance reduces the
switching frequency. Using a 26kΩ resistor results in a 65kHz switching
frequency.
5
RT
Temperature
Detection
For over-temperature protection, an external NTC thermistor is connected
from this pin to the GND pin. The impedance of the NTC decreases at high
temperatures. Once the voltage of the RT pin drops below a threshold, PWM
output is disabled.
6
SENSE
Current Sense
Current sense. The sensed voltage is used for peak-current-mode control and
cycle-by-cycle current limiting. If the switching current is higher than OCP
threshold and lasts for 110ms, SG6846G turns off immediately. This two-level
OCP feature is especially suitable for SMPS with surge current output.
7
VDD
Power Supply
Power supply. If an open-circuit failure occurs in the feedback loop, the
internal protection circuit disables PWM output as long as VDD exceeds a
threshold.
8
GATE
Driver Output
The totem-pole output driver for the power MOSFET. It is internally clamped
below 18V.
4
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
Description
Ground.
The signal from the external compensation circuit is fed into this pin. The
PWM duty cycle is determined in response to the signal from this pin and the
current-sense signal from pin 6.
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3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are
given with respect to GND pin.
Symbol
Parameter
VDD
Supply Voltage
VL
Input Voltage to FB, SENSE, VIN, RT,RI Pin
PD
Power Dissipation at TA<50°C
ΘJC
TJ
TSTG
TL
ESD
Min.
Max.
Unit
25
V
-0.3
7.0
V
400
mW
54.4
°C/W
Operating Junction Temperature
Thermal Resistance (Junction-to-Case)
-40
+150
°C
Storage Temperature Range
-65
+150
°C
+260
°C
Lead Temperature, Wave Soldering, 10 Seconds
Human Body Model, JESD22-A114
5.0
Charge Device Model, JESD22-C101
1.5
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Ambient Temperature
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
Min.
Max.
Unit
-40
+105
°C
SG6846G — Highly Integrated Green-Mode PWM Controller
Absolute Maximum Ratings
www.fairchildsemi.com
4
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
20
V
VDD Section
VDD-OP
Continuously Operating Voltage
VDD-ON
Turn-on Threshold Voltage
15.5
16.5
17.5
V
VDD-OFF
Turn-off Voltage
9.5
10.5
11.5
V
VDD-LH
Threshold Voltage for Latch-off Release
3
4
5
V
IDD-ST
Startup Current
VDD-ON – 0.16V
8
30
µA
IDD-OP
Operating Supply Current
GATE Open
3.7
5.0
mA
VDD-OVP
VDD Over-Voltage Protection (Latch off)
23
24
25
V
tD-VDDOVP
VDD OVP Debounce Time
RI = 26kΩ
60
100
140
µs
VDD OVP Latch-up Holding Current
VDD = 5V
30
50
70
µA
IDD-OVP
VIN Section
VIN-OFF
PWM Turn-off Threshold Voltage
0.65
0.70
0.75
V
VIN-ON
PWM Turn-on Threshold Voltage
VIN-OFF
+0.18
VIN-OFF
+0.20
VIN-OFF
+0.22
V
1/3.5
1/4.0
1/4.5
V/V
4.0
5.5
7.0
kΩ
Feedback Input Section
AV
Input Voltage to Current Sense Attenuation
ZFB
Input Impedance
VFBO
FB Pin Open Voltage
VFB-OLP
tD-OLP
At Green Mode
6.2
Threshold Voltage of Open-Loop Protection
Open-Loop Protection Delay Time
RI = 26kΩ
V
4.7
5.2
5.7
V
100
110
120
ms
SG6846G — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
Current Sense Section
ZSENSE
Input Impedance
tPD
Delay to Output
tLEB
Leading-Edge Blanking Time
12
100
270
360
kΩ
250
ns
ns
VSLOPE
Slope Compensation
Duty = DCYMAX
0.30
0.33
0.36
V
VSTH1V
Threshold Voltage for Current Limit
VIN = 1V
1.07
1.10
1.13
V
VSTH3V
Threshold Voltage for Current Limit
VIN = 3V
0.91
0.94
0.97
V
OCP Threshold Voltage for Current Limit
VIN = 1V
0.52
0.55
0.58
V
OCP Threshold Voltage for Current Limit
VIN = 3V
0.44
0.47
0.50
V
Delay Time for Over-Current Protection
RI = 26kΩ
100
110
120
ms
RI = 26kΩ
4.5
5.0
5.5
ms
RI = 13kΩ
2.25
2.50
2.75
ms
VSTH1V-1/2
VSTH3V-1/2
tD-OCP
tSS-65KHz
tSS-130KHz
Period During Startup Time
Continued on following page…
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
5
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
62
65
68
±3.7
±4.2
±4.7
124
130
136
±7.4
±8.4
±9.4
44.8
47.0
49.2
±2.54
±2.90
±3.26
Unit
Oscillator Section
fOSC
Normal PWM Frequency
Center
Frequency
RI = 26kΩ, VFB>VN
Jitter Range
fOSC,MAX
Maximum PWM
Frequency
Center
Frequency
RI = 13kΩ, VFB>VN
Jitter Range
kHz
kHz
Center
Minimum PWM Frequency Frequency
Jitter Range
RI = 36kΩ, VFB>VN
thop-1
Jitter Period
RI = 26kΩ, VFB ≥ VN
3.9
4.4
4.9
ms
thop-3
Jitter period
RI = 26kΩ, VFB = VG
10.2
11.5
12.8
ms
fOSC-G
Green Mode Minimum Frequency
RI = 26kΩ
18.0
22.5
25.0
kHz
VFB-N
FB Threshold Voltage for
Frequency Reduction
VFB-G
FB Voltage at fOSC-G
fOSC,MIN
SG
VFB-ZDC
Pin, FB Voltage
Jitter Range
Pin, FB Voltage
Jitter Range
Slope for Green-Mode Modulation
RI = 26kΩ, VFB = VN
RI = 26kΩ, VFB = VG
2.6
2.8
3
V
3.7
4.2
4.7
KHz
2.1
2.3
2.5
V
1.27
1.45
1.62
RI = 26kΩ
FB Threshold Voltage for Zero Duty Cycle
85
1.8
fDV
Frequency Variation vs. VDD Deviation
VDD = 11.5V to 20V
fDT
Frequency Variation vs. Temperature
Deviation
TA = -30 to 85°C
kHz
2.0
1.5
KHz
Hz/mV
2.2
V
5
%
5.0
%
SG6846G — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics (Continued)
Continued on following page…
Figure 5. PWM Frequency
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
6
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
80
85
90
%
1.5
V
PWM Output Section
DCYMAX
Maximum Duty Cycle
VOL
Output Voltage LOW
VDD = 15V, IO = 50mA
VOH
Output Voltage HIGH
VDD = 12V, IO = 50mA
tR
Rising Time
GATE = 1nF
350
tF
Falling Time
GATE = 1nF
50
Gate Output Clamping Voltage
VDD = 20V
VCLAMP
8
V
ns
ns
18
V
(1)
Over-Temperature Protection (OTP) Section
IRT
VRTTH
tDOTP-LATCH
RRT-OFF
Output Current of RT Pin
RI = 26kΩ
Threshold Voltage for OTP
Over-Temperature Latch-off Debounce
RI = 26kΩ
(1)
RI = 26kΩ
Equivalent Impedance of RT for OTP
64
70
76
µA
1.00
1.05
1.10
V
100
14
15
µs
16
kΩ
36
kΩ
RI Section
RINOR
RI Operating Range
13
RIMAX
Maximum RI Value for Protection
10
RIMIN
Minimum RI Value for Protection
MΩ
6
Note:
1. The relationship between RRT-OFF and RI is: RRT - OFF = VOTP -LATCH - OFF / IRT = VRT / (70 μA × 26 / RI (KΩ)) .
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
kΩ
(1)
SG6846G — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics (Continued)
www.fairchildsemi.com
7
T e m p e ra t u re
1 7.0
11.5
11.0
V D D - O F F (V )
V DD -ON (V )
1 6.8
1 6.6
1 6.4
1 6.2
10.5
10.0
9.5
1 6.0
9.0
-40
-2 5
-10
5
20
35
50
65
80
95
1 10
125
-4 0
T e m p e ra t u re (℃ )
-25
-10
5
20
35
50
65
80
95
1 10
125
T e m p e ra t u re (℃ )
Figure 6. Turn-on Threshold Voltage (VDD-ON)
vs. Temperature
Figure 7. Turn-off Threshold Voltage (VDD-OFF)
vs. Temperature
4 .0
2 6.0
2 2.0
ID D-ST (u A )
IDD-op (mA)
3 .5
1 8.0
1 4.0
3 .0
2 .5
1 0.0
6.0
SG6846G — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
2 .0
-40
-25
-1 0
5
20
35
50
65
80
95
11 0
12 5
-4 0
T e m p e ra t u re (℃ )
-2 5
-1 0
5
20
35
50
65
80
95
110
125
Temperature (℃ )
Figure 8. Startup Current (IDD-ST) vs. Temperature
/ @
0 .60
) s e
Figure 9. Operating Supply Current (IDD-OP)
vs. Temperature
pe atu e
@VIN=3V) vs Temperature
0 .50
0 .58
VSTH3V-1/2
VSTH1V-1/2
0 .49
0 .56
0 .54
0 .48
0 .47
0 .52
0 .50
0 .46
-4 0
-25
-10
5
20
35
50
65
80
95
110
12 5
-40
Figure 10. OCP Threshold Voltage for Current Limit
(VSTH1V-1/2 at VIN = 1V) vs. Temperature
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
-25
-10
5
20
35
50
65
80
95
11 0
125
Temperature (℃ )
Temperature (℃ )
Figure 11. OCP Threshold Voltage for Current Limit
(VSTH3V-1/2 at VIN = 3V) vs. Temperature
www.fairchildsemi.com
8
8 7.0
64.8
8 6.8
DCYmax (%)
FOSC ( k H z )
65.0
64.6
64.4
64.2
8 6.6
8 6.4
8 6.2
64.0
8 6.0
-4 0
-2 5
-1 0
5
20
35
50
65
80
95
1 10
1 25
-4 0
-25
-1 0
5
20
T e m p e r a tu r e ( ℃ )
50
65
80
95
1 10
125
Figure 13. Maximum Duty Cycle (DCYMAX)
vs. Temperature
70 .0
1 .1 0
69 .8
1 .0 8
69 .6
VRTTH ( V)
IRT ( u A )
Figure 12. Normal PWM Frequency (fOSC)
vs. Temperature
69 .4
69 .2
1 .0 6
1 .0 4
1 .0 2
69 .0
1 .0 0
-4 0
-25
-10
5
20
35
50
65
80
95
110
125
-40
-2 5
-1 0
5
20
T e m p e r a tu r e ( ℃ )
50
65
80
95
11 0
1 25
Figure 15. FB Output High Voltage (VRTTH)
vs. Temperature
T e m p e ra t u re
0.9 10
35
T e m p e r a tu r e ( ℃ )
Figure 14. Output Current of RT Pin (IRT)
vs. Temperature
0 .700
0 .695
VIN-OFF ( V )
0.9 05
V IN -ON (V )
35
Temperature (℃ )
SG6846G — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics (Continued)
0.9 00
0.8 95
0 .690
0 .685
0.8 90
0 .680
-4 0
-2 5
-10
5
20
35
50
65
80
95
11 0
12 5
-40
T e m p e ra t u re (℃ )
-1 0
5
20
35
50
65
80
95
11 0
125
T e m p e ra t u re (℃ )
Figure 16. PWM Turn-on Threshold Voltage (VIN-ON)
vs. Temperature
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
-25
Figure 17. PWM Turn-off Threshold Voltage (VIN-OFF)
vs. Temperature
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9
Startup Operation
Two-Level Over-Current Protection (OCP)
The turn-on/turn-off thresholds are fixed internally at
16.5V and 10.5V. To enable the SG6846G during
startup, the hold-up capacitor must first be charged to
16.5V through the startup resistor.
The cycle-by-cycle current limiting shuts down the PWM
immediately when the switching current is over the
peak-current threshold. Additionally, when the switching
current is higher than half of the peak-current threshold,
the internal counter counts down. When the total
accumulated counting time is more than ~110ms
(RI = 26kΩ), the controller is latched off and the internal
counter counts up. When the switching current is lower
than half of the peak current threshold, the internal
counter counts down. When the total accumulated
counting time is more than ~110ms (RI = 26kΩ), the
controller is latched off.
The hold-up capacitor continues to supply VDD before
energy can be delivered from the auxiliary winding of
the main transformer. The VDD must not drop below
10.5V during this startup process. This UVLO hysteresis
window ensures that the hold-up capacitor can
adequately supply VDD during startup.
The typical startup current is only 8µA, which allows a
high-resistance, low-wattage startup resistor to be used
to minimize power loss. A 1.5MΩ/0.25W startup resistor
and a 10µF/25V VDD hold-up capacitor are sufficient for
a universal input range.
This two-level OCP protection and up/down counter are
especially designed for SMPS with surge current output,
such as those for printers, scanners, and motor drivers.
The required operating current has been reduced to
3.7mA, which enables higher efficiency and reduces the
VDD hold-up capacitance requirement.
Constant Output Power Limit
For constant output power limit over a universal inputvoltage range, the peak-current threshold is adjusted by
the voltage of the VIN pin. Since the VIN pin is
connected to the rectified AC input line voltage through
the resistive divider, a higher line voltage generates a
higher VIN voltage. The threshold voltage decreases as
the VIN increases, making the maximum output power at
high line input voltage equal to that at low line input.
The value of R-C network should not be so large it
affects the power limit (shown in Figure 18). R and C
should put on less than 300Ω and 1000pF respectively.
Green-Mode Operation
The proprietary green-mode function provides off-time
modulation to continuously decrease the switching
frequency under light-load conditions. Maximum on-time
is limited to provide protection against abnormal
conditions. To further reduce power consumption under
zero-load condition, the PWM oscillator is completely
turned off and the power supply enters burst-mode. This
green-mode function dramatically reduces power
consumption under light-load and zero-load conditions.
Power supplies using SG6846G can meet international
regulations regarding standby power consumption.
Brownout Protection
Since the VIN pin is connected through a resistive
divider to the rectified AC input line voltage, it can also
be used for brownout protection. If the VIN voltage is
less than 0.7V, the PWM output is shut off. If the VIN
over 0.9V, the PWM output is turned on again. The
hysteresis window for ON/OFF is ~0.2V.
Oscillator Operation
A resistor connected from the RI pin to GND generates
a reference current source, inside the SG6846G, used
to determine the PWM frequency. Increasing the
resistance decreases the amplitude of the current
source and reduces the PWM frequency. Using a 26kΩ
resistor results in a corresponding 65kHz switching
frequency. The relationship between RI and the
switching frequency is:
fPWM(kHz) =
1690
R I (kΩ )
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents damage; when
VDD is over 24V, the SG6846G is latched off.
Over-Temperature Protection (OTP)
(2)
An external NTC thermistor can be connected from the
RT pin to GND. The impedance of the NTC decreases
at high temperatures. When the voltage of the RT pin
drops below 1.05V, the SG6846G is turned off. For
protection-mode options, see Ordering Information.
If an open-circuit or short-circuit to ground occurs at the
RI pin, the internal protection circuit immediately shuts
down the controller.
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
SG6846G — Highly Integrated Green-Mode PWM Controller
Operation Description
www.fairchildsemi.com
10
Noise Immunity
Noise from the current sense or the control signal may
cause significant pulse-width jitter, particularly in
continuous-conduction mode. Slope compensation
helps alleviate this problem. Good placement and
layout practices should be followed. Avoid long PCB
traces and component leads. Compensation and filter
components should be located near the SG6846G.
Figure 18. Current Sense R-C Filter
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
SG6846G — Highly Integrated Green-Mode PWM Controller
Operation Description (Continued)
www.fairchildsemi.com
11
RT1
R16
D4
2
4
1
5
2
32V
C13
11
C11
12
2
P16V
P16V L2
1
2
2
R11
C5
3
C17+
C14
+
16V 16V
C15
+
1
1
C3
2
R17
2
+
1
9
3
2
+
32V
+
2
1
21
2
1
R4
7
1
1
2
D3
L4
C12
+
10
D2
D1
2
2
6
R9
R3
C16+
3
R12 C4
C2
3
2
R2
R1
13
1
+
R8
1
P7
P32V
P32V L1
1
2
CX2
4
3
1
P2
TX1
1
VZ1
LF1 CY2
BD1
1
CX1LF2
3
4
2
CY1
1
F1
t
P1
2
U1
FB
GATE
Q1
R13
8
1
2
GND
3
1
2
FB
VDD
VIN
SENSE
7
L3
R6
6
1
2
3
1
D5
1
C1
+
R5
4
RI
RT
5
R10
C6
R14
NTC1
R7
P16V
P16V
1
4
R15
FB
P16V
FB
C7
K
R18
P32V
R19
R20
2
3
U2
P32V
P16V
C9
R
R21
A
U3
Figure 19. Application Circuit for 32V / 16V Output
SG6846G — Highly Integrated Green-Mode PWM Controller
Reference Circuit
BOM
Part No.
Value
Part No.
Value
Part No.
Value
R1, R2, R3, R4
R8, R9
470KΩ ±5%
C4
S1MΩ ±1%
C10,C11
103 P 630V
D3
FR103 1.0A 200V
102 P 1KV
BD1
DBL406G
R5
16K2Ω ±1%
C6,C7
102 P 50V
D4
BYT28-300
R15
R13
1K5Ω ±5%
C9
222 P 50V
D5
BYV32-150
10Ω ±5%
C14,C17
470µ 25V
F1
250V4A QUICK
R18
4K7Ω ±5%
C15
220µ 25V
L1,L2
1.8µH
R21
15KΩ ±1%
C13,C16
220µ 50V
L4
10µH
R7
27KΩ ±5%
C2
150µ 400V
U3
TL431 +/-1%
R6
330Ω ±1%
C1
4µ7 50V
U1
SG 6846
R19
102KΩ ±1%
C3
10µ 50V
U2
PC817
R14
0Ω22 ±5%
CX1
X1 0.47µ 275V
Q1
7NB60
R16, R17
1W 20Ω ±5%
C8
Y2 222P 250V
TX1
EI-33
R11
20KΩ ±5%
C5
100µ 50V
RT1
SCK053
R12
100KΩ ±5%
CX2
X2 0.1µF 275V
VZ1
14ψ 470V
R20
887KΩ ±1%
D1
1N4148
R22
10KΩ ±1%
D2
BYV95C
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
12
5.00
4.80
A
0.65
3.81
5
8
B
6.20
5.80
PIN ONE
INDICATOR
1.75
4.00
3.80
1
5.60
4
1.27
(0.33)
0.25
M
1.27
C B A
LAND PATTERN RECOMMENDATION
0.25
0.10
SEE DETAIL A
1.75 MAX
R0.10
0.10
0.51
0.33
0.50 x 45°
0.25
C
OPTION A - BEVEL EDGE
GAGE PLANE
R0.10
8°
0°
0.90
0.406
0.25
0.19
C
SG6846G — Highly Integrated Green-Mode PWM Controller
Physical Dimensions
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
Figure 20. 8-Pin Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
13
SG6846G — Highly Integrated Green-Mode PWM Controller
© 2008 Fairchild Semiconductor Corporation
SG6846G • Rev. 1.0.0
www.fairchildsemi.com
14