PBSS8110Z 100 V, 1 A NPN low VCEsat (BISS) transistor Rev. 02 — 8 January 2007 Product data sheet 1. Product profile 1.1 General description NPN low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT223 (SC-73) small Surface-Mounted Device (SMD) plastic package. PNP complement: PBSS9110Z. 1.2 Features n n n n n Low collector-emitter saturation voltage VCEsat High collector current capability IC and ICM High collector current gain (hFE) at high IC High efficiency due to less heat generation Smaller required Printed-Circuit Board (PCB) area than for conventional transistors 1.3 Applications n n n n n High-voltage DC-to-DC conversion High-voltage MOSFET gate driving High-voltage motor control High-voltage power switches (e.g. motors, fans) Automotive applications 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit open base - - 100 V - - 1 A - - 3 A - 160 200 mΩ VCEO collector-emitter voltage IC collector current ICM peak collector current single pulse; tp ≤ 1 ms RCEsat collector-emitter saturation resistance IC = 1 A; IB = 100 mA [1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02. [1] PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 2. Pinning information Table 2. Pinning Pin Description 1 base 2 collector 3 emitter 4 collector Simplified outline Symbol 4 2, 4 1 1 2 3 3 sym016 3. Ordering information Table 3. Ordering information Type number PBSS8110Z Package Name Description SC-73 plastic surface-mounted package with increased heat sink; SOT223 4 leads Version 4. Marking Table 4. Marking codes Type number Marking code PBSS8110Z PB8110 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 120 V VCEO collector-emitter voltage open base - 100 V VEBO emitter-base voltage open collector - 5 V IC collector current - 1 A ICM peak collector current - 3 A IB base current Ptot total power dissipation single pulse; tp ≤ 1 ms Tamb ≤ 25 °C PBSS8110Z_2 Product data sheet - 0.3 A [1] - 0.65 W [2] - 1 W [3] - 1.4 W © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 2 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Tj Conditions Min Max Unit junction temperature - 150 °C Tamb ambient temperature −65 +150 °C Tstg storage temperature −65 +150 °C [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. 001aaa508 1.6 Ptot (W) 1.2 (1) (2) 0.8 (3) 0.4 0 0 40 80 120 160 Tamb (°C) (1) FR4 PCB, mounting pad for collector 6 cm2 (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Power derating curves 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Rth(j-sp) thermal resistance from junction to solder point Typ Max Unit - - 192 K/W [2] - - 125 K/W [3] - - 89 K/W - - 17 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. PBSS8110Z_2 Product data sheet Min [1] © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 3 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 006aaa819 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aaa820 103 Zth(j-a) (K/W) duty cycle = 1 102 0.5 0.75 0.33 0.2 10 0.1 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) FR4 PCB, mounting pad for collector 1 cm2 Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 4 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 006aaa821 103 Zth(j-a) (K/W) 102 10 duty cycle = 1 0.75 0.5 0.33 0.2 0.1 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) FR4 PCB, mounting pad for collector 6 cm2 Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 5 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 7. Characteristics Table 7. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current VCB = 80 V; IE = 0 A - - 100 nA VCB = 80 V; IE = 0 A; Tj = 150 °C - - 50 µA ICES collector-emitter cut-off current VCE = 80 V; VBE = 0 V - - 100 nA IEBO emitter-base cut-off current VEB = 4 V; IC = 0 A - - 100 nA hFE DC current gain VCE = 10 V; IC = 1 mA 150 - - VCE = 10 V; IC = 250 mA 150 - 500 VCEsat collector-emitter saturation voltage VCE = 10 V; IC = 0.5 A [1] 100 - - VCE = 10 V; IC = 1 A [1] 80 - - - - 40 mV IC = 100 mA; IB = 10 mA IC = 500 mA; IB = 50 mA [1] - - 120 mV IC = 1 A; IB = 100 mA [1] - - 200 mV RCEsat collector-emitter saturation resistance IC = 1 A; IB = 100 mA [1] - 160 200 mΩ VBEsat base-emitter saturation voltage IC = 1 A; IB = 100 mA [1] - - 1.05 V VBEon base-emitter turn-on voltage VCE = 10 V; IC = 1 A [1] - - 0.9 V td delay time - 25 - ns tr rise time - 220 - ns ton turn-on time VCC = 10 V; IC = 0.5 A; IBon = 0.025 A; IBoff = −0.025 A - 245 - ns ts storage time - 365 - ns tf fall time - 185 - ns toff turn-off time - 550 - ns fT transition frequency VCE = 10 V; IC = 50 mA; f = 100 MHz 100 - - MHz Cc collector capacitance VCB = 10 V; IE = ie = 0 A; f = 1 MHz - - 7.5 pF [1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02. PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 6 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 001aaa497 600 001aaa496 2 IB (mA) = 35 31.5 28 24.5 21 17.5 14 IC (A) hFE 1.6 (1) 400 1.2 10.5 (2) 7 0.8 200 3.5 (3) 0.4 0 10−1 1 10 102 103 104 IC (mA) 0 0 1 2 3 4 5 VCE (V) Tamb = 25 °C VCE = 10 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Fig 5. DC current gain as a function of collector current; typical values 006aaa986 1.2 VBE (V) 006aaa987 10 VBEsat (V) (1) 0.8 Fig 6. Collector current as a function of collector-emitter voltage; typical values (2) 1 (1) (3) (2) 0.4 0 10−1 (3) 1 10 102 103 104 IC (mA) VCE = 10 V 10−1 10−1 1 102 103 104 IC (mA) IC/IB = 10 (1) Tamb = −55 °C (1) Tamb = −55 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 100 °C Fig 7. Base-emitter voltage as a function of collector current; typical values Fig 8. Base-emitter saturation voltage as a function of collector current; typical values PBSS8110Z_2 Product data sheet 10 © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 7 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 001aaa504 1 006aaa988 1 VCEsat (V) VCEsat (V) 10−1 10−1 (1) (1) (2) (3) 10−2 10−1 1 10 (2) 102 103 104 IC (mA) 10−2 10−1 1 10 102 103 104 IC (mA) Tamb = 25 °C IC/IB = 10 (1) Tamb = 100 °C (1) IC/IB = 50 (2) Tamb = 25 °C (2) IC/IB = 20 (3) Tamb = −55 °C Fig 9. Collector-emitter saturation voltage as a function of collector current; typical values 001aaa501 103 Fig 10. Collector-emitter saturation voltage as a function of collector current; typical values 006aaa989 103 RCEsat (Ω) RCEsat (Ω) 102 102 10 10 1 1 (1) (2) 10−1 10−1 (1) (2) (3) 1 10 102 103 104 IC (mA) 10−1 10−1 1 10 102 103 104 IC (mA) Tamb = 25 °C IC/IB = 10 (1) Tamb = 100 °C (1) IC/IB = 50 (2) Tamb = 25 °C (2) IC/IB = 20 (3) Tamb = −55 °C Fig 11. Collector-emitter saturation resistance as a function of collector current; typical values Fig 12. Collector-emitter saturation resistance as a function of collector current; typical values PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 8 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 8. Test information IB input pulse (idealized waveform) 90 % IBon (100 %) 10 % IBoff output pulse (idealized waveform) IC 90 % IC (100 %) 10 % t td ts tr ton tf toff 006aaa003 Fig 13. BISS transistor switching time definition VBB RB VCC RC Vo (probe) oscilloscope 450 Ω (probe) 450 Ω oscilloscope R2 VI DUT R1 mlb826 VCC = 10 V; IC = 0.5 A; IBon = 0.025 A; IBoff = −0.025 A Fig 14. Test circuit for switching times PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 9 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 9. Package outline 6.7 6.3 3.1 2.9 1.8 1.5 4 1.1 0.7 7.3 6.7 3.7 3.3 1 2 2.3 4.6 3 0.8 0.6 Dimensions in mm 0.32 0.22 04-11-10 Fig 15. Package outline SOT223 (SC-73) 10. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBSS8110Z [1] Package SOT223 Description 8 mm pitch, 12 mm tape and reel 1000 4000 -115 -135 For further information and the availability of packing methods, see Section 14. PBSS8110Z_2 Product data sheet Packing quantity © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 10 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 11. Soldering 7.00 3.85 3.60 3.50 0.30 1.20 (4 ×) 4 7.40 3.90 4.80 7.65 1 2 3 1.20 (3 ×) 1.30 (3 ×) 5.90 6.15 solder lands occupied area solder paste solder resist Dimensions in mm sot223_fr Fig 16. Reflow soldering footprint SOT223 (SC-73) 8.90 6.70 4 4.30 8.10 8.70 1 1.90 (2×) 2 3 1.10 7.30 transport direction during soldering solder lands occupied area solder resist Dimensions in mm sot223_fw Fig 17. Wave soldering footprint SOT223 (SC-73) PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 11 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 12. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes PBSS8110Z_2 20070108 Product data sheet - PBSS8110Z_1 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • • • • • • • • • Legal texts have been adapted to the new company name where appropriate. • • Figure 2: amended • • • • • • • • • • PBSS8110Z_1 Section 1.1 “General description”: amended Section 1.2 “Features”: amended Section 1.3 “Applications”: amended Table 1 “Quick reference data”: conditions for ICM peak collector current adapted Table 1: RCEsat equivalent on-resistance redefined to collector-emitter saturation resistance Table 2 “Pinning”: simplified outline drawing amended Table 4 “Marking codes”: amended Table 5 “Limiting values”: conditions for ICM peak collector current adapted Table 5: Tamb operating ambient temperature redefined to ambient temperature Table 6 “Thermal characteristics”: amended Table 6: Rth(j-s) thermal resistance from junction to soldering point redefined to Rth(j-sp) thermal resistance from junction to solder point Figure 2: Zth transient thermal impedance redefined to Zth(j-a) transient thermal impedance from junction to ambient Figure 2: tp pulse time redefined to pulse duration Figure 3 and 4: added Table 7: RCEsat equivalent on-resistance redefined to collector-emitter saturation resistance Table 7: switching times added Figure 5, 6, 8 and 12: amended Section 8 “Test information”: added Figure 15: superseded by minimized package outline drawing Section 10 “Packing information”: added Section 11 “Soldering”: added Section 13 “Legal information”: updated 20040426 Product data sheet - PBSS8110Z_2 Product data sheet - © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 12 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 13.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] PBSS8110Z_2 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 02 — 8 January 2007 13 of 14 PBSS8110Z NXP Semiconductors 100 V, 1 A NPN low VCEsat (BISS) transistor 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing information. . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 8 January 2007 Document identifier: PBSS8110Z_2