VECTRON J-TYPE

Product Data Sheet
J-Type
Voltage Controlled Crystal Oscillator
Features
• Output Frequencies from 1.024 MHz to 250.000 MHz
• +3.3 or +5.0 volt options
• Small 14mm x 9mm J-type Package
• CMOS or PECL Outputs
• Low phase noise and custom options
• 0/70° C or –40/85° C operating temperature
• Tri-State output (CMOS) Enable/Disable (PECL)
Applications
• Clock Smoothing
• Frequency Translation
• SONET, SDH, ATM, DSLAM, ADM
Description
The J-type voltage controlled crystal oscillator incorporates VI’s advanced VCXO performance capabilities
while adhering to a package footprint compatible with
the industry-common J-lead package.
The J-type VCXO is a quartz stabilized square wave
generator with either a CMOS output for driving
CMOS/TTL loads or a PECL output. The device is packaged in a 6 pin J-lead ceramic package and is hermetically sealed with a grounded conductive lid.
J-Type Voltage Controlled Crystal Oscillator
CMOS Output Option
Electrical Performance @ 25°C for the CMOS output option
Parameter
Symbol
Supply Voltage1, +5 volt option
+3.3 volt option
Supply Current
Center Frequency, see ordering information
Operating Temperature, see ordering info
Absolute Pull Range over the operating temperature range, aging and power supply Vc=0.5 to
4.5 at 5V supply or 0.3 to 3.0 V at 3.3V supply
see ordering information for options
Gain Transfer
(Frequency vs. Control Voltage)
Output Level High2
Output Level Low2
Output Rise/Fall Time2
Duty Cycle3, see ordering info
Control Input Leakage
Control Voltage Modulation Bandwidth
RMS Jitter, Output=12.0-77.760 MHz
RMS Jitter, Output=12.0-77.760 MHz.
Band=12.0 KHz - 20 MHz
Control Range
Maximum Supply Voltage
Storage Temperature
Soldering Temp./Time
Minimum
FN
TOP
APR
KV
VOH
VOL
tR/ tF
SYM
IL
BW
Typical
Maximum
4.5
5.0
5.5
3.0
3.3
3.6
10mA + 0.25mA per MHz, typical
1.024
77.760
0/70, -40/85
±50 to ±100
Unit
Vdc
Vdc
MHz
°C
ppm
Positive
0.8*Vcc
45/55 or 40/60
-
10
3
<0.5
0
TS
TLS
0.1*Vcc
5
-55
-
-
1
-
VDD
7
125
220/10
V
V
ns
%
uA
kHz
ps
ps
V
°C
°C/s
1. Power supply bypass is required and a 0.1uF in parallel with a 0.01uF high frequency capacitor is recommended.
2. Figure 1 defines these parameters. Figure 2 illustrates the load used to test devices.
3. Duty cycle is defined as on-time versus period at 1.4 V for TTL, and 2.5 V for CMOS (5volt supply) and at 1.65 V for CMOS (3.3 volt operation)
Pin Out Information for the CMOS output option
Pin
Symbol
1
Vc
2
Tri-State1
3
GND
4
Output
5
CMOS/TTL
select1,2
6
VCC
Function
VCXO Control Voltage.
TTL logic low disables output
TTL logic high, or no connect, enables output
Case and electrical ground.
VCXO Output
TTL logic low optimizes symmetry for CMOS
TTL logic high, or NC, optimizes symmetry for TTL.
Power Supply Voltage (5.0 V or 3.3V ±10%)
1. Standard option. Tri-State can be connected to pin 5 and CMOS/TTL select would be on pin 2.
2. Output is HCMOS. For frequencies >12MHz, this option optimizes symmetry for either CMOS or TTL thresholds. Ground this pin for frequencies < 12MHz.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
2
J-Type Voltage Controlled Crystal Oscillator
CMOS Output Option
Figure 1
Output Wave Form
Figure 2
Output Test Conditions
Threshold = 1.4 volts for TTL
and 50% for CMOS
Output Test Conditions (25±5°C) for 5 volt devices.
For 3.3V use 15pF cap only, no resistors needed.
Ordering Information for the CMOS output option (add frequency)4
Package
J
6 pin
Ceramic
SOJ
Supply
Voltage
C
5V±10%
VCXO
Type
APR
(ppm)
Operating
Temp.
(°C)
Output/Duty
Cycle
Min/Max
U
VCXO G
±50
C
0/70
A
TTL/
CMOS
45/55%1
D 3.3V±10% L
±10% N
linear
VCXO
±80
L
-40/85
J
CMOS
45/55%2
H
±100
K
CMOS
40/60%3
Tri-State
T Tri State
on pin 2
Specials
N
Standard
1. Output is CMOS and symmetry is tested at TTL and CMOS thresholds.
2. Output is CMOS and symmetry is tested at CMOS threshold. This option is used for 3.3 V operation.
3. Output is CMOS and symmetry is tested at CMOS thresholds. This option is required for 3.3V, frequencies >51.840MHz.
4. Note: Not all combinations are possible.
Example: JDUGCKTN @ 77.76 MHz = 3.3 volt, [email protected], ±50 ppm APR, 0/70°C, 40/60% Symmetry,
CMOS, Tri-State on pin 2.
Standard Frequencies, in MHz, for CMOS output option
1.024
3.686
6.144
8.448
14.318
19.44
27.000
38.880
52.000
1.544
4.000
6.176
10.000
15.360
20.000
30.000
40.000
65.536
2.000
4.032
6.312
12.000
15.440
20.480
32.000
40.960
77.760
2.048
4.096
6.400
12.288
16.000
24.000
32.768
44.736
155.5201
3.088
4.434
8.000
12.352
16.384
24.576
34.368
50.000
3.580
5.000
8.192
13.000
18.432
24.704
35.328
51.840
1. Uses a PLL multiplier, jitter is 25ps rms typical vs 3ps rms typical for a HFF (High Frequency Fundemental) design. Available with 5 Vdc input only.
Other frequencies available upon request.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
3
J-Type Voltage Controlled Crystal Oscillator
PECL Output Option
Electrical Performance @ 25°C for the PECL output option
Parameter
Symbol
Supply Voltage1, +5 volt option
+3.3 volt option
Supply Current (frequency dependent)
Center Frequency, see ordering information
Operating Temperature, see ordering info
Absolute Pull Range over the operating temperature range, aging and power supply Vc= 0.5 to
4.5 at 5V supply or 0.3 to 3.0 V at 3.3 supply
see ordering information for options
Gain Transfer
(Frequency vs. Control Voltage)
Output Level High2 (0/70°C)
Output Level Low2 (0/70°C)
Output Level High2 (-40/+85°C)
Output Level Low2 (-40/+85°C)
Output Rise/Fall Time2
Duty Cycle
Control Input Leakage
Control Voltage Modulation Bandwidth
RMS Jitter
RMS Jitter, 155.52 MHz, 12 kHz to 20 MHz (option P)
Maximum Control Voltage
Maximum Supply Voltage
Storage Temperature
Soldering Temp./Time
Minimum
4.5
3.0
FN
TOP
APR
Maximum
Unit
5.0
3.3
5.5
3.6
<65mA
250
Vdc
Vdc
15
0/70, -40/85
±32 to ±50
KV
VOH
VOL
VOH
VOL
tR/ tF
SYM
IL
BW
Typical
MHz
°C
ppm
Positive
Vcc-1.025
Vcc-1.810
Vcc-1.085
Vcc-1.830
TS
TLS
-
Vcc-0.880
Vcc-1.620
Vcc-0.880
Vcc-1.555
1
45/55
0.1
10
see ordering information
0.5
1.0
0
VDD
7
-55
125
220/10
V
V
V
V
ns
%
mA
kHz
ps
ps
V
°C
°C/s
1. Power supply bypass is required and a 0.1uF in parallel with a 0.01uF high frequency capacitor is recommended.
2. Transition times are measured from 20% to 80% of a full 10K ECL level swing.
Pin Out Information for the PECL output option
Pin
Symbol
1
Vc
2
N/C or E/D1
3
GND
Function
VCXO Control Voltage.
No Connect or Output Disable option
Case and electrical ground.
4
Output
VCXO Output
5
COutput
VCXO Complementary Output
6
VCC
Power Supply Voltage (5.0 V or 3.3V ±10%)
1. By setting pin 2 high, the outputs are disabled and output on pin 4 is held low while Complementary output on pin 5 is held high.
Output is enabled by setting pin 2 at < Vcc -1.6V, See ordering information for enable/disable option.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
4
J-Type Voltage Controlled Crystal Oscillator
PECL Output Option
Output Wave Form
Output Test Conditions
Output Test Conditions (25±5°C)
Ordering Information for the PECL output option (add frequency)
Package
J
6 pin
Ceramic
SOJ
Supply
Voltage
C
5V±10%
VCXO
Type
U
D 3.3V±10% L
VCXO
APR
(ppm)
Operating
Temp.
(°C)
F
±32
C
0/70
±10% G
linear
VCXO
±50
L
-40/85
1
Output/Duty
Cycle
Min/Max
M
PECL
45/55%
Enable/
Disable
U
None
E Enable/
Disable
on pin 2
M ±20ppm
stability
VCXO
Specials
N
Standard
P
6ps rms
(<1ps rms
12 kHz-20 MHz)
jitter
R
12ps rms
jitter
T
20ps rms
jitter
1. Note: Not all combinations are possible.
Example: JDUGLMEP @77.76 MHz = 3.3 volt, VCXO @77.760, ±50 ppm APR, -40/85°C, 45/55% Symmetry,
PECL, Enable/Disable on pin 2, 6ps rms jitter
Standard Frequencies, in MHz, for PECL output options
77.760
82.944
155.52
200.00
245.76
Other frequencies available upon request.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
5
J-Type Voltage Controlled Crystal Oscillator
Outline Drawing
Tape and Reel
Tape and Reel Dimensions (mm)
Tape Dimensions
Reel Dimensions
# Per Reel
Product
A
B
C
D
E
F
G
H
I
J
K
L
J-Type
24
11.5
1.5
4
12
1.78
21
13
100
5
25
330
200
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
6
J-Type Voltage Controlled Crystal Oscillator
Typical Frequency Translation Diagram
Typical Clock Smoothing Diagram
Recommended Solder Reflow Profile
Suggested IR profile
VI qualification includes aging at various extreme temperatures, shock and vibration; temperature cycling
and IR reflow simulation. The conditions a device can
withstand are well understood and devices can be
subjected to the profile in figure above. This profile
shows a ramp up condition to prevent thermal shock,
a preheat period in which the flux is activated, a ramp
up to 183° C which is the eutectic temperature of Sn/Pb
and a gradual cool down. The time above 183° C should
not exceed 60 seconds and the peak temperature
should be no more than 220° C for 10 seconds. The Jtypes are 100% screened for hermeticity so an aqueous
wash is not an issue.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Fax: 1-888-FAX-VECTRON
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J-Type Voltage Controlled Crystal Oscillator
Recommended Solder Pad Layout
Mechanical and Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Solderability
Gross and Fine Leak
Resistance to Solvents
Conditions
MIL-STD-883, 2002
MIL-STD-883, 2007
MIL-STD-883, 2003
MIL-STD-883, 1014
MIL-STD-883, 1016
Handling Precautions
Although ESD protection circuitry has been designed
into the the J-type, proper precautions should be
taken when handling and mounting. VI employs a
human body model and a charged-device model
(CDM) for ESD susceptibility testing and design protection evaluation. ESD thresholds are dependent on
the circuit parameters used to define the model.
Although no industry wide standard has been adopted
for the CDM, a standard HBM of resistance =
1.5Kohms and capacitance = 100pF is widely used
and therefore can be used for comparison purposes.
ESD Ratings
Model
Minimum
Human Body Model
1500V
Charged Device Model
1500V
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No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
© Vectron International 2000
8
Printed in USA 6/00, rev. 8/16/02